SN54ABT620, SN74ABT620 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS113D – FEBRUARY 1991 – REVISED APRIL 1998 D D D D SN54ABT620 . . . J PACKAGE SN74ABT620 . . . DB, DW, N, OR PW PACKAGE (TOP VIEW) OEAB A1 A2 A3 A4 A5 A6 A7 A8 GND 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC OEBA B1 B2 B3 B4 B5 B6 B7 B8 SN54ABT620 . . . FK PACKAGE (TOP VIEW) description These octal bus transceivers provide for asynchronous communication between data buses. The control-function implementation allows for maximum flexibility in timing. The ’ABT620 devices provide inverted data at the outputs. 1 A3 A4 A5 A6 A7 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 B1 B2 B3 B4 B5 A8 GND B8 B7 B6 These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic levels at the output-enable (OEAB and OEBA) inputs. OEBA D State-of-the-Art EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JESD 17 Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C High-Drive Outputs (–32-mA IOH, 64-mA IOL ) Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), and Plastic (N) and Ceramic (J) DIPs A2 A1 OEAB VCC D The output-enable inputs can be used to disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability of storing data by simultaneously enabling OEAB and OEBA. When both OEAB and OEBA are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (16 total) remain at their last states. In this way, each output reinforces its input in this configuration. To ensure the high-impedance state during power up or power down, OEBA should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. The SN54ABT620 is characterized for operation over the full military temperature range of –55°C to 125°C. The SN74ABT620 is characterized for operation from –40°C to 85°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC-ΙΙB is a trademark of Texas Instruments Incorporated. Copyright 1998, Texas Instruments Incorporated UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54ABT620, SN74ABT620 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS113D – FEBRUARY 1991 – REVISED APRIL 1998 FUNCTION TABLE INPUTS OEAB L L B data to A bus H B data to A bus, A data to B bus L H L Isolation H H A data to B bus logic symbol† 19 OEBA OEAB 1 OPERATION OEBA logic diagram (positive logic) OEBA EN1 EN2 OEAB A1 A2 A3 A4 A5 A6 A7 A8 2 18 1 3 1 1 2 17 4 16 5 15 6 14 7 13 8 12 9 11 19 1 B1 A1 2 18 B1 B2 B3 B4 B5 To Seven Other Channels B6 B7 B8 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Voltage range applied to any output in the high or power-off state, VO . . . . . . . . . . . . . . . . . . . –0.5 V to 5.5 V Current into any output in the low state, IO: SN54ABT620 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA SN74ABT620 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace length of zero. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54ABT620, SN74ABT620 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS113D – FEBRUARY 1991 – REVISED APRIL 1998 recommended operating conditions (see Note 3) SN54ABT620 VCC VIH Supply voltage VIL VI Low-level input voltage IOH IOL High-level output current ∆t/∆v Input transition rise or fall rate High-level input voltage SN74ABT620 MIN MAX MIN MAX 4.5 5.5 4.5 5.5 2 2 0.8 Input voltage 0 Low-level output current Outputs enabled VCC –24 V V 0.8 0 UNIT VCC –32 V V mA 48 64 mA 5 5 ns/V TA Operating free-air temperature –55 125 –40 85 °C NOTE 3: All unused pins (control or I/O) of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54ABT620, SN74ABT620 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS113D – FEBRUARY 1991 – REVISED APRIL 1998 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V, II = –18 mA IOH = –3 mA VCC = 5 V, VCC = 4 4.5 5V VOL VCC = 4 4.5 5V MIN MIN –1.2 MAX SN74ABT620 MIN –1.2 2.5 IOH = –3 mA IOH = –24 mA 3 3 3 2 2 IOH = –32 mA IOL = 48 mA 2* IOZH‡ IOZL‡ VCC = 5.5 V, VCC = 5.5 V, VO = 2.7 V VO = 0.5 V Ioff VCC = 0, VCC = 5.5 V, VO = 5.5 V VI or VO ≤ 4.5 V VCC = 5.5 V, VO = 2.5 V Outputs high IO§ 0.55 0.55* 0.55 A or B ports Data inputs inp ts ∆ICC¶ Control inputs Ci Control inputs Cio A or B ports VCC = 5.5 V, IO = 0, VI = VCC or GND VCC = 5.5 V, One input at 3.4 V,, Other inputs at VCC or GND Outputs high V mV ±1 ±1 ±1 ±100 ±100 ±100 50 50 50 µA –50 –50 ±100 50 –50 V 2 0.55 IOL = 64 mA VI = VCC or GND A or B ports UNIT V 100 Control inputs ICEX –100 –180 50 –50 –180 –50 µA –50 µA ±100 µA 50 µA –180 mA 5 250 250 250 µA Outputs low 24 30 30 30 mA Outputs disabled 0.5 250 250 250 µA Outputs enabled 1.5 1.5 1.5 Outputs disabled 0.05 0.05 0.05 1.5 1.5 1.5 VCC = 5.5 V, One input at 3.4 V, Other inputs at VCC or GND VI = 2.5 V or 0.5 V VO = 2.5 V or 0.5 V pF 7 pF PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 mA 4 * On products compliant to MIL-PRF-38535, this parameter does not apply. † All typical values are at VCC = 5 V. ‡ The parameters IOZH and IOZL include the input leakage current. § Not more than one output should be tested at a time, and the duration of the test should not exceed one second. ¶ This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. 4 MAX –1.2 2.5 VCC = 5 5.5 5V V, ICC SN54ABT620 2.5 Vhys II TA = 25°C TYP† MAX • DALLAS, TEXAS 75265 SN54ABT620, SN74ABT620 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS113D – FEBRUARY 1991 – REVISED APRIL 1998 switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Figure 1) FROM (INPUT) TO (OUTPUT) tPLH tPHL A or B B or A tPZH tPZL OEBA A tPHZ tPLZ OEBA A tPZH tPZL OEAB B tPHZ tPLZ OEAB B PARAMETER VCC = 5 V, TA = 25°C SN54ABT620 MIN MAX MIN 1 4.1 1 MAX SN74ABT620 MIN MAX 1 1 4.8 4.3 1 1 4.8 1.3 4.6 1.3 1.3 5.5 1 6.1 1 1 7.1 2 6.3 2 2 7 1.4 5.4 1.4 1.4 5.8 1.6 6.2 1.6 1.6 6.8 2 5.9 2 2 6.4 1.2 5.6 1.2 1.2 6.5 1.1 4.7 1.1 1.1 5.6 UNIT ns ns ns ns ns PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN54ABT620, SN74ABT620 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS113D – FEBRUARY 1991 – REVISED APRIL 1998 PARAMETER MEASUREMENT INFORMATION 7V S1 500 Ω From Output Under Test Open GND CL = 50 pF (see Note A) 500 Ω TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 7V Open LOAD CIRCUIT 3V Timing Input 1.5 V 0V tw tsu 3V Input 1.5 V 1.5 V th 3V Data Input 1.5 V 1.5 V 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3V 1.5 V Input 1.5 V 0V tPHL tPLH VOH 1.5 V Output 1.5 V VOL tPHL tPLH VOH Output 1.5 V 1.5 V VOL 3V Output Control 1.5 V 1.5 V 0V tPZL tPLZ Output Waveform 1 S1 at 7 V (see Note B) Output Waveform 2 S1 at Open (see Note B) 1.5 V tPZH VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 3.5 V VOL + 0.3 V VOL tPHZ 1.5 V VOH – 0.3 V VOH [0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright 1998, Texas Instruments Incorporated