TI TPS64200DBVT

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SLVS485 − AUGUST 2003
FEATURES
D Step-Down Controller for Applications With
up to 95% Efficiency
D 1.8-V to 6.5-V Operating Input Voltage Range
D Adjustable Output Voltage Range From 1.2 V
D
to VI
High Efficiency Over a Wide Load Current
Range
Low Power DSP Supply
Digital Cameras
Hard Disk Drives
Portable Audio Players
DESCRIPTION
The TPS6420x are nonsynchronous step-down
controllers that are ideally suited for systems powered
from a 5-V or 3.3-V bus or for applications powered from
a 1-cell Li-Ion battery or from a 2- to 4-cell NiCd, NiMH, or
alkaline battery. These step-down controllers drive an
external P-channel MOSFET allowing design flexibility. To
achieve highest efficiency over a wide load current range,
this controller uses a minimum on time, minimum off time
control scheme and consumes only 20-µA quiescent
current. The minimum on time of typically 600 ns
(TPS64203) allows the use of small inductors and
capacitors. When disabled, the current consumption is
reduced to less than 1 µA. The TPS6420x is available in
the 6-pin SOT23 (DBV) package and operates over a free
air temperature range of −40°C to 85°C.
D 100% Maximum Duty Cycle for Lowest
Dropout
D
D
D
D
D
D
D
D
Internal Softstart
20-µA Quiescent Current (Typical)
Overcurrent Protected
Available in a SOT23 Package
APPLICATIONS
D USB Powered Peripherals
D Organizers, PDAs, and Handheld PCs
TYPICAL APPLICATION CIRCUIT
TPS64200
EFFICIENCY
vs
LOAD CURRENT
5V
100
Rs = 33 mΩ
10 µF
90
TPS64200
SW
2
EN
GND
6
VIN
5
3
FB ISENSE
4
ZHCS2000
Si5447DC
10 µH
80
R1
620 kΩ
R2
360 kΩ
47 µF
PosCap
6TPA47M
VI = 4.2 V
70
3.3 V / 2 A
Efficiency − %
1
60
50
40
30
20
10
TA = 25°C,
VO = 3.3 V
0
0.0001
0.001
0.01
0.1
IO − Load Current − A
1
10
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
!"# $"%&! '#( '"!
! $#!! $# )# # #* "# '' +,(
'"! $!#- '# #!#&, !&"'# #- && $##(
Copyright  2003, Texas Instruments Incorporated
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during
storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
PLASTIC SOT23-6(1) (2)
(DBV)
OUTPUT VOLTAGE
MINIMUM ON-TIME
MINIMUM OFF-TIME
MARKING
Adjustable
1.2 V to VI
Adjustable
1.2 V to VI
ON time = 1.6 µs
OFF time = 600 ns
PJAI
Variable minimum on time
OFF time = 600 ns
PJBI
OFF time = 300 ns
PJCI
OFF time = 600 ns
PJDI
TPS64200DBVR
TPS64201DBVR
Adjustable
Variable minimum on time
1.2 V to VI
Adjustable
TPS64203DBVR
ON time = 600 ns
1.2 V to VI
(1) The R suffix indicates shipment in tape and reel with 3000 units per reel.
(2) The T suffix indicates a mini reel with 250 units per reel.
TPS64202DBVR
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1)
Supply voltage, VIN
−0.3 V to 7 V
Voltage at EN, SW, ISENSE
−0.3 V to VIN
Voltage at FB
−0.3 V to 3.3 V
Maximum junction temperature, TJ
150°C
Operating free−air temperature, TA
−40°C to 85°C
Storage temperature, Tsgt
−65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
300°C
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
PACKAGE DISSIPATION RATINGS
PACKAGE
TA ≤255C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
4 mW/°C
TA = 705C
POWER RATING
SOT23−6
400 mW
:
NOTE The thermal resistance junction to ambient of the 6−pin SOT23 package is 250°C/W.
TA = 855C
POWER RATING
220 mW
180 mW
RECOMMENDED OPERATING CONDITIONS
MIN
NOM
MAX
UNIT
Supply voltage at VIN
1.8
6.5
V
Operating junction temperature
−40
125
°C
2
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ELECTRICAL CHARACTERISTICS
VIN = 3.8 V, VO = 3.3 V, EN = VIN, TA = −40°C to 85°C (unless otherwise noted)
SUPPLY CURRENT
PARAMETER
VI
I(Q)
Operating quiescent current
I(SD)
Shutdown current
OUTPUT/CURRENT LIMIT
VO
VFB
TEST CONDITIONS
Input voltage range
MIN
IO = 0 mA
EN = VI
Adjustable output voltage range
MAX
V
20
35
µA
0.1
1
µA
VI
V
0.01
0.2
µA
+2
%
105
120
mV
0.01
0.2
µA
1.213
Feedback voltage tolerance
−2
V(ISENSE) Reference voltage for current limit
ISENSE leakage current
90
UNIT
6.5
VFB
Feedback voltage
Feedback leakage current
η
TYP
1.8
V
Line regulation
Measured with circuit according to Figure 1
0.6
%/V
Load regulation
Measured with circuit according to Figure 1
VI = 3.8 V
0.6
%/A
Measured with circuit according to Figure 1
VI = 3.8 V, VO = 3.3 V, IO = 1000 mA
94%
Measured with circuit according to Figure 1
VI = 3.8 V, VO = 1.2 V, IO = 800 mA
80%
IO = 0 mA, Time from active EN to VO,
CO = 47 µF
0.25
Efficiency
Start-up time
ms
GATE DRIVER (SW-PIN)
P-channel MOSFET on-resistance
VI ≥ 2.5 V
VI = 1.8 V
4
rDS(ON)
N-channel MOSFET on-resistance
VI ≥ 2.5 V
VI = 1.8 V
4
rDS(ON)
IO
ENABLE
Maximum gate drive output current, SW
VIH
VIL
EN high level input voltage
Device is off
EN low level input voltage
Device is operating
EN input leakage current
Ω
6
150
1.3
115
EN = GND or VIN
0.01
Undervoltage lockout threshold
mA
V
0.3
EN trip point hysteresis
Ilkg
V(UVLO)
Ω
6
V
mV
0.2
1.7
µA
V
ON TIME and OFF TIME
ton
toff
Minimum on time
TPS64200, TPS64201, TPS64202
1.36
1.6
1.84
TPS64203 only
0.56
0.65
0.74
µss
Reduced on time 1
TPS64201,TPS64202
0.80
µs
Reduced on time 2
TPS64201,TPS64202
0.40
µs
Reduced on time 3
TPS64201,TPS64202
Minimum off time
µs
0.20
TPS64200,TPS64201, TPS64203
0.44
0.55
0.66
TPS64202 only
0.24
0.3
0.36
µss
3
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PIN ASSIGNMENTS
DBV PACKAGE
(TOP VIEW)
EN
1
6
SW
GND
2
5
VIN
FB
3
4
ISENSE
Terminal Functions
TERMINAL
NAME
NO.
I/O
DESCRIPTION
EN
1
I
Enable. A logic low enables the converter, logic high forces the device into shutdown mode reducing the supply current
to less than 1 µA.
FB
3
I
Feedback pin. Connect an external voltage divider to this pin to set the output voltage.
GND
2
I
Ground
SW
6
O
This pin connects to the gate of an external P-channel MOSFET.
ISENSE
4
I
Current sense input. Connect the current sense resistor between VIN and ISENSE. (optional)
VIN
5
I
Supply voltage input
FUNCTIONAL BLOCK DIAGRAM
VIN
EN
105 mV
ISense
+
_
Overcurrent
Comparator
Softstart
FB
+
_
Regulation
Comparator
Vref
GND
4
Minimum ton
Timer
(0.2 µs, 0.4 µs,
0.8 µs, 1.6 µs)
Minimum toff
Timer
(0.6 µs, 0.3 µs,)
ton Regulation
Timer
(3 µs, 15 µs, 16 µs)
Logic
M
U
X
Driver
R
Q
S
ton
Regulator
SW
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TYPICAL CHARACTERISTICS
All graphs were generated using the circuit as shown unless otherwise noted. For output voltages other than
3.3 V, the output voltage divider was changed accordingly. Graphs for the TPS64203 were taken using the
application circuit shown in Figure 25.
VI
R(ISENSE) = 33 mΩ
CI
10 µF
X7R
TPS6420x
1
2
3
EN
SW
GND
VIN
FB ISENSE
6
Si5447DC
5
CDRH 103R−100
4
VO
10 µH
MBRM120LT3
R1
620 kΩ
Cff
4.7 pF
Co
47 µF PosCap
6TPA47M
R2
360 kΩ
Figure 1. Basic Application Circuit For a 2-A Step-Down Converter
TABLE OF GRAPHS
FIGURE
η
Efficiency
vs Load current
2−5
Output voltage
vs Output current
6−9
Switching frequency
vs Output current
10 − 13
Operating quiescent current
vs Input voltage
Output voltage ripple
14
15
Line transient response
Using circuit according to Figure 1
16
Load transient response
Using circuit according to Figure 1
17
Start-up timing
Using circuit according to Figure 1
18
5
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100
TPS64200
TPS64201
EFFICIENCY
vs
LOAD CURRENT
EFFICIENCY
vs
LOAD CURRENT
100
VI = 3.6 V
VI = 4.2 V
80
Efficiency − %
Efficiency − %
70
60
50
40
VI = 6 V
50
40
30
20
20
TA = 25°C,
VO = 3.3 V
0.001
0.01
0.1
IO − Load Current − A
1
VI = 5 V
60
30
10
VI = 4.2 V
80
VI = 5 V
VI = 6 V
70
0
0.0001
VI = 3.6 V
90
90
TA = 25°C,
VO = 3.3 V
10
0
0.0001
10
0.001
Figure 2
TPS64202
TPS64203
EFFICIENCY
vs
LOAD CURRENT
EFFICIENCY
vs
LOAD CURRENT
90
90
80
VI = 1.8 V
VI = 2.5 V
Efficiency − %
70
VI = 6 V
60
TA = 25°C,
VO = 1.2 V
80
VI = 4.2 V
VI = 5 V
70
Efficiency − %
10
100
VI = 3.6 V
50
40
VI = 3.6 V
60
VI = 6 V
50
VI = 5 V
40
30
30
20
20
TA = 25°C,
VO = 3.3 V
10
0.001
0.01
0.1
IO − Load Current − A
Figure 4
6
1
Figure 3
100
0
0.0001
0.01
0.1
IO − Load Current − A
1
10
10
0
0.0001
0.001
0.01
0.1
IO − Load Current − A
Figure 5
1
10
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SLVS485 − AUGUST 2003
TPS64200
TPS64201
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
3.40
3.40
TA = 25°C,
VO = 3.3 V
3.38
VO − Output Voltage − V
VI = 4.2 V
VI = 6 V
3.34
3.32
3.30
VI = 3.6 V
3.28
3.26
10
VI = 3.6 V
3.28
3.26
3.22
1
VI = 4.2 V
3.30
3.22
0.01
0.1
IO − Output Current − A
VI = 5 V
3.32
3.24
0.001
VI = 6 V
3.34
3.24
3.20
0.0001
TA = 25°C,
VO = 3.3 V
3.36
VI = 5 V
3.36
VO − Output Voltage − V
3.38
3.20
0.0001
0.001
0.01
0.1
IO − Output Current − A
Figure 6
1
10
Figure 7
TPS64202
TPS64203
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
3.40
3.38
TA = 25°C,
VO = 3.3 V
1.29
VI = 6 V
VI = 5 V
1.27
VO − Output Voltage − V
VO − Output Voltage − V
3.36
TA = 25°C,
VO = 1.2 V
3.34
3.32
3.30
VI = 3.6 V
3.28
VI = 4.2 V
3.26
1.25
VI = 3.6 V
VI = 5 V
VI = 6 V
1.23
1.21
VI = 1.8 V
1.19
VI = 2.5 V
3.24
1.17
3.22
3.20
0.0001
0.001
0.01
0.1
IO − Output Current − A
Figure 8
1
10
1.15
0.0001
0.001
0.01
0.1
IO − Output Current − A
1
10
Figure 9
7
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TPS64200
TPS64201
SWITCHING FREQUENCY
vs
OUTPUT CURRENT
SWITCHING FREQUENCY
vs
OUTPUT CURRENT
500
400
VO = 3.3 V
VO = 3.3 V
VI = 5 V
450
350
400
250
f − Frequency − kHz
f − Frequency − kHz
300
VO = 1.2 V
200
150
VI = 5 V
350
300
250
VO = 1.2 V
200
150
100
100
50
50
0
0.001
0.01
0.1
1
0
0.001
10
IO − Output Current − A
0.01
Figure 10
1
TPS64202
TPS64203
SWITCHING FREQUENCY
vs
OUTPUT CURRENT
SWITCHING FREQUENCY
vs
OUTPUT CURRENT
900
VI = 4.2 V
VI = 3.8 V
10
Figure 11
600
550
0.1
IO − Output Current − A
VI = 5 V
800
500
700
400
f − Frequency − kHz
f − Frequency − kHz
450
350
300
250
200
150
50
500
VO = 1.2 V
400
300
100
VO = 3.3 V
0
0.001
0.01
0.1
IO − Output Current − A
Figure 12
8
VO = 3.3 V,
Cff = 165 pF
200
VI = 3.8 V,
Cff = 165 pF
100
600
1
10
0
0.001
0.01
0.1
1
IO − Output Current − A
Figure 13
10
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SLVS485 − AUGUST 2003
TPS642000
OPERATING QUIESCENT CURRENT
vs
INPUT VOLTAGE
TPS64200
OUTPUT VOLTAGE RIPPLE
VI = 3.8 V,
VO = 1.2 V,
RL = 1.2 Ω,
TA = 25°C
35
TA = 25°C
TA = 85°C
20 mV/Div
30
TA = −40°C
25
VO
20
I(coil)
15
10
5
0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
6.5
2 ms/Div
VI − Input Voltage − V
Figure 14
Figure 15
TPS64200
TPS64203
LINE TRANSIENT RESPONSE
LOAD TRANSIENT RESPONSE
VI = 3.8 V to 5 V,
VO = 1.2 V,
RL = 1.2 Ω,
TA = 25°C
VI
1 A/Div
IO
VI = 5 V,
VO = 3.3 V,
IL = 200 mA to 1800 mA,
TA = 25°C
VO
50 mV/Div
20 mV/Div
1 V/Div
IO = 1000 mA
200 mA/Div
IQ − Operating Quiescent Current − µ A
40
40 ms/Div
Figure 16
VO
50 ms/Div
Figure 17
9
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SLVS485 − AUGUST 2003
TPS64200
STARTUP TIMING
EN
VO
II
I(Inductor)
VI = 3.8 V,
VO = 3.3 V,
RL = 1.66 Ω,
TA = 25°C
100 ms/Div
Figure 18
DETAILED DESCRIPTION
Operation
The TPS6420x is a nonsynchronous step-down controller which is operating with a minimum on-time/minimum
off-time control. An external PMOS is turned on until the output voltage reaches its nominal value or the current
limit is exceeded. If the current limit is exceeded, the PMOS is switched off and stays off for the minimum
off-time. After that the PMOS is switched on again. When the nominal output voltage is reached, the PMOS
is switched off and stays off until the output voltage dropped below its nominal value.
Operating Modes
When delivering low or medium output current, the TPS6420x operate in discontinuous mode. With every
switching cycle, the current in the inductor starts at zero, rises to a maximum value and ramps down to zero
again. As soon as the current in the inductor drops to zero, ringing occurs at the resonant frequency of the
inductor and stray capacitance, due to residual energy in the inductor when the diode turns off. Ringing in
discontinuous mode is normal and does not have any influence on efficiency. The ringing does not contain much
energy and can easily be damped by an RC snubber. See the application section for further details.
With high output current, the TPS6420x operate in continuous current mode. In this mode, the inductor current
does not drop to zero within one switching cycle. The output voltage in continuous mode is directly dependant
on the duty cycle of the switch.
Variable Minimum On-Time (TPS64201 to TPS64202 Only)
The minimum on-time of the device is 1.6 µs. At light loads, this would cause a low switching frequency in the
audible range because the energy transferred to the output during the on-time would cause a higher rise in the
output voltage than needed and therefore lead to a long off−time until the output voltage dropped again. To avoid
a switching frequency in the audible range the TPS64201 and TPS64202 can internally reduce the minimum
on time in three steps from 1.6 µs to 800 ns, 400 ns and 200 ns. The on-time is reduced by one step if the
switching frequency dropped to a lower value than 50 kHz. This keeps the frequency above the audio frequency
over a wide load range and also keeps the output voltage ripple low.
10
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SLVS485 − AUGUST 2003
Soft Start
The TPS6420x has an internal soft start circuit that limits the inrush current during start up. This prevents
possible voltage drops of the input voltage in case a battery or a high impedance power source is connected
to the input of the TPS6420x. During soft start the current limit is increased from 25% of its maximum to the
maximum within about 250 µs.
100% Duty Cycle Low Dropout Operation
The TPS6420x offers the lowest possible input to output voltage difference while still maintaining regulation with
the use of the 100% duty cycle mode. In this mode the P-channel switch is constantly turned on. This is
particularly useful in battery powered applications to achieve longest operation time by taking full advantage
of the whole battery voltage range.
Enable
A voltage higher than the EN trip point of 1.3 V up to the input voltage forces the TPS64200 into shutdown. In
shutdown, the power switch, drivers, voltage reference, oscillator, and all other functions are turned off. The
supply current is reduced to less than 1 µA in shutdown. Pulling enable low starts up the TPS64200 with the
softstart as described under the chapter softstart.
Undervoltage Lockout
The undervoltage lockout circuit prevents the device from misoperation at low input voltages. Basically, it
prevents the converter from turning on the external PMOS under undefined conditions.
Current Limit
The ISENSE input is used to set the current limit for the external PMOS. The sense resistor must be connected
between VI and source of the external PMOS. The ISENSE pin is connected to the source of the external
PMOS. The maximum current is calculated by:
V
I
(cur lim)
+
(ISENSE)
R
S
(1)
For low cost solutions the rDS(on) of the external PMOS can also be used to set the current limit. In this case
the ISENSE pin is connected to the drain of the PMOS. The current in the PMOS is automatically sampled by
the TPS6420x some 10 ns after the PMOS is turned on. The ISENSE pin should always be connected to either
the source of the PMOS or the drain if an additional sense resistor is used. Otherwise there is no working
overcurrent protection and no soft start in the system. The maximum drain current if the rDS(on) is used as a
sense resistor is calculated by:
V
I
(cur lim)
+
(ISENSE)
r
DS(on)
(2)
Short-Circuit Protection
With a controller only limited short circuit protection is possible because the temperature of the external
components is not supervised. In an overload condition, the current in the external diode may exceed the
maximum rating. To protect the diode against overcurrent, the off-time of the TPS6420x is increased when the
voltage at the feedback pin is lower than its nominal value. The off-time when the output is shorted (feedback
voltage is zero) is about 4 µs. This allows the current in the external diode to drop until the PMOS is turned on
again and the overcurrent protection switches off the PMOS again. The off-time is directly proportional to the
voltage at feedback.
11
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THEORY OF OPERATION
The basic application circuit for the TPS64200 is shown in Figure 1. External component selection is driven by
the load requirement. It begins with the selection of the current sense resistor R(ISENSE) followed by the output
diode, the inductor L, and the output and input capacitors. The inductor is chosen based on the desired amount
of ripple current and switching frequency. The output capacitor is chosen large enough to meet the required
output ripple and transient requirements. The ESR of the output capacitor is needed for stability of the converter.
Therefore, an output capacitor with a certain amount of ESR is needed for the standard application circuit. See
the application information for more details. The input capacitor must be capable of handling the required RMS
input current.
Setting the Inductor Current Limit
The ISENSE pin is connected to an internal current comparator with a threshold of 120 mV/R(ISENSE). The current
comparator sets the peak inductor current. As the current limit is intended to protect the external PMOS the
limit must not be reached in normal operation. Set the current limit to about 1.3 times the maximum output
current or higher if desired. This takes into account a certain amount of inductor current ripple. The current limit
may also influence the start-up time when the current limit is exceeded during start up.
V
R
(ISENSE)
v
min IO — maximum output current in continuous conduction mode
(ISENSE)
V(ISENSE), min = 90 mV
1.3 I
(3)
O
The current sense resistor’s power rating should be:
P
(ISENSE)
ǒV(ISENSE) maxǓ
w
R
2
V(ISENSE), max = 120 mV
(4)
(ISENSE)
Setting the Output Voltage
The output voltage of the TPS64200 to TPS64202 can be set using an external resistor divider. The sum of
R1 and R2 should not exceed 1 MΩ to keep the influence of leakage current into the feedback pin low.
V
O
+V
FB
R1 ) R2
R2
ǒ Ǔ
V
R1 + R2
V
O
* R2 with VFB = 1.2 V
(5)
FB
In some applications, depending on the layout, the capacitance may be too high from FB to GND. In this case,
the internal comparator may not switch fast enough to operate with the minimum on-time or the minimum
off-time given in this data sheet. For such applications a feedforward capacitor (Cff) in the range of 4.7 pF to
47 pF (typical) is added in parallel with R1 to speed up the comparator. Choose a capacitor value that is high
enough that the device turns on the PMOS for its minimum on-time with no load at the output.
Selecting the Input Capacitor
The input capacitor is used to reduce peak currents drawn from the power source and reduces noise and voltage
ripple on the input of the converter, caused by its switching action. Use low ESR tantalum capacitors or
preferably X5R or X7R ceramic capacitors with a voltage rating higher than the maximum supply voltage in the
application. In continuous conduction mode, the input capacitor must handle an rms-current which is given by:
I
Cin(rms)
[I
O
Ǹ
V
O
V , min
I
(6)
Select the input capacitor according to the calculated rms-input current requirements and according to the
maximum voltage ripple. Use a minimum value of 10 µF:
ǒ Ǔ
2
ǒ
1 L
1 L
0.3
DI
2
L
2
C , min +
[
I
V
V
V
(ripple)
I
(ripple)
12
I
Ǔ
O
V
I
2
with: V(ripple) − voltage ripple at CI
∆IL − inductor current ripple
(7)
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SLVS485 − AUGUST 2003
For a first approximation use:
L = 10 µH
V(ripple) = 150 mV (verify in the application)
Selecting the Inductor Value
The main parameters when choosing the inductor are current rating and inductance. The inductance mainly
determines the inductor current ripple. The TPS6420x operates with a wide range of inductor values. Values
between 4.7 µH and 47 µH work in most applications. Select an inductor with a current rating exceeding the
limit set by R(ISENSE) or rDS(on). The first step in inductor design is to determine the operating mode of the
TPS64200. The device can either work with minimum-on-time or minimum-off-time, depending on input voltage
and output voltage.
The device works with minimum-on-time if:
t
V *V *I
I
O
O
r
DS(on)
*R
RL
xI
w
O
off
, min
ǒVO ) VSCHOTTKY ) RRL
I
O
Ǔ
t on, min
(8)
with RRL − inductor resistance
L+V
with
DI
Dt
For minimum-on-time:
ǒVI–VO–IO
L+
r
–R
DS(on) RL
DI
I
O
Ǔ
t on, min
with: ∆I ≤ 0.3 × IO
(9)
For minimum-off-time:
L+
ǒVO ) VSCHOTTKY ) RRL
I
O
Ǔ
t
off
, min
(10)
DI
Table 1. List of Inductors Tested With the TPS6420x
MANUFACTURER
TYPE
INDUCTANCE
DC RESISTANCE
SATURATION CURRENT
TDK
SLF7032T−100M1R4
10 µH ±20%
53 mΩ ±20%
1.4 A
TDK
SLF6025−150MR88
15 µH ±20%
85 mΩ ±20%
0.88 A
Sumida
CDRH6D28−5R0
5 µH
23 mΩ
2.4 A
Sumida
CDRH103R−100
10 µH
45 mΩ
2.4 A
Sumida
CDRH4D28−100
10 µH
95 mΩ
1.0 A
Sumida
CDRH5D18−6R2
6.2 µH
71 mΩ
1.4 A
Coilcraft
DO3316P−472
4.7 µH
18 mΩ
5.4 A
Coilcraft
DT3316P−153
15 µH
60 mΩ
1.8 A
Coilcraft
DT3316P−223
22 µH
84 mΩ
1.5 A
Wurth
744 052 006
6.2 µH
80 mΩ
1.45 A
Wurth
74451115
15 µH
90 mΩ
0.8 A
13
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SLVS485 − AUGUST 2003
Selecting the External PMOS
An external PMOS must be used for a step-down converter with the TPS64200. The selection criteria for the
PMOS are threshold voltage, rDS(on), gate charge and current and voltage rating. Since the TPS64200 can
operate down to 1.8 V, the external PMOS must have a VGS(th) much lower than that if it is operated with such
a low voltage. As the gate of the PMOS finds the full supply voltage applied to the TPS64200, the PMOS must
be able to handle that voltage at the gate. The drain to source breakdown voltage rating should be at least a
few volts higher than the supply voltage in the application. The rms-current in the PMOS assuming low inductor
current ripple and continuous conduction mode, is:
I
PMOS(rms)
[ I ǸD + I
O
O
Ǹ
V
O
V
I
(11)
The power dissipated in the PMOS is comprised of conduction losses and switching losses. The conduction
losses are a function of the rms−current in the PMOS and the rDS(on) at a given temperature. They are calculated
using:
P
ǒ
Ǔ
+ I ǸD
(cond)
O
ǒ1 ) TC ƪTJ–25°CƫǓ [ ǒIO ǸDǓ
2
r
DS(on)
2
r
DS(on)
(12)
with TC = 0.005/°C
Table 2. PMOS Transistors Used in the Application Section
TYPE
MANUFACTURER
ID
PACKAGE
Vishay Siliconix
rDS(on)
0.11 Ω at VGS = −2.5 V
VDS
Si5447DC
−20 V
−3.5 A at 25°C
1206
Si5475DC
Vishay Siliconix
0.041 Ω at VGS = −2.5 V
−12 V
−6.6 A at 25°C
1206
Si2301ADS
Vishay Siliconix
0.19 Ω at VGS = −2.5 V
−20 V
−1.4 A at 25°C
SOT23
Si2323DS
Vishay Siliconix
0.41 Ω at VGS = −2.5 V
−20 V
−4.1 A at 25°C
SOT23
FDG326P
Fairchild
0.17 Ω at VGS = −2.5 V
−20 V
−1.5 A
SC70
Selecting the Output Diode
The output diode conducts in the off phase of the PMOS and carries the full output current. The high switching
frequency demands a high-speed rectifier. Schottky diodes are recommended for best performance. Make sure
that the peak current rating of the diode exceeds the peak current limit set by the sense resistor R(ISENSE) or
rDS(on). Select a Schottky diode with a low reverse leakage current to avoid an increased supply current. The
average current in the diode in continuous conduction mode, assuming low inductor current ripple, is:
I
(diode)(Avg)
ǒ Ǔ
V
[ I (1–D) + I
1– O
O
O
V
I
(13)
Table 3. Tested Diodes
14
TYPE
MANUFACTURER
VR
IF
PACKAGE
MBRM120LT3
On Semiconductor
MBR0530T1
On Semiconductor
20 V
1A
DO216AA
30 V
0.5 A
ZHCS2000TA
SOD123
Zetex
40 V
2A
SOT23−6
B320
Diodes Inc.
20 V
3A
SMA
www.ti.com
SLVS485 − AUGUST 2003
Selecting the Output Capacitor
The value of the output capacitor depends on the output voltage ripple requirements as well as the maximum
voltage deviation during a load transient. The TPS6420x require a certain ESR value for proper operation. Low
ESR tantalum capacitors or PosCap work best in the application. A ceramic capacitor with up 1 µF may be used
in parallel for filtering short spikes. The output voltage ripple is a function of both the output capacitance and
the ESR value of the capacitor. For a switching frequency which is used with the TPS6420x, the voltage ripple
is typically between 90% and 95% due to the ESR value.
ƪ
DV pp + DI
ESR )
ǒ
1
C
O
8
ƒ
Ǔƫ
[ 1.1 DI
ESR
(14)
DV pp
(15)
1.1 DI
The output capacitance typically increases with load transient requirements. For a load step from zero output
current to its maximum, the following equation can be used to calculate the output capacitance:
ESR, max [
DI
L
2
O
C +
O
(V * V ) x DV
I
O
(16)
Table 4. Capacitors Used in the Application
TYPE
MANUFACTURER
CAPACITANCE
ESR
VOLTAGE RATING
6TPB47M (PosCap)
Sanyo
47 µF
0.1 Ω
6.3 V
T491D476M010AS
Kemet
47 µF
0.8 Ω
10 V
B45197A
Epcos
47 µF
0.175 Ω
16 V
B45294−R1107−M40
Epcos
100 µF
0.045 Ω
6.3 V
594D476X0016C2
Vishay
47 µF
0.11 Ω
16 V
Output Voltage Ripple
Output voltage ripple causes the output voltage to be higher or lower than set by the resistor divider at the
feedback pin. If the application runs with minimum on-time, the ripple (half of the peak-to-peak value) adds to
the output voltage. In an application which runs with minimum off-time, the output voltage is lower by the amount
of ripple (half of the peak-to-peak value) at the output.
Snubber Design
For low output current, the TPS6420x work in discontinuous current mode. When the current in the inductor
drops to zero, the inductor and parasitic capacitance form a resonant circuit, which causes oscillations when
both, diode and PMOS do not conduct at the end of each switching cycle. The oscillation can easily be damped
by a RC-snubber. The first step in the snubber design is to measure the oscillation frequency of the sine wave.
Then, a capacitor has to be connected in parallel to the Schottky diode which causes the frequency to drop to
half of its original value. The resistor is selected for optimum transient response (aperiodic).
R + 2pfL
f − measured resonant frequency
L − inductance used
(17)
Selecting the Right Device for the Application
The TPS6420x step-down controllers either operate with a fixed on-time or a fixed off-time control. It mainly
depends on the input voltage to output voltage ratio if the switching frequency is determined by the
minimum-on-time or the minimum-off-time. To select the right device for an application see the table below:
INPUT TO OUTPUT VOLTAGE RATIO
VI >> VO (e.g. VI = 5 V VO = 1.5 V)
VI ≈ VO (e.g. VI = 3.8 V VO = 3.3 V)
SWITCHING FREQUENCY
DETERMINED BY
PROPOSED DEVICE FOR
HIGH SWITCHING
FREQUENCY
PROPOSED DEVICE FOR
LOW SWITCHING
FREQUENCY
Minimum on−time
TPS64203
TPS64200, TPS64201
Minimum off−time
TPS64202
TPS64200, TPS64201
15
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SLVS485 − AUGUST 2003
APPLICATION INFORMATION
Li-lon
3.3 V to 4.2 V
R(ISENSE) = 33 mΩ
CIN
10 µF
TPS64202
1
2
3
EN
SW
GND
VIN
FB ISENSE
6
Si5475DC
5
CDRH6D28-5R0
4
3.3 V / 2 A
5 µH
MBRM120LT3
R1
620 kΩ
Cff
4.7 pF
Co
47 mF PosCap
6TPA47M
R2
360 kΩ
Figure 19. Application For a Li-Ion to 3.3-V / 2-A Conversion
The TPS64202 was used for this application because for a low input to output voltage difference, the switching
frequency is determined by the minimum off-time. The TPS64202 with its minimum off-time of 300 ns provides
a higher switching frequency compared to the other members of the TPS6420x family.
Li-lon
3.3 V to 4.2 V
CIN
10 µF
TPS64202
1
2
3
EN
SW
GND
VIN
FB ISENSE
6
5
4
MBRM120LT3
Si5475DC
CDRH6D28-5R0
5 µH R1
620 kΩ
R3
150 Ω
C3
470 pF
3.3 V / 2 A
Cff
4.7 pF
R2
360 kΩ
Co
47 mF PosCap
6TPA47M
Figure 20. Application For a Li-Ion to 3.3-V / 2-A Conversion Using rDS(on) Sense and RC Snubber
Network For the Schottky Diode
16
www.ti.com
SLVS485 − AUGUST 2003
DESIGN EXAMPLE FOR AN APPLICATION USING A LI-ION CELL (3.3 V TO 4.2 V) TO
GENERATE 3.3 V/500 mA
1. Calculate the sense resistor for the current limit:
V
R
(ISENSE)
v
min
(ISENSE)
+ 90 mV + 138 mW
1.3 I
1.3 0.5 A
O
(18)
Choose the next lower standard value : R(ISENSE) = 120 mΩ. Verify the inductor current ripple after the inductor
has been determined in step 5.
If the rDS(on) of the PMOS is used to sense the inductor current, a PMOS with less than 138 mΩ must be used
for the application.
2. Calculate the resistors for the output voltage divider using VO = 3.3 V and VFB = 1.21 V
R1 + R2
ǒ Ǔ
V
V
O
–R2 + 1.72
(19)
R2
FB
Choose R2 = 360 kΩ, and then get R1 = 619 kΩ. Select the next standard value: R1 = 620 kΩ
3. Select the external PMOS
For a Li-Ion to 3.3-V conversion, the minimum input voltage is 3.3 V. Therefore, the converter runs in 100%
mode (duty cycle=1) and the maximum PMOS current is equal to the output current.
I
(PMOS)
+I
O
+ 0.5 A
(20)
The Si2301ADS is selected for this application because it meets the requirements when an external sense
resistor is used. Otherwise a PMOS with less rDS(on) must be selected.
Verify the maximum power dissipation of the PMOS using:
P
(cond)
ǒ OǓ
2
+ I
r
DS(on)
+ (0.5 A) 2
0.19 W + 48 mW
(21)
4. Select the external diode
For the Schottky diode, the worst case current is at high input voltage (4.2 V for a Li-Ion cell).
I
(diode)(Avg)
[I
ǒ Ǔ
V
1– O
O
V
I
+I
O
VǓ + 0.11 A
ǒ1– 3.3
4.2 V
(22)
The MBR0530T1 is selected because it meets the voltage and current requirements. The forward voltage is
about 0.3 V. Do not use a Schottky diode which is much larger than required as it also typically has more leakage
current and capacitance which reduces efficiency.
5. Calculate the inductor value.
If the output voltage is close to the input voltage, the switching frequency is determined by the minimum off-time.
Therefore, the TPS64202 is used for the maximum switching frequency possible. Allow an inductor ripple
current of 0.3 × IO for the application. For the inductor, a series resistance of 100 mΩ is assumed.
For minimum-off-time, the inductor value is:
L+
ǒVO ) V(SCHOTTKY) ) RRL
DI
I
Ǔ
O
(23)
t
off
, min
+
(3.3 V ) 0.3 V ) 0.05 V)
0.3 0.5 A
0.3 ms
+ 7.3 mH
For a low inductor current ripple, select the next available larger inductor with L = 10 µH. This provides an
inductor ripple current of 110 mA (peak-to-peak).
17
www.ti.com
SLVS485 − AUGUST 2003
DI +
ǒVO ) V(SCHOTTKY) ) RRL
I
O
Ǔ
t
off
, min
L
+ 110 mA
(24)
The current rating for the inductor must be:
I, inductor u I
O
) DI + 555 mA
2
(25)
6. Select the input and output capacitor
The output capacitor is selected for an output voltage ripple of less than 20 mVpp.
With
ESR, max [
DV pp
1.1
DI
+
1.1
0.02 V
+ 165 mW
0.11 A
(26)
A 47-µF PosCap with an ESR of 100 mΩ was selected to meet the ripple requirements.
The input capacitor was selected to its minimum value of 10 µF.
1 Li-lon Cell
R(ISENSE) = 120 mΩ
10 µF
TPS64202
1
2
3
EN
SW
GND
VIN
FB ISENSE
6
Si2301DS
5
CDRH4D18-100
4
10 µH
MBR0530T1
3.3 V / 0.5 A
R1
620 kΩ
47 µF PosCap
6TPA47M
R2
360 kΩ
Figure 21. Application Circuit
18
www.ti.com
SLVS485 − AUGUST 2003
5V
R(ISENSE) = 33 mΩ
10 µF
TPS64200
1
2
3
EN
SW
GND
VIN
FB ISENSE
6
Si5447DC
5
CDRH103R-100
4
3.3 V / 2 A
10 µH
ZHCS200
R1
620 kΩ
47 mF PosCap
6TPA47M
R2
360 kΩ
Figure 22. Application For a 5-V to 3.3-V / 2-A Conversion
Inverter Using TPS64200
VI
2.7 V to 4.2 V
R(ISENSE) = 33 mΩ
10 µF
TPS64200
1
EN
6
SW
2
GND
3
FB ISENSE
Si2301DS
5
VIN
MBR0530T1
4
−5 V / 0.1 A
SW
R2
24 kΩ
R1
VI
_
OPA363
100 kΩ
CDRH4D28-100
10 µH
47 µF
X7R
+
Figure 23. Application For an Inverter Using TPS64200
19
www.ti.com
SLVS485 − AUGUST 2003
The TPS6420x can be used for an inverter. Only one additional operational amplifier is required for this
application. When the PMOS is switched on, the current in the inductor ramps up to its maximum, set by Rs.
Then the PMOS is switched off, the energy stored in the inductor is transferred to the output. The output voltage
and the maximum output current can be calculated using:
V
+ R1
O
R2
V
FB
I
O
V
max [ 0.8
–V
V
(ISENSE)
2R
(ISENSE)
I
O
(27)
OLED Power Supply
The TPS6420x can be combined with a TPS61045 boost converter for a OLED power supply.
4.7 µH
7 V / 50 mA
4.7 µF
8
1 L
SW
2
VIN
DO
5
FB
CTRL
6
GND PGND
56 kΩ
22 pF
1 µF
X7R
3
4
7
12 kΩ
TPS61045
VI
1.8 V to 5.5 V
R(ISENSE) = 150 mΩ
10 µF
TPS64200
1
2
3
EN
GND
6
SW
Si2301DS
5
VIN
MBR0530T1
4
FB ISENSE
−7 V / 50 mA
SW
R2
130 kΩ
R1
VI
_
OPA363
750 kΩ
CDRH4D28-100
10 µH
+
Figure 24. Application For a OLED Power Supply
20
47 µF
X7R
www.ti.com
SLVS485 − AUGUST 2003
5V
10 µF
X5R
TPS64203
1
2
3
EN
SW
GND
VIN
FB ISENSE
6
Si2323DS
5
Wurth 744052006
4
1.2 V / 1.2 A
6.2 µH
MBRM120LT3
100 µF/6.3 V
B45294-R1107-M40
Figure 25. Application For a 5-V to 1.2-V / 1.2-A Conversion
5V
R(ISENSE) = 20 mΩ
CIN
22 µF
TPS64202
1
2
3
EN
SW
GND
VIN
FB ISENSE
6
Si5475DC
5
4
DO3316P−472
3.3 V / 3 A
4.7 µH
B320
R1
620 kΩ
Cff
4.7 pF
R2
360 kΩ
Co
100 mF PosCap
6TPC100M
Figure 26. Application For a 5-V to 3.3-V / 3-A Conversion
21
www.ti.com
SLVS485 − AUGUST 2003
Ceramic Output Capacitor
5V
R(ISENSE) = 33 mΩ
CI
10 µF
TPS64203
1
EN
SW
6
2
GND
VIN
5
3
4
FB ISENSE
R(GATE)
10 Ω
Si5475DC
CDRH6D28-100
MBRM120LT3
10 µH R1a
680 kΩ
R1b
2.2 MΩ
3.3 V / 2 A
Cff
82 pF
R2
300 kΩ
Co
22 µF X5R
6.3 V
Figure 27. Application Using a Ceramic Output Capacitor
The control scheme of the TPS6420x usually requires an output capacitor with some tens of milliohms of ESR
for stability, which is usually the case for tantalum capacitors. This application circuit above also works with
ceramic capacitors. Resistor R1b is used to add an additional control signal to the feedback loop, which is
coupled into the FB pin. The circuit works best with R1b = 2 …4 x R1a. If the resistance of R1b is too low
compared to R1a, the more load regulation the output voltage shows, but stability is best. The advantage of
this circuit is a very low output voltage ripple and small size. The gate resistor shown can be used in every
application. It minimizes switching noise of the converter and, therefore, increases stability and provides lower
output voltage ripple. However, it decreases efficiency slightly because the rise and fall time, and the associated
losses are larger.
R1 +
1
1 ) 1
R1a R1b
R1b +
1
1 – 1
R1 R1a
(28)
Use the following equation to calculate R1a if R1b = 4R1a
R1a + 5 R1
4
22
(29)
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
TPS64200DBVR
ACTIVE
SOT-23
DBV
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
PJAI
TPS64200DBVRG4
ACTIVE
SOT-23
DBV
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
PJAI
TPS64200DBVT
ACTIVE
SOT-23
DBV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
PJAI
TPS64200DBVTG4
ACTIVE
SOT-23
DBV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
PJAI
TPS64201DBVR
ACTIVE
SOT-23
DBV
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
PJBI
TPS64201DBVRG4
ACTIVE
SOT-23
DBV
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
PJBI
TPS64201DBVT
ACTIVE
SOT-23
DBV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
PJBI
TPS64201DBVTG4
ACTIVE
SOT-23
DBV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
PJBI
TPS64202DBVR
ACTIVE
SOT-23
DBV
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
PJCI
TPS64202DBVRG4
ACTIVE
SOT-23
DBV
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
PJCI
TPS64202DBVT
ACTIVE
SOT-23
DBV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
PJCI
TPS64202DBVTG4
ACTIVE
SOT-23
DBV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
PJCI
TPS64203DBVR
ACTIVE
SOT-23
DBV
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
PJDI
TPS64203DBVRG4
ACTIVE
SOT-23
DBV
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
PJDI
TPS64203DBVT
ACTIVE
SOT-23
DBV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
PJDI
TPS64203DBVTG4
ACTIVE
SOT-23
DBV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
PJDI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
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Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Dec-2011
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
TPS64200DBVR
SOT-23
DBV
6
3000
178.0
9.0
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
3.23
3.17
1.37
4.0
8.0
Q3
TPS64200DBVT
SOT-23
DBV
6
250
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
TPS64201DBVR
SOT-23
DBV
6
3000
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
TPS64201DBVR
SOT-23
DBV
6
3000
180.0
9.0
3.15
3.2
1.4
4.0
8.0
Q3
TPS64201DBVR
SOT-23
DBV
6
3000
179.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
TPS64201DBVT
SOT-23
DBV
6
250
179.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
TPS64201DBVT
SOT-23
DBV
6
250
180.0
9.0
3.15
3.2
1.4
4.0
8.0
Q3
TPS64201DBVT
SOT-23
DBV
6
250
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
TPS64202DBVR
SOT-23
DBV
6
3000
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
TPS64202DBVT
SOT-23
DBV
6
250
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
TPS64203DBVR
SOT-23
DBV
6
3000
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
TPS64203DBVT
SOT-23
DBV
6
250
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Dec-2011
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPS64200DBVR
SOT-23
DBV
6
3000
180.0
180.0
18.0
TPS64200DBVT
SOT-23
DBV
6
250
180.0
180.0
18.0
TPS64201DBVR
SOT-23
DBV
6
3000
180.0
180.0
18.0
TPS64201DBVR
SOT-23
DBV
6
3000
182.0
182.0
20.0
TPS64201DBVR
SOT-23
DBV
6
3000
203.0
203.0
35.0
TPS64201DBVT
SOT-23
DBV
6
250
203.0
203.0
35.0
TPS64201DBVT
SOT-23
DBV
6
250
182.0
182.0
20.0
TPS64201DBVT
SOT-23
DBV
6
250
180.0
180.0
18.0
TPS64202DBVR
SOT-23
DBV
6
3000
180.0
180.0
18.0
TPS64202DBVT
SOT-23
DBV
6
250
180.0
180.0
18.0
TPS64203DBVR
SOT-23
DBV
6
3000
180.0
180.0
18.0
TPS64203DBVT
SOT-23
DBV
6
250
180.0
180.0
18.0
Pack Materials-Page 2
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