H4005 EM MICROELECTRONIC-MARIN SA ISO 11'784 / 11'785 COMPLIANT READ ONLY CONTACTLESS IDENTIFICATION DEVICE Features • • • • • • • • • • • • 128 bit memory array laser programmable Bit duration : 32 periods of RF field Bit coding according to ISO FDX-B On chip resonnance capacitor On chip supply buffer capacitor Wide dynamic range On chip voltage limiter Full wave rectifier Large modulation depth Operating frequency 100 - 150 kHz Very small chip size convenient for implantation Very low power consumption Typical Operating Configuration Coil 2 H4005 L Coil 1 Description The H4005 is a CMOS integrated circuit intented for use in electronic Read Only RF Transponders. The circuit is powered by an external coil placed in an electromagnetic field, and gets its master clock from the same field via one of the coil terminals. The other coil terminal is affected by the modulator. By turning on and off the modulation current, the chip will send back the 128 bits of information contained in a factory pre-programmed memory array. The programming of the chip is performed by laser fusing of polysilicon links in order to store a unique code on each chip. Due to the low power consumption of the logic core, no supply buffer capacitor is required. Only an external coil is needed to obtain the chip function. A parallel resonance capacitor of 75 pF is also integrated. Fig. 1 Pin Assignment VSS COIL2 H4005 COIL1 VDD Applications • Animal implantable transponder • Animal ear tag • Industrial transponder COIL 1 COIL 2 Coil terminal / Clock input Coil terminal Fig. 2 1 H4005 EM MICROELECTRONIC-MARIN SA Absolute Maximum Ratings Parameter Operating Conditions Symbol Conditions Parameter Operating Temperature Maximum AC peak Current induced on COIL1 and COIL2 ICOIL Power Supply VDD Storage temperature Tstore Electrostatic discharge maximum to MIL-STD-883C method 3015 VESD Symbol Min. Top -40 Typ. Max. Units +85 °C 10 mA ± 30 mA Maximum coil current ICOIL AC Voltage on Coil Vcoil Supply Frequency fcoil 14* Vpp -0.3 to 7.5 V 100 150 -55 to +200°C 1000 V Table 1 Stresses above these listed maximum ratings may cause permanent damage to the device. Exposure beyond specified operating conditions may affect device reliability or cause malfunction. kHz Table 2 *) The AC Voltage on Coil is limited by the on chip voltage limitation circuitry. Handling Procedures This device has built-in protection against high static voltages or electric fields; however due to the unique properties of this device, anti-static precautions should be taken as for any other CMOS component. System Principle Fig. 3 Transceiver Oscillator Transponder Antenna Driver Coil 1 H4005 Data Decoder Filter & Gain Demodulator Coil 2 Data received from transponder Signals on coils Signal on Transponder coil Signal on Transceiver coil RF Carrier Data 2 H4005 EM MICROELECTRONIC-MARIN SA Electrical Characteristics VDD = 1.5 V VSS = 0 V fcoil = 134 kHz Sine wave Top = 25°C VC1 = 1.0 V with positive peak at VDD and negative peak at VDD - 1 V Parameter Symbol Supply Voltage VDD Supply Current IDD Rectified Supply Voltage VDD unless otherwise specified Typ. Min. Test Conditions Max. Units 1.5 VC2 -VC1 = 2.8 VDC Modulator Switch = "ON" 1) V 1.5 µA 1.5 V C2 pad Modulator ON voltage drop VONC2 VDD = 1.5V IVDDC2 = 100 µA VDD = 5.0V IVDDC2 = 1 mA with ref. to VDD with ref. to VDD 0.9 2.1 1.3 3.0 V V C1 pad Modulator ON voltage drop VONC1 VDD = 5.0V IVDDC1 = 1 mA with ref. to VDD 2.1 3.0 V Coil1 - Coil2 capacitance Cres Power Supply Capacitor Csup Vcoil = 100 mVRMS f = 10 kHz 75 2) pF 150 pF 1) The maximum voltage is defined by forcing 10 mA on C1 - C2 2) The toleranceof the resonant capacitor is ± 15 % over the whole production. On a wafer basis and on process statistics, the tolerance is ± 2% Table 3 Timing Characteristics VDD = 1.5 V VSS = 0 V fcoil = 134 kHz Sine wave Top = 25°C VC1 = 1.0 V with positive peak at VDD and negative peak at VDD - 1 V unless otherwise specified Timings are derived from the field frequency and are specified as a number of RF periods. Parameter Symbol Read Bit Period Test Conditions Value Units 32 RF periods trdb Table 4 Timing Waveforms T OC Fig. 4 32 T OC COIL1 BIT n Serial Data Out Binary Data 0 BIT n+1 1 1 0 BIT n+2 1 0 0 1 Memory Output Modulator Output 3 EM MICROELECTRONIC-MARIN SA H4005 Block Diagram CLOCK EXTRACTOR Logic Clock COIL1 VDD AC1 FULL WAVE RECTIFIER Cres MEMORY ARRAY SEQUENCER Csup AC2 COIL2 VSS Serial Data out DATA MODULATOR DATA ENCODER Modulation Control Fig. 4 Functional Description General The H4005 is supplied by means of an electromagnetic field induced on the attached coil. The AC voltage is rectified in order to provide a DC internal supply voltage. When the DC voltage is sufficient the chip sends data continuously. When the last bit is sent, the chip will continue with the first bit until the power goes off. Full Wave Rectifier The AC input induced in the external coil by an incident magnetic field is rectified by a Graetz bridge. The bridge will limit the internal DC voltage to avoid malfunction in strong fields. Data Modulator The data modulator is controlled by the signal Modulation Control in order to induce a high current on COIL2 terminal when this signal is at logic "0". This will affect the magnetic field according to the data stored in the memory array. Memory The memory contains 128 bits laser programmed during manufacturing according to a customer list of codes. The bits are read serially in order to control the modulator. The 128 bits output sequence is repeated continuously until power goes off. Memory Map Clock extractor One of the coil terminals (COIL1) is used to generate the master clock for the logic function. The output of the clock extractor drives a sequencer. Sequencer The sequencer provides all necessary signals to address the memory array and to encode the serial data out. The data rate is set to 32 clocks per bit. Data Encoder The data is coded according to the FDX-B scheme. At the beginning of each bit, a transition will occur. A logic bit "1" will keep its state for the whole bit duration and a logic bit "0" will show a transition in the middle of the bit duration (refer to fig. 4). The FDX-B allows an advance of up to 8 clocks in the ON to OFF transition. Due to its low power consumption, there is no difference in performance for the H4005 when implementing a transition advance. No clock advance is provided on the standard version. 128 bit pattern ISO 11785 Send bit 1 first 1 11 12 83 84 101 102 128 Header Identification code CRC Extension 11 bits 64 + 8 bits 16 + 2 bits 24 + 3 bits National code 64 Send first Country 27 26 17 16 15 Reserved 2 1 64 bit pattern Identification code ISO 11784 Fig. 5 4 H4005 EM MICROELECTRONIC-MARIN SA Memory organisation The structure of the 128 bits is as follows : The header is sent first and is used to identify the start of the sequence. It is composed of 11 bits having a bit pattern which is unique in the data stream. 00000000001 The header is followed by the Identification code which is composed of 64 bits organised in 8 blocks of 8 bits. Each block of 8 bits is trailed by a control bit set to logic "1" to prevent that the header is reproduced in the data. Bit 64 is transmitted first. Bit 1 is a flag for animal "1" or non-animal "0" application. Bits 2-15 are a reserved code for future use. Bit 16 is a flag for additional data block "1" or no additional data block "0". Bits 17-26 ISO 3166 Numeric country code Bits 27-64 National identification code The next two 8 bit blocks contain the 16 CRC-CCITT error detection bits. LSB is transmitted first, and the 2 block are trailed with with a binary "1". The data stream with 3 blocks of 8 bits trailed with a logical "1" representing the extension bits. The extension bits are planned for future extension in which for instance information from sensors or contents of trailing pages may be stored. In the current version the standard coding will be 000000001 000000001 000000001 and the flag bit 16 of the identification code "0". Resonance Capacitor The Resonance Capacitor is integrated, and its value is typically 75 pF. Typical Capacitor Variation versus Temperature Cr Tolerance [%] 100.7 100.3 100.2 100.1 100.0 99.9 99.8 99.7 -50 -30 -10 10 30 50 Temperature [°C] 70 90 Fig. 6 Pad Description Pad 1 2 3 4 Name Function COIL2 COIL1 VDD VSS Coil Terminal 2 / Data output Coil Terminal 1 / Clock input Positive Internal Supply Voltage Negative Internal Supply Voltage 1 4 2 3 Table 5 5 H4005 EM MICROELECTRONIC-MARIN SA Package and Ordering Information Dimensions of PCB version CHIP Dimensions 1118 355 137 137 150 VSS COIL2 1016 H4005 H4005 COIL1 8.0 VDD 150 118 118 1380 137 160 4.0 137 200 1.0 1016 VSS COIL2 H4105 Bumped 325 200 COIL1 VDD 160 118 95 Dimensions in [mm] Ordering Information The H4005 is available PCB Fig. 7 in chip form without Bumps in chip form with Bumps IC Thickness : 280 µm ± 25 µm Bump Height : 25 µm ± 5 µm 600 118 Dimensions in µm Fig. 8 H4005 IC H4105 Bumped IC H4005 COB EM MICROELECTRONIC-MARIN SA cannot assume responsibility for use of any circuitry described other than circuitry entirely embodied in an EM MICROELECTRONIC-MARIN SA product. EM MICROELECTRONIC-MARIN SA reserves the right to change the circuitry and specifications without notice at any time. You are strongly urged to ensure that the information given has not been superseded by a more up to date version. © 1997 EM Microelectronic-Marin SA, 11/97 Rev. C/190 EM MICROELECTRONIC-MARIN SA , 2074 Marin, Switzerland, Tel. +41 32 755 5111, Fax +41 32 755 5403 6