JMicron/JM20330 JM20330 Serial ATA Bridge Chip Description JMicron’s JM20330 is a single chip solution for serial and parallel ATA translation. It includes the Serial ATA PHY, Link, Transport, and Parallel ATA (application layer) controller. The Serial ATA physical, link, and transport layers are compliant to Serial ATA 1.0. JM20330 supports a 1.5GHz data rate, and scalable to 3.0 GHz data rate by directly doubling the internal clock source. The application layer supports both the ATA register command set and PACKET command set, which could drive both Hard Disk Drive and ATAPI Optical Storage such as CR-ROM, CD-RW, DVD-ROM, DVD-RW, etc. The Serial ATA and the Parallel ATA application layer support both host and device operation and can be configured through a single pin. Features Serial ATA 1.0 Specification compliant Automatic Serial ATA 3.0/1.5 Gbps speed negotiation ATA/ATAPI PIO mode 0 to 4 ATA/ATAPI Ultra DMA of transfer rate 16.7, 25, 33, 48, 66, 100, 133, and 150MB/s. ATA/ATAPI LBA48 addressing mode associated with 2-byte sector count Support Serial ATA hot-plug Ultra low power consumption Work for both AC and DC couple between the transmitter and the receiver Provide specified OOB signal detection and transmission Support Spread Spectrum Clocking to reduce EMI Support 20MHz, 25MHz, 30MHz or 40MHz Reference Clock Support Partial/Slumber power management Provide adjustable TX signal amplitude and pre-emphasis level Master/Slave support Version 1.0 © JMicron 2003. All rights reserved. Quick Reference Signal Bit Rate 3.0/1.5 Gbps Spread Spectrum -3.0% to 0.0 Power Supply 3.3V and 1.8V ESD Protection 2000 V Host and Device Programmable Adj. Amplitude 2 levels Adj. Pre-emphasis 4 levels Package 64-pin TQFP Applications All SATA products Mass storage devices Optical storage Dongle bridge Storage system May 2003 Page 1 Copying prohibited. 本 社 東京都世田谷区三軒茶屋 2-11-22 サンタワーズセンタービル 〒154-8539 / TEL: 03 (3487) 8502 / FAX: 03 (3487) 8825 / e-mail: [email protected] 関西営業所 大阪市淀川区西中島 3-7-13 新大阪サクセスビルEAST 〒532-0011 / TEL: 06(6885) 1688 / FAX: 06 (6885) 1721 / JMicron/JM20330 Functional Block Diagram FIFO Transport Layer Parallel ATA Physical Layer (PHY) Link Layer RXP/RXN TXP/TXN FIFO Application Layer (ATA/ ATAPI Controller) Status and Control Register (SCR) MODE[2:0] GPIO I/F Register File GIO0 GIO1 Fig. 1 Functional Block Diagram of JM20330 Applications MODE = 0xx Status and Control Register (SCR) GPIO I/ F MODE =1xx GIO0 GIO0 GIO1 GIO1 Status and Control Register (SCR) Register File Physical Layer (PHY) Link Layer RXP/ RXN Transport Layer TXP/ TXN FIFO TXP/ TXN FIFO RXP/ RXN Application Layer (ATA/ATAPI Controller) Host Bridge Physical Layer (PHY) Link Layer FIFO Transport Layer Parallel ATA FIFO HDD/ Optical Storage Application Layer (ATA/ATAPI Controller) Device Bridge Parallel ATA PC IDE Port GPIO I/ F Register File JM30330 JM30330 Fig. 2 JM20330 Host and Device bridge system diagram Product Information Name JM20330 Description Serial ATA Bridge Chip Design Kit 1 JM20330 Data Sheet 2 JM20330 Design Guide 3 Application EVB Version 1.0 © JMicron 2003. All rights reserved. Contact Information Department Email Sales [email protected] Tech. Support [email protected] May 2003 Page 2 Copying prohibited. 本 社 東京都世田谷区三軒茶屋 2-11-22 サンタワーズセンタービル 〒154-8539 / TEL: 03 (3487) 8502 / FAX: 03 (3487) 8825 / e-mail: [email protected] 関西営業所 大阪市淀川区西中島 3-7-13 新大阪サクセスビルEAST 〒532-0011 / TEL: 06(6885) 1688 / FAX: 06 (6885) 1721 /