LYONTEK LY62W5128UV

®
LY62W5128
512K X 8 BIT LOW POWER CMOS SRAM
Rev. 1.a
REVISION HISTORY
Revision
Rev. 1.a
Description
Initial Issue
Issue Date
Jul.15.2009
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
0
®
LY62W5128
512K X 8 BIT LOW POWER CMOS SRAM
Rev. 1.a
FEATURES
GENERAL DESCRIPTION
„ Fast access time : 55ns
„ Low power consumption:
Operating current : 30mA (TYP.)
Standby current : 4μA (TYP.)
„ Single 2.7V ~ 5.5V power supply
„ All outputs TTL compatible
„ Fully static operation
„ Tri-state output
„ Data retention voltage : 1.5V (MIN.)
„ Green package available
„ Package : 32-pin 400 mil TSOP-II
The LY62W5128 is a 4,194,304-bit low power
CMOS static random access memory organized as
524,288 words by 8 bits. It is fabricated using very
high performance, high reliability CMOS technology.
Its standby current is stable within the range of
operating temperature.
The LY62W5128 is well designed for very low power
system applications, and particularly well suited for
battery back-up nonvolatile memory application.
The LY62W5128 operates from a single power
supply of 2.7V ~ 5.5V and all inputs and outputs are
fully TTL compatible
PRODUCT FAMILY
Product
Family
LY62W5128
LY62W5128(E)
LY62W5128(I)
Operating
Temperature
0 ~ 70℃
-20 ~ 80℃
-40 ~ 85℃
Vcc Range
Speed
2.7 ~ 5.5V
2.7 ~ 5.5V
2.7 ~ 5.5V
55ns
55ns
55ns
FUNCTIONAL BLOCK DIAGRAM
PIN DESCRIPTION
Vcc
Vss
A0-A18
DECODER
DQ0-DQ7
I/O DATA
CIRCUIT
CE#
WE#
OE#
CONTROL
CIRCUIT
Power Dissipation
Standby(ISB1TYP.) Operating(Icc,TYP.)
4µA
30mA
4µA
30mA
4µA
30mA
512Kx8
MEMORY ARRAY
SYMBOL
DESCRIPTION
A0 - A18
Address Inputs
DQ0 – DQ7
Data Inputs/Outputs
CE#
Chip Enable Inputs
WE#
Write Enable Input
OE#
Output Enable Input
VCC
Power Supply
VSS
Ground
NC
No Connection
COLUMN I/O
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
1
®
LY62W5128
512K X 8 BIT LOW POWER CMOS SRAM
Rev. 1.a
PIN CONFIGURATION
1
32
VCC
A16
2
31
A15
A14
3
30
A17
A12
4
29
WE#
A7
5
28
A13
A6
6
27
A8
A5
7
26
A9
A4
8
25
A11
A3
9
24
OE#
A2
10
23
A10
A1
11
22
CE#
A0
12
21
DQ7
DQ0
13
20
DQ6
DQ1
14
19
DQ5
DQ2
15
18
DQ4
VSS
16
17
DQ3
LY62W5128
A18
TSOP-II
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
2
®
LY62W5128
512K X 8 BIT LOW POWER CMOS SRAM
Rev. 1.a
ABSOLUTE MAXIMUN RATINGS*
PARAMETER
Voltage on VCC relative to VSS
Voltage on any other pin relative to VSS
SYMBOL
VT1
VT2
Operating Temperature
RATING
-0.5 to 6.5
-0.5 to VCC+0.5
0 to 70(C grade)
-20 to 80(E grade)
-40 to 85(I grade)
-65 to 150
1
50
TA
Storage Temperature
Power Dissipation
DC Output Current
TSTG
PD
IOUT
UNIT
V
V
℃
℃
W
mA
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
TRUTH TABLE
MODE
Standby
Output Disable
Read
Write
Note:
CE#
H
L
L
L
OE#
X
H
L
X
WE#
X
H
H
L
SUPPLY CURRENT
ISB1
ICC,ICC1
ICC,ICC1
ICC,ICC1
I/O OPERATION
High-Z
High-Z
DOUT
DIN
H = VIH, L = VIL, X = Don't care.
DC ELECTRICAL CHARACTERISTICS
SYMBOL
TEST CONDITION
PARAMETER
Supply Voltage
VCC
*1
Input High Voltage
VIH
*1
Input Low Voltage
VIL
Input Leakage Current
ILI
VCC ≧ VIN ≧ VSS
Output Leakage
VCC ≧ VOUT ≧ VSS,
ILO
Current
Output Disabled
Output High Voltage
VOH IOH = -1mA
Output Low Voltage
VOL
IOL = 2mA
Cycle time = Min.
ICC
CE# = 0.2V, II/O = 0mA
other pins at 0.2V or VCC - 0.2V
Average Operating
Power supply Current
Cycle time = 1µs
ICC1 CE# = 0.2V, II/O = 0mA
other pins at 0.2V or VCC - 0.2V
Standby Power
CE# ≧VCC - 0.2V or CE2≦0.2V
ISB1
Supply Current
Others at 0.2V or VCC - 0.2V
Notes:
MIN.
TYP.
2.7
3.0
0.7*Vcc
- 0.2
-1
-
*3
MAX.
5.5
VCC+0.3
0.6
1
UNIT
V
V
V
µA
-1
-
1
µA
2.4
-
-
0.4
V
V
-
30
60
mA
-
4
10
mA
-
4
50
1. VIH(max) = VCC + 3.0V for pulse width less than 10ns. VIL(min) = VSS - 3.0V for pulse width less than 10ns.
2. Over/Undershoot specifications are characterized, not 100% tested.
3. Typical values are included for reference only and are not guaranteed or tested.
Typical values are measured at VCC = VCC(TYP.) and TA = 25℃
4. 25µA for special request
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
3
*4
µA
®
LY62W5128
512K X 8 BIT LOW POWER CMOS SRAM
Rev. 1.a
CAPACITANCE (TA = 25℃, f = 1.0MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
CIN
CI/O
MIN.
-
MAX
6
8
UNIT
pF
pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
0.2V to VCC - 0.2V
3ns
1.5V
CL = 30pF + 1TTL, IOH/IOL = -2mA/4mA
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
PARAMETER
SYM.
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low-Z
Output Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Disable to Output in High-Z
Output Hold from Address Change
tRC
tAA
tACE
tOE
tCLZ*
tOLZ*
tCHZ*
tOHZ*
tOH
(2) WRITE CYCLE
PARAMETER
SYM.
Write Cycle Time
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High-Z
tWC
tAW
tCW
tAS
tWP
tWR
tDW
tDH
tOW*
tWHZ*
LY62W5128-55
MIN.
MAX.
55
55
55
30
10
5
20
20
10
-
UNIT
LY62W5128-55
MIN.
MAX.
55
50
50
0
45
0
25
0
5
20
UNIT
*These parameters are guaranteed by device characterization, but not production tested.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
4
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
®
LY62W5128
512K X 8 BIT LOW POWER CMOS SRAM
Rev. 1.a
TIMING WAVEFORMS
READ CYCLE 1 (Address Controlled) (1,2)
tRC
Address
tAA
Dout
tOH
Previous Data Valid
Data Valid
READ CYCLE 2 (CE# and OE# Controlled) (1,3,4,5)
tRC
Address
tAA
CE#
tACE
OE#
tOE
tOH
tOHZ
tCHZ
tOLZ
tCLZ
Dout
High-Z
Data Valid
Notes :
1.WE# is high for read cycle.
2.Device is continuously selected OE# = low, CE# = low.
3.Address must be valid prior to or coincident with CE# = low,; otherwise tAA is the limiting parameter.
4.tCLZ, tOLZ, tCHZ and tOHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.
5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tOHZ is less than tOLZ.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
5
High-Z
®
LY62W5128
512K X 8 BIT LOW POWER CMOS SRAM
Rev. 1.a
WRITE CYCLE 1 (WE# Controlled) (1,2,3,5,6)
tWC
Address
tAW
CE#
tCW
tAS
tWP
tWR
WE#
tWHZ
Dout
TOW
High-Z
(4)
tDW
(4)
tDH
Data Valid
Din
WRITE CYCLE 2 (CE# Controlled) (1,2,5,6)
tWC
Address
tAW
CE#
tAS
tWR
tCW
tWP
WE#
tWHZ
Dout
High-Z
(4)
tDW
tDH
Data Valid
Din
Notes :
1.WE#, CE# must be high during all address transitions.
2.A write occurs during the overlap of a low CE#, low WE#.
3.During a WE# controlled write cycle with OE# low, tWP must be greater than tWHZ + tDW to allow the drivers to turn off and data to be
placed on the bus.
4.During this period, I/O pins are in the output state, and input signals must not be applied.
5.If the CE# low transition occurs simultaneously with or after WE# low transition, the outputs remain in a high impedance state.
6.tOW and tWHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
6
®
LY62W5128
512K X 8 BIT LOW POWER CMOS SRAM
Rev. 1.a
DATA RETENTION CHARACTERISTICS
PARAMETER
VCC for Data Retention
Data Retention Current
Chip Disable to Data
Retention Time
SYMBOL TEST CONDITION
VDR CE# ≧ VCC - 0.2V
VCC = 1.5V
IDR
CE# ≧ VCC - 0.2V or CE2 ≦ 0.2V
Other pins at 0.2V or VCC-0.2V
See Data Retention
tCDR
Waveforms (below)
Recovery Time
tRC* = Read Cycle Time
tR
MIN.
1.5
TYP.
-
MAX.
5.5
UNIT
V
-
2
30
µA
0
-
-
ns
tRC*
-
-
ns
DATA RETENTION WAVEFORM
VDR ≧ 1.5V
Vcc
Vcc(min.)
Vcc(min.)
tCDR
CE#
VIH
tR
CE# ≧ Vcc-0.2V
VIH
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
7
®
LY62W5128
Rev. 1.a
512K X 8 BIT LOW POWER CMOS SRAM
PACKAGE OUTLINE DIMENSION
32-pin 400mil TSOP-Ⅱ Package Outline Dimension
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
8
®
LY62W5128
512K X 8 BIT LOW POWER CMOS SRAM
Rev. 1.a
ORDERING INFORMATION
LY62W5128 U V - WW XX Y Z
Z : Packing Type
Blank : Tube or Tray
T : Tape Reel
Y : Temperature Range
Blank : (Commercial) 0°C ~ 70°C
E : (Extended) -20°C ~ +80°C
I : (Industrial) -40°C ~ +85°C
XX : Power Type
LL : Ultra Low Power
WW : Access Time(Speed)
V : Lead Information
L : Green Package
U : Package Type
W : 32-pin 400 mil TSOP-II
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
9
®
LY62W5128
Rev. 1.a
512K X 8 BIT LOW POWER CMOS SRAM
THIS PAGE IS LEFT BLANK INTENTIONALLY.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
10