MURATA-PS DAC-HK12BMM-2

®
®
DAC-HK Series
High-Performance, 12-Bit
DAC’s with Input Registers
INNOVATION and EXCELLENCE
FEATURES
•
•
•
•
•
•
•
12-Bit resolution
Integral nonlinearity error ±1/2LSB, max.
Differential nonlinearity error ±3/4LSB, max.
MIL-STD-883 high-reliability versions available
Input register
3µs fast settling time
Guaranteed monotonicity over full temperature range
GENERAL DESCRIPTION
The DAC-HK Series hybrid D/A converters are highperformance 12-bit devices with a fast settling voltage output.
They incorporate a level-controlled input storage register and
are specifically designed for systems applications such as data
bus interfacing with computers. When the “load” input is high,
data in the storage register is held, and when the load input is
low, data is transferred through to the DAC. There are two
basic models available by coding option: binary and two’s
complement. The output voltage ranges are externally pinprogrammable and include: 0 to +5V, 0 to +10V, ±2.5V, ±5V
and ±10V.
INPUT/OUTPUT CONNECTIONS
PIN
FUNCTION
PIN
FUNCTION
1
2
3
4
5
6
7
8
9
10
11
12
BIT 1 (MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 12 (LSB)
24
23
22
21
20
19
18
17
16
15
14
13
REFERENCE OUT
GAIN ADJUST
+15V SUPPLY
GROUND
SUMMING JUNCTION
20V RANGE
10V RANGE
BIPOLAR OFFSET
LOAD
VOLTAGE OUTPUT
–15V SUPPLY
+5V SUPPLY
The DAC-HK Series contains a precision zener reference
circuit. This eliminates code-dependent ground currents by
routing current from the positive supply to the internal ground
node as determined by the R-2R ladder network. The internal
feedback resistors for the on-board amplifier track the ladder
network resistors, enhancing temperature performance. The
excellent tracking of the resistors results in a differential
nonlinearity tempco of ±2ppm/°C maximum. The temperature
coefficient of gain is ±20ppm/°C maximum, and the tempco of
zero is ±5ppm/°C maximum.
GAIN
ADJUST
23
REF.
OUT
24
BIPOLAR
OFFSET
17
+15V
SUPPLY
22
–15V
SUPPLY
14
+5V
SUPPLY
13
19 20V RANGE
5kΩ
+5V
18 10V RANGE
D/A CONVERTER
LOAD 16
REGISTER
74LS75
REGISTER
74LS75
5kΩ
REGISTER
74LS75
20
SUMMING
JUNCTION
15
VOLTAGE
OUTPUT
21 GROUND
1 2 3 4
BITS 1 2 3 4
MSB
5 6 7 8
5 6 7 8
DIGITAL INPUTS
9 10 11 12
9 10 11 12
LSB
Figure 1. Functional Block Diagram
®
®
DAC-HK Series
ABSOLUTE MAXIMUM RATINGS
Positive Supply, Pin 22
Negative Supply, Pin 14
Logic Supply, Pin 13
Digital Input Voltage, Pins 1–12 & 16
Output Current, Pin 15
Lead Temperature (soldering, 10s)
TECHNICAL NOTES
+18V
–18V
+5.25V
+5.5V
±20mA
300°C
FUNCTIONAL SPECIFICATIONS
(Typical at +25°C and ±15V and +5V supplies unless otherwise noted.)
INPUTS
Resolution
Coding, Unipolar Output
Coding, Bipolar Output
Input Logic Level, Bit ON ("1")
Input Logic Level, Bit OFF ("0")
Logic Loading
Load Input ➁
Load Input Loading
12 bits
Straight binary
Offset binary, two’s complement ➀
+2.0V to +5.5V
0V to +0.8V
1 LSTTL load
High (“1”) = hold data
Low (“0”) = transfer data
3 LSTTL loads
1. It is recommended that these converters be operated with
local supply bypass capacitors of 1µF (tantalum type) at the
+15V, –15V and +5V supply pins. The capacitors should be
connected as close to the pins as possible. In high RFI
noise environments, these capacitors should be shunted
with 0.01µF ceramic capacitors.
2. The analog, digital and power grounds should be separated
from each other as close as possible to pin 21 where they
all must come together.
3. The “load” control pin is a level-triggered input which causes
the register to hold data with a high input and transfer data
to the DAC with a low input.
4. A setup time of 50ns minimum must be allowed for the input
data. The DAC output voltage begins to change when the
register output changes.
5. If the reference output terminal (pin 24) is used, an
operational amplifier in non-inverting mode should be used
as a buffer. Current drawn from pin 24 should be limited to
±10µA in order not to affect the T.C. of the reference
PERFORMANCE ➃
Nonlinearity Error, max.
Differential Nonlinearity Error, max.
Gain Error, Before Trimming
Zero Error, Before Trimming
Gain Tempco, max.
Zero Tempco, Unipolar, max.
Offset Tempco, Bipolar, max.
Diff. Nonlinearity Tempco, max.
Monotonicity
Settling Time, 5V Change
Settling Time, 10V Change
Settling Time, 20V Change
Settling Time, 1LSB Change
Slew Rate
Power Supply Rejection
±1/2LSB
±3/4LSB
±0.1% ➂
±0.1% of FSR ➂
±20ppm/°C
±5ppm/°C of FSR
±10ppm/°C of FSR
±2ppm/°C of FSR
Guaranteed over temperature
3µs
3µs
4µs
800ns
±20V/µs
±0.002%FSR/%
OUTPUTS
Output Voltage Ranges, Unipolar ➄
Output Voltage Ranges, Bipolar ➄
Output Current
Output Impedance
0 to +5V, 0 to +10V
±2.5V
±5V
±10V
±5mA min.
0.05 Ohm
POWER REQUIREMENTS
Power Supply Voltages ➅
Storage Temperature Range
Package Type
Weight
Select the desired output voltage range and connect the
converter as shown in the Output Range Selection Table and
the Connection Diagrams. Refer to the Coding Tables.
Unipolar Operation
1. Zero Adjustment. Set the input digital code to 0000 0000
0000 and adjust the ZERO ADJ. potentiometer to give
0.0000V output.
2. Gain Adjustment. Set the input digital code to 1111 1111
1111 (straight binary) and adjust the GAIN ADJ. potentiometer to give the full-scale output voltage shown in Table 1.
Bipolar Operation
1. Offset Adjustment. Set the digital input code to 0000 0000
0000 (offset binary) or 1000 0000 0000 (two’s complement)
and adjust the OFFSET ADJ. potentiometer to give the
negative full-scale output voltage shown in Table 2.
2. Gain Adjustment. Set the digital input code to 1111 1111
1111 (offset binary) or 0111 1111 1111 (two’s complement)
and adjust the GAIN ADJ. potentiometer to give the positive
full-scale output voltage shown in Table 2.
+15V, ±0.5V at 15mA
–15V, ±0.5V at 30mA
+5V, ±0.25V at 65mA
Hold
LOAD
PHYSICAL ENVIRONMENTAL
Operating Temperature Range, Case
CALIBRATION PROCEDURE
0°C to +70°C (BGC, BMC)
–55°C to +125°C (BMM, 883)
–65°C to +125°C
24-pin DDIP
0.22 ounces (6.3 grams)
Footnotes:
➀ For two’s complement coding, order the "-2" model as described
in Ordering Information.
➁ Logic levels are the same as for data inputs.
➂ Initial errors are trimmable to zero. See Connection Diagram.
➃ FSR is full scale range and is 10V for 0 to +10V output range,
20V for ±10V output range, etc.
➄ By external pin connection.
➅ For ±12V, +5V operation, contact factory.
Transfer
1
DATA IN
0
t SETUP
50nsec min.
t SETUP
50nsec min.
REGISTER
OUTPUT TO
DAC
t PHL
60nsec
t PLH
60nsec
ALL RISE AND FALL TIMES ≤ 10nsec
Figure 2. DAC-HK Timing
DATEL, Inc., 11 Cabot Boulevard, Mansfield, MA 02048-1194 (U.S.A.) Tel: 508-339-3000 Fax: 508-339-6356 • For immediate assistance 800-233-2765
®
®
DAC-HK Series
20 SUMMING JUNCTION
5kΩ
5kΩ
19 20V RANGE
FULL SCALE
I OUT = 2mA
18 10V RANGE
I OUT
15 VOLTAGE OUTPUT
6.3kΩ
5kΩ
17 BIPOLAR OFFSET
24 REFERENCE OUT
6.3V
REF.
21 GROUND
Figure 3. Output Circuit
CONNECTION DIAGRAMS
LOAD
LOAD
BIT
LSB 12
12
13
–15V
11
11
14
–15V
OUT
(O TO +10V)
10
10
15
9
9
16
OUT
(–5 TO +5V)
8
8
17
7
7
18
6
6
19
5
5
20
4
4
21
3
3
22
2
2
23
1
1
24
BIT
LSB 12
12
13
+5V
11
11
14
10
10
15
9
9
16
8
8
17
DATA
IN
MSB
7
7
18
6
6
19
5
5
20
4
4
21
3
3
22
2
2
23
1
1
24
1µF
1µF
2.2MΩ
2.8MΩ
1µF
DATA
IN
100k
ZERO
ADJUST
100k
GAIN
ADJUST
MSB
+5V
1µF
1µF
2.2MΩ
2.8MΩ
100k
GAIN
ADJUST
0.01µF
1µF
0.01µF
100k
ZERO
ADJUST
+15V
+15V
Figure 4. Unipolar Operation (0 to +10V)
Figure 5. Bipolar Operation (±5V)
APPLICATIONS
LOAD 0 DAC-HK12B
0
LOAD 1 DAC-HK12B
1
•••••••••••••••••••••
LOAD N DAC-HK12B
N
LOAD 0
0
1
••••••
N
ADDRESS DECODER
••••••
•••••••••••••••••••
LOAD N
DAC-HK12B
N
LSB's MSB's
N
ADDRESS DECODER
DATA BUS
≥12 BITS
0
1
DAC-HK12B
DAC-HK12B
LOAD 1
0
1
LSB's MSB's
LSB's MSB's
LOAD
HI BYTE
TEMPORARY
STORAGE REGISTER
LOAD
LO BYTE
8 BIT DATA BUS
ADDRESS
STROBE
ADDRESS
AN • • • • • A1
A0
WRITE
STROBE
Figure 6. Interfacing to ≥12-Bit Data Bus
Figure 7. Interfacing to 8-Bit Data Bus
Digital-to-Analog Converters
®
®
DAC-HK Series
CODING TABLES
Table 1. Unipolar Operation
MSB
STRAIGHT BINARY
LSB
OUTPUT RANGES
0 TO +10V
0 TO +5V
1111
1111
1111
+9.9976
+4.9988
1100
0000
0000
+7.5000
+3.7500
1000
0000
0000
+5.0000
+2.5000
0100
0000
0000
+2.5000
+1.2500
0000
0000
0001
+0.0024
+0.0012
0000
0000
0000
0.0000
0.0000
Table 2. Bipolar Operation
TWO’S COMPLEMENT
OFFSET BINARY
LSB
MSB
1111
MSB
1111
1111
0111
1111
1100
0000
0000
0100
1000
0000
0000
0000
0100
0000
0000
0000
0000
0000
0000
OUTPUT RANGES
LSB
±10V
±5V
±2.5V
1111
+9.9951
+4.9976
+2.4988
0000
0000
+5.0000
+2.5000
+1.2500
0000
0000
0.0000
0.0000
0.0000
1100
0000
0000
–5.0000
–2.5000
–1.2500
0001
1000
0000
0001
–9.9951
–4.9976
–2.4988
0000
1000
0000
0000
–10.0000
–5.0000
–2.5000
Table 3. Output Range Selection
RANGE
CONNECT THESE PINS TOGETHER
±10V
15 & 19
17 & 20
±5V
15 & 18
17 & 20
±2.5V
15 & 18
17 & 20
+10V
15 & 18
17 & 21
+5V
15 & 18
17 & 21
19 & 20
19 & 20
MECHANICAL DIMENSIONS INCHES (mm)
1.31 MAX.
(33.27)
24
Dimension Tolerances (unless otherwise indicated):
2 place decimal (.XX) ±0.010 (±0.254)
3 place decimal (.XXX) ±0.005 (±0.127)
13
0.80 MAX.
(20.32)
1
ORDERING INFORMATION
Lead Material: Kovar alloy
Lead Finish: 50 microinches (minimum) gold plating
over 100 microinches (nominal) nickel plating
12
OPERATING
TEMP. RANGE
MODEL
Binary Coding
DAC-HK12BGC
0 to +70°C
DAC-HK12BMC
0 to +70°C
DAC-HK12BMM
–55 to +125°C
DAC-HKB/883
–55 to +125°C
Two’s Complement Coding
0.100 TYP.
(2.540)
1.100
(27.940)
0.235 MAX.
(5.969)
0.200 MAX.
(5.080)
0.010
(0.254)
0.190 MAX.
(4.826)
0.018 ±0.002
(0.457)
0.100
(2.540)
0.040
(1.016)
SEATING
PLANE
0.025
(0.635)
+0.002
–0.001
0.600 ±0.010
(15.240)
0.100
(2.540)
DAC-HK12BGC-2
DAC-HK12BMC-2
DAC-HK12BMM-2
DAC-HKB-2/883
0 to +70°C
0 to +70°C
–55 to +125°C
–55 to +125°C
The MIL-STD-883 units are available under DESC
Drawing Number 5962-89528. Contact DATEL
for 883 product specifications
DS-0053C 1996
DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151
Tel: (508) 339-3000 (800) 233-2765 Fax: (508) 339-6356
Internet: www.datel.com Email: [email protected]
DATEL (UK) LTD. Tadley, England Tel: (01256)-880444
DATEL S.A.R.L. Montigny Le Bretonneux, France Tel: 01-34-60-01-01
DATEL GmbH München, Germany Tel: 89-544334-0
DATEL KK Tokyo, Japan Tel: 3-3779-1031, Osaka Tel: 6-6354-2025
DATEL makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained
herein do not imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. Specifications are subject to change without notice. The DATEL logo is a registered DATEL, Inc. trademark.