PO74G139A DUAL2-LINETO4-LINEDECODER/DEMULTIPLEXER 02/07/07 74 Series GHz Logic FEATURES: DESCRIPTION: . Patented technology . Operating frequency up to 1.125GHz with 2pf load . Operating frequency up to 800MHz with 5pf load . Operating frequency up to 350MHz with 15pf load . VCC Operates from 1.65V to 3.6V . Propagation delay < 1.7ns max with 15pf load . Low input capacitance: 4pf typical . Available in 16 pin SOIC package Potato Semiconductor’s PO74G139A is designed for world top performance using submicron CMOS technology to achieve 1.125GHz TTL /CMOS output frequency with less than 1.7ns propagation delay. This quadruple bus buffer gate is designed for 1.65-V to 3.6-V VCC operation. The PO74G139A comprises two individual 2-line to 4-line decoders in a single package. Theactivelowenable (G) input can be used as a data line in demultiplexing applications. This decoder/ demultiplexer features fully buffered inputs, each of which represents only one normalizedload to itsdriving circuit. Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V system environment. Pin Configuration Logic Block Diagram 4 1G 1A 1B 1Y0 1Y1 1Y2 1Y3 GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 2G 2A 2B 2Y0 2Y1 2Y2 2Y3 1G 5 6 1A Select Inputs 1B 1Y0 1 1Y1 1Y2 2 7 3 1Y3 Data Outputs 12 2G 11 10 2A Select Inputs 2B 2Y0 15 2Y1 2Y2 14 9 13 2Y3 Pin Description INPUTS G OUTPUTS SELECT B A Y3 Y2 Y1 Y0 L L L H H H L L L H H H L H L H L H L H H L H H L H H H H X X H H H H 1 Copyright © Potato Semiconductor Corporation PO74G139A DUAL2-LINETO4-LINEDECODER/DEMULTIPLEXER 02/07/07 74 Series GHz Logic Maximum Ratings Description Max Unit Storage Temperature -65 to 150 °C Operation Temperature -40 to 85 °C Operation Voltage -0.5 to +4.6 V Input Voltage -0.5 to +5.5 V Output Voltage -0.5 to Vcc+0.5 V Note: stresses greater than listed under Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability specification is not implied. DC Electrical Characteristics Symbol Description VOH Output High voltage VOL Test Conditions Min Typ Max Unit Vcc=3V Vin=VIH or VIL, IOH= -12mA 2.4 3 - V Output Low voltage Vcc=3V Vin=VIH or VIL, IOH=12mA - 0.3 0.5 V VIH Input High voltage Guaranteed Logic HIGH Level (Input Pin) 2 - 5.5 V VIL Input Low voltage Guaranteed Logic LOW Level (Input Pin) -0.5 - 0.8 V IIH Input High current Vcc = 3.6V and Vin = 5.5V - - 1 uA IIL Input Low current Vcc = 3.6V and Vin = 0V - - -1 uA VIK Clamp diode voltage Vcc = Min. And IIN = -18mA - -0.7 -1.2 V Notes: 1. 2. 3. 4. 5. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at Vcc = 3.3V, 25 °C ambient. This parameter is guaranteed but not tested. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. VoH = Vcc – 0.6V at rated current 2 Copyright © Potato Semiconductor Corporation PO74G139A DUAL2-LINETO4-LINEDECODER/DEMULTIPLEXER 02/07/07 74 Series GHz Logic Power Supply Characteristics Symbol Description Test Conditions (1) Min Typ Max Unit IccQ Quiescent Power Supply Current Vcc=Max, Vin=Vcc or GND - 0.1 30 uA ∆Icc Power Supply Current per Input High Vcc=Max, Vin= Vcc-0.6V - 50 300 uA Notes: 1. 2. 3. 4. 5. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at Vcc = 3.3V, 25°C ambient. This parameter is guaranteed but not tested. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. VoH = Vcc – 0.6V at rated current Capacitance Parameters (1) Cin Cout Description Test Conditions Typ Unit Input Capacitance Vin = 0V pF Output Capacitance Vout = 0V 4 6 Test Conditions (1) M ax Unit pF Notes: 1 This parameter is determined by device characterization but not production tested. Switching Characteristics Symbol Description tPLH Propagation Delay A, B to Y CL = 15pF 1.7 ns tPHL Propagation Delay A, B to Y CL = 15pF 1.7 ns Rise/Fall Time 0.8V – 2.0V CL = 15pF, 125MHz 0.8 0.25 ns ns tr/tf tsk(o) Output Pin to Pin Skew fmax Input Frequency CL =15pF 350 MHz fmax fmax Input Frequency CL = 5pF 800 MHz Input Frequency CL = 2pF 1125 MHz Notes: 1. See test circuits and waveforms. 2. tpLH, tpHL, tsk(p), and tsk(o) are production tested. All other parameters guaranteed but not production tested. 3. Airflow of 1m/s is recommended for frequencies above 133MHz 3 Copyright © 2005-2006, Potato Semiconductor Corporation PO74G139A DUAL2-LINETO4-LINEDECODER/DEMULTIPLEXER 02/07/07 74 Series GHz Logic Test Waveforms Test Circuit 500 Ω 50Ω 15pF to 2pF 50 Ω 500 Ω 4 Copyright © Potato Semiconductor Corporation PO74G139A DUAL2-LINETO4-LINEDECODER/DEMULTIPLEXER 02/07/07 74 Series GHz Logic Packaging Mechanical Drawing: 16 pin SOIC 16 .149 .157 .2284 .2440 3.78 3.99 1 .0075 .0098 .386 .393 9.80 10.00 .016 .050 5.80 6.20 0.41 1.27 0.19 0.25 .0155 0.393 .0260 0.660 .053 .068 .050 BSC 1.27 .013 .020 0.330 0.508 .0040 .0098 1.35 1.75 0.10 0.25 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS Packaging Mechanical Drawing: 16 pin TSSOP X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS 5 Copyright © Potato Semiconductor Corporation PO74G139A DUAL2-LINETO4-LINEDECODER/DEMULTIPLEXER 02/07/07 74 Series GHz Logic Ordering Information Ordering Code Package Top-Marking TA PO74G139ASU 16-pin SOIC Tube Pb-free & Green PO74G139AS -40°C to 85°C PO74G139ASR 16-pin SOIC Tape and reel Pb-free & Green PO74G139AS -40°C to 85°C PO74G139ATU 16-pin TSSOP Tube Pb-free & Green PO74G139AT -40°C to 85°C PO74G139ATR 16-pin TSSOP Tape and reel Pb-free & Green PO74G139AT -40°C to 85°C IC Package Information PACKAGE CODE PACKAGE TYPE TAPE WIDTH (mm) TAPE PITCH (mm) PIN 1 LOCATION TAPE TRAILER LENGTH QTY PER REEL TAPE LEADER LENGTH QTY PER TUBE S SOIC 16 16 8 Top Left Corner 39 (12”) 3000 64 (20”) 48 T TSSOP 16 12 8 Top Left Corner 39 (12”) 3000 64 (20”) 96 6 Copyright © Potato Semiconductor Corporation