PO74G304A 3.3V 1:4 CMOS Clock Buffered Driver 07/31/06 700MHz TTL/CMOS Potato Chip FEATURES: DESCRIPTION: • Patented technology • Operating frequency up to 700MHz with 2pf load • Operating frequency up to 650MHz with 5pf load • Operating frequency up to 450MHz with 15pf load • Operating frequency up to 100MHz with 50pf load • Very low output pin to pin skew < 100ps Max • Very low pulse skew < 150ps Max • VCC = 1.65V to 3.6V • Propagation delay < 2.0ns max with 15pf load • Low input capacitance: 3pf typical • 1:4 fanout • Packaging (Pb-free & Green available) • Available in 8-pin TSSOP package Potato Semiconductor’s PO74G304A is designed for world top performance using submicron CMOS technology to achieve 700MHz TTL output frequency with less than 100ps output pin to pin skew. PO74G304A is a 3.3V CMOS 1 input to 4 outputs Buffered driver to achieve 700MHz output frequency. Typical applications are clock and signal distribution. They are used for networking and communications applications. Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V system environment. Pin Configuration Logic Block Diagram Y0 CLK_IN 1 8 OE 2 7 Y2 Y0 3 6 VDD GND 4 5 Y3 Y1 Y1 Y2 OE CLK_IN Pin Description Pin# 5V Tolerant clock input 2 Active High Output Enable. 3,5,7,8 FUNCTION TABLE De s cription 1 LVCMOS level outputs 4 Groun 6 3.3V powe Y3 INPUTS OUTPUT CLKIN OE 1Y (0:3) L H L H L L H H L L L H 1 Copyright © 2005-2006, Potato Semiconductor Corporation PO74G304A 3.3V 1:4 CMOS Clock Buffered Driver 07/31/06 700MHz TTL/CMOS Potato Chip Maximum Ratings Description Max Unit Storage Temperature -65 to 150 °C Operation Temperature -40 to 85 °C Operation Voltage -0.5 to +4.6 V Input Voltage -0.5 to +5.5 V Output Voltage -0.5 to Vcc+0.5 V Note: stresses greater than listed under Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability specification is not implied. DC Electrical Characteristics Symbol Description VOH Output High voltage VOL Test Conditions Min Typ Max Unit Vcc=3V Vin=VIH or VIL, IOH= -12mA 2.4 3 - V Output Low voltage Vcc=3V Vin=VIH or VIL, IOH=12mA - 0.4 0.5 V VIH Input High voltage Guaranteed Logic HIGH Level (Input Pin) 2 - 5.5 V VIL Input Low voltage Guaranteed Logic LOW Level (Input Pin) -0.5 - 0.8 V IIH Input High current Vcc = 3.6V and Vin = 5.5V - - 50 uA IIL Input Low current Vcc = 3.6V and Vin = 0V - - -50 uA VIK Clamp diode voltage Vcc = Min. And IIN = -18mA - -0.7 -1.2 V Notes: 1. 2. 3. 4. 5. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at Vcc = 3.3V, 25 °C ambient. This parameter is guaranteed but not tested. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. VoH = Vcc – 0.6V at rated current 2 Copyright © 2005-2006, Potato Semiconductor Corporation PO74G304A 3.3V 1:4 CMOS Clock Buffered Driver 07/31/06 700MHz TTL/CMOS Potato Chip Power Supply Characteristics Symbol IccQ Description Quiescent Power Supply Current Test Conditions (1) Min Typ Max Unit Vcc=Max, Vin=Vcc or GND - 0.1 30 uA Notes: 1. 2. 3. 4. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at Vcc = 3.3V, 25°C ambient. This parameter is guaranteed but not tested. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. Capacitance Parameters (1) Cin Cout Description Test Conditions Typ Max Unit Input Capacitance Vin = 0V 3 4 pF Output Capacitance Vout = 0V - 6 pF Notes: 1 This parameter is determined by device characterization but not production tested. Switching Characteristics Symbol Description Test Conditions (1) M ax Unit tPLH Propagation Delay A to Bn CL = 15pF 2.0 ns tPHL Propagation Delay A to Bn CL = 15pF tr/tf Rise/Fall Time 0.8V – 2.0V 2.0 0.8 ns ns ps ps tsk(p) Pulse Skew (Same Package) CL = 15pF, 125MHz tsk(o) Output Pin to Pin Skew (Same Package) CL = 15pF, 125MHz 150 100 Output Skew (Different Package) CL = 15pF, 125MHz 400 ps tsk(pp) fmax Input Frequency CL = 5 0 p F 100 MHz fmax Input Frequency CL =15pF 450 MHz fmax Input Frequency CL = 5pF 650 MHz fmax Input Frequency CL = 2pF 700 MHz Notes: 1. See test circuits and waveforms. 2. tpLH, tpHL, tsk(p), and tsk(o) are production tested. All other parameters guaranteed but not production tested. 3. Airflow of 1m/s is recommended for frequencies above 133MHz 3 Copyright © 2005-2006, Potato Semiconductor Corporation PO74G304A 3.3V 1:4 CMOS Clock Buffered Driver 700MHz TTL/CMOS Potato Chip 07/31/06 Test Waveforms Test Circuit 50Ω 4 Copyright © 2005-2006, Potato Semiconductor Corporation PO74G304A 3.3V 1:4 CMOS Clock Buffered Driver 07/31/06 700MHz TTL/CMOS Potato Chip Packaging Mechanical Drawing: 8 pin TSSOP 8 SEATING PLANE X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS 5 Copyright © 2005-2006, Potato Semiconductor Corporation PO74G304A 3.3V 1:4 CMOS Clock Buffered Driver 02/12/08 700MHz TTL/CMOS Potato Chip Ordering Information Ordering Code Package Top-Marking TA PO74G304ATU 8pin TSSOP Tube Pb-free & Green PO74G304AT -40°C to 85°C PO74G304ATR 8pin TSSOP Tape and reel Pb-free & Green PO74G304AT -40°C to 85°C IC Package Information PACKAGE CODE T PACKAGE TYPE TSSOP 8 TAPE WIDTH (mm) TAPE PITCH (mm) 12 8 PIN 1 LOCATION Top Left Corner TAPE TRAILER LENGTH 39 (12”) QTY PER REEL 3000 TAPE LEADER LENGTH 64 (20”) QTY PER TUBE 158 6 Copyright © 2005-2006, Potato Semiconductor Corporation