PO74G553A 3.3V 1:4 CMOS Clock Buffered Driver 01/12/08 800MHz TTL/CMOS Potato Chip FEATURES: DESCRIPTION: . Patented technology . Operating frequency up to 800MHz with 2pf load . Operating frequency up to 600MHz with 5pf load . Operating frequency up to 300MHz with 15pf load . Operating frequency up to 150MHz with 50pf load . Very low output pin to pin skew < 50ps . Very low pulse skew < 150ps . VCC = 1.65V to 3.6V . Propagation delay < 1.7ns max with 15pf load . Low input capacitance: 3pf typical . 1:4 fanout . 5 V tolerant input clock . Available in 8pin 150mil wide SOIC package Pin Configuration Potato Semiconductor’s PO74G553A is designed for world top performance using submicron CMOS technology to achieve 800MHz TTL output frequency with less than 50ps output pulse skew. PO74G553A is a 3.3V CMOS 1 input to 4 outputs Buffered driver to achieve 800MHz Max output frequency. Typical applications are clock and signal distribution. Logic Block Diagram O1 V DD 1 8 OE O0 2 7 O3 O1 3 6 O2 GN D 4 5 IN O2 IN O3 O4 OE Pin Description Pin Name IN OE Description Signal or clock Inputs Hi-Z State Output Enable Inputs (Active LOW) Inputs Outputs OE IN On H L L O1-O4 Signal or clock Outputs H H H GND Ground L L Z Vcc Power L H Z 1 Copyright © 2005, Potato Semiconductor Corporation PO74G553A 3.3V 1:4 CMOS Clock Buffered Driver 01/12/08 800MHz TTL/CMOS Potato Chip Maximum Ratings Description Max Unit Storage Temperature -65 to 150 °C Operation Temperature -40 to 85 °C Operation Voltage -0.5 to +4.6 V Input Voltage -0.5 to Vcc+0.5 V Output Voltage -0.5 to Vcc+0.5 V Note: stresses greater than listed under Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability specification is not implied. DC Electrical Characteristics Symbol Description VOH Output High voltage VOL Test Conditions Min Typ Max Unit Vcc=3V Vin=VIH or VIL, IOH= -12mA 2.4 3 - V Output Low voltage Vcc=3V Vin=VIH or VIL, IOH=12mA - 0.3 0.5 V VIH Input High voltage Guaranteed Logic HIGH Level (Input Pin) 2 - Vcc V VIL Input Low voltage Guaranteed Logic LOW Level (Input Pin) -0.5 - 0.8 V IOZH High Impedance Output current Vcc = 3.6V and Vo = Vcc - - 1 uA IOZL High Impedance Output current Vcc = 3.6V and Vo = 0V - - -1 uA IIH Input High current Vcc = 3.6V and Vin = 3.6V - - 1 uA IIL Input Low current Vcc = 3.6V and Vin = 0V - - -1 uA VIK Clamp diode voltage Vcc = Min. And IIN = -18mA - -0.7 -1.2 V Notes: 1. 2. 3. 4. 5. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at Vcc = 3.3V, 25 °C ambient. This parameter is guaranteed but not tested. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. VoH = Vcc – 0.6V at rated current 2 Copyright © Potato Semiconductor Corporation PO74G553A 3.3V 1:4 CMOS Clock Buffered Driver 01/12/08 800MHz TTL/CMOS Potato Chip Power Supply Characteristics Symbol IccQ Description Quiescent Power Supply Current Test Conditions (1) Min Typ Max Unit Vcc=Max, Vin=Vcc or GND - 0.1 30 uA Notes: 1. 2. 3. 4. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at Vcc = 3.3V, 25Ε C ambient. This parameter is guaranteed but not tested. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. Capacitance (TA= +25°C, f= 1MHz) Parameters (1) Description Test Conditions Typ Max Unit Cin Input Capacitance Vin = 0V 3 4 pF Cout Output Capacitance Vout = 0V - 6 pF Notes: 1 This parameter is determined by device characterization but not production tested. Switching Characteristics Symbol Description Test Conditions M ax Unit tPLH & tPHL Propagation Delay INA to OAn, INB to OBn CL = 15pF 1.7 tPZH or tPZL Output Enable Time CL = 15pF 50 ns ps tPHZ or tPLZ Output Disable Time CL = 15pF 2.5 ns Rise/Fall Time 0.8V – 2.0V ns ps tr/tf tsk(p) Pulse Skew (Same Package) CL = 15pF, 125MHz 0.8 150 tsk(o) Output Pin to Pin Skew (Same Package) CL = 15pF, 125MHz 0.25 ns Output Skew (Different Package) CL = 15pF, 125MHz 0.4 ns tsk(pp) fmax Input Frequency CL = 50pF 150 MHz fmax Input Frequency CL =15pF 300 MHz fmax Input Frequency CL = 5pF 600 MHz fmax Input Frequency CL = 2pF 800 MHz Notes: 1. See test circuits and waveforms. 2. tpLH, tpHL, tsk(p), and tsk(o) are production tested. All other parameters guaranteed but not production tested. 3. Airflow of 1m/s is recommended for frequencies above 133MHz 3 Copyright © Potato Semiconductor Corporation PO74G553A 3.3V 1:4 CMOS Clock Buffered Driver 01/12/08 800MHz TTL/CMOS Potato Chip Test Waveforms 0V 1.5V 3V Test Circuit 500 Ω 50Ω 50 Ω 500 Ω 4 Copyright © Potato Semiconductor Corporation PO74G553A 3.3V 1:4 CMOS Clock Buffered Driver 01/12/08 800MHz TTL/CMOS Potato Chip Packaging Mechanical Drawing: 8 pin SOIC 8 0-8˚ .149 .157 3.78 3.99 .0099 .0196 0.25 x 45˚ 0.50 .016 .050 0.40 1.27 .2284 .2440 5.80 6.20 1 .189 .196 .016 .026 0.406 0.660 4.80 5.00 .053 .068 .0075 .0098 1.35 1.75 0.19 0.25 SEATING PLANE REF .050 BSC 1.27 .0040 0.10 .0098 0.25 .013 0.330 .020 0.508 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS 5 Copyright © Potato Semiconductor Corporation PO74G553A 3.3V 1:4 CMOS Clock Buffered Driver 01/12/08 800MHz TTL/CMOS Potato Chip Ordering Information Ordering Code Package Top-Marking TA PO74G553AST 8-pin SOIC Tube Pb-free & Green PO74G553AS -40°C to 85°C PO74G553ASR 8-pin SOIC Tape and reel Pb-free & Green PO74G553AS -40°C to 85°C IC Package Information PACKAGE CODE T PACKAGE TYPE TAPE WIDTH (mm) TAPE PITCH (mm) SOIC 8 12 8 PIN 1 LOCATION Top Left Corner TAPE TRAILER LENGTH 39 (12”) QTY PER REEL 3000 TAPE LEADER LENGTH 64 (20”) QTY PER TUBE 97 6 Copyright © Potato Semiconductor Corporation