PO74G38072A 3.3V 1:2 CMOS Clock Driver 02/13/07 1GHz TTL/CMOS Potato Chip FEATURES: DESCRIPTION: . Patented technology . Max input frequency > 1GHz . Operating frequency up to 1GHz with 2pf load . Operating frequency up to 700MHz with 5pf load . Operating frequency up to 400MHz with 15pf load . Operating frequency up to 200MHz with 50pf load . Very low output pin to pin skew < 20ps . VCC = 1.65V to 3.6V . Propagation delay < 1.3ns max with 15pf load . Low input capacitance: 3pf typical . 1:2 fanout . Available in 8 pin SOIC package Potato Semiconductor’s PO74G38072A is designed for world top performance using submicron CMOS technology to achieve 1GHz TTL output frequency with less than 20ps output pin to pin skew. Pin Configuration PO74G38072A is a 3.3V CMOS 1 input to 2 outputs Buffered driver to achieve 1GHz output frequency. Typical applications are clock and signal distribution. Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V system environment. Logic Block Diagram VCC 1 8 GND VCC 2 7 O2 IN 3 6 O1 GND 4 5 GND O1 IN O2 Pin Description Pin Name Description IN Input Ox Outputs 1 Copyright © Potato Semiconductor Corporation PO74G38072A 3.3V 1:2 CMOS Clock Driver 02/13/07 1GHz TTL/CMOS Potato Chip Maximum Ratings Description Max Unit Storage Temperature -65 to 150 °C Operation Temperature -40 to 85 °C Operation Voltage -0.5 to +4.6 V Input Voltage -0.5 to +5.5 V Output Voltage -0.5 to Vcc+0.5 V Note: stresses greater than listed under Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability specification is not implied. DC Electrical Characteristics Symbol Description VOH Output High voltage VOL Test Conditions Min Typ Max Unit Vcc=3V Vin=VIH or VIL, IOH= -12mA 2.4 3 - V Output Low voltage Vcc=3V Vin=VIH or VIL, IOH=12mA - 0.3 0.5 V VIH Input High voltage Guaranteed Logic HIGH Level (Input Pin) 2 - Vcc V VIL Input Low voltage Guaranteed Logic LOW Level (Input Pin) -0.5 - 0.8 V IIH Input High current Vcc = 3.6V and Vin = 5.5V - - 1 uA IIL Input Low current Vcc = 3.6V and Vin = 0V - - -1 uA VIK Clamp diode voltage Vcc = Min. And IIN = -18mA -0.7 -1.2 - V Notes: 1. 2. 3. 4. 5. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at Vcc = 3.3V, 25 °C ambient. This parameter is guaranteed but not tested. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. VoH = Vcc – 0.6V at rated current 2 Copyright © Potato Semiconductor Corporation PO74G38072A 3.3V 1:2 CMOS Clock Driver 02/13/07 1GHz TTL/CMOS Potato Chip Power Supply Characteristics Symbol IccQ Description Quiescent Power Supply Current Test Conditions (1) Min Typ Max Unit Vcc=Max, Vin=Vcc or GND - 0.1 30 uA Notes: 1. 2. 3. 4. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at Vcc = 3.3V, 25°C ambient. This parameter is guaranteed but not tested. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. Capacitance Parameters (1) Description Test Conditions Typ Max Cin Input Capacitance Vin = 0V 3 4 Cout Output Capacitance Vout = 0V - 6 Unit pF pF Notes: 1 This parameter is determined by device characterization but not production tested. Switching Characteristics Symbol Description Test Conditions (1) M ax Unit tPLH Propagation Delay A to Bn CL = 15pF 1.3 ns tPHL Propagation Delay A to Bn CL = 15pF 1.3 ns tr/tf Rise/Fall Time 0.8V – 2.0V 0.8 ns Output Pin to Pin Skew (Same Package) CL = 15pF, 125MHz 20 ps Output Skew (Different Package) CL = 15pF, 125MHz 0.25 ns tsk(o) tsk(pp) fmax Input Frequency CL = 5 0 p F 200 MHz fmax Input Frequency CL =15pF 400 MHz fmax Input Frequency CL = 5pF 700 MHz fmax Input Frequency CL = 2pF 1000 MHz Notes: 1. See test circuits and waveforms. 2. tpLH, tpHL, tsk(p), and tsk(o) are production tested. All other parameters guaranteed but not production tested. 3. Airflow of 1m/s is recommended for frequencies above 133MHz 3 Copyright © Potato Semiconductor Corporation PO74G38072A 3.3V 1:2 CMOS Clock Driver 1GHz TTL/CMOS Potato Chip 02/13/07 Test Waveforms Test Circuit Vcc Pulse Generator 50Ω D.U.T 50pF to 2pF 4 Copyright © Potato Semiconductor Corporation PO74G38072A 3.3V 1:2 CMOS Clock Driver 02/13/07 1GHz TTL/CMOS Potato Chip Packaging Mechanical Drawing: 8 pin SOIC 8 0-8˚ .149 .157 3.78 3.99 .0099 .0196 0.25 x 45˚ 0.50 .016 .050 0.40 1.27 .2284 .2440 5.80 6.20 1 .189 .196 4.80 5.00 .053 .068 .016 .026 0.406 0.660 .0075 .0098 1.35 1.75 0.19 0.25 SEATING PLANE REF .050 BSC 1.27 .0040 0.10 .0098 0.25 .013 0.330 .020 0.508 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS Ordering Information Ordering Code Package Top-Marking TA PO74G38072ASU 8-pin SOIC Tube Pb-free & Green PO74G38072AS -40°C to 85°C PO74G38072ASR 8-pin SOIC Tape and reel Pb-free & Green PO74G38072AS -40°C to 85°C 5 Copyright © Potato Semiconductor Corporation