ASM2P2351AH November 2006 rev 0.3 1-Line To 10-Line Clock Driver With 3-State Outputs Features • Product Description The ASM2P2351AH is a high-performance clock-driver Low Output Skew, Low Pulse Skew for Clock- circuit that distributes one input (A) to ten outputs (Y) Distribution and Clock-Generation Applications. with minimum skew for clock distribution. The output- • Operates at 3.3V Supply Voltage. • LVTTL-Compatible Inputs and Outputs. impedance state. Each output has an internal series • Supports Mixed-Mode Signal Operation. damping resistor to improve signal integrity at the load. (5V Input and Output Voltages With 3.3V Supply The ASM2P2351AH operates at nominal 3.3V Supply Voltage). Voltage. • Distributes One Clock Input to Ten Outputs. The propagation delays are adjusted at the factory • Outputs have Internal Series Damping Resistor enable (OE) input disables the outputs to a high- using the P0 and P1 pins. The factory adjustments ensure that the part-to-part skew is minimized and is to Reduce Transmission Line Effects. • • Distributed VCC and Ground Pins kept within a specified window. Pins P0 and P1 are not Reduce intended for customer use and should be connected to Switching Noise. GND. Package Options Include Plastic Small-Outline The ASM2P2351AH is characterized for operation and Shrink Small-Outline Packages. from 0°C to 70°C. Pin Configuration Logic Diagram (Positive Logic) 5 OE 23 21 19 18 6 A 16 7 8 PO P1 14 11 9 4 2 Y1 Y2 GND 1 24 GND Y10 2 23 Y1 VCC 3 22 VCC Y9 4 21 Y2 5 20 GND 19 Y3 Y3 OE Y4 A 6 Y5 P0 7 18 Y4 Y6 P1 8 17 GND Y8 9 16 Y5 VCC 10 15 VCC Y7 11 14 Y6 GND 12 13 GND Y7 Y8 Y9 ASM2P2351AH Y10 PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200, Campbell, CA 95008 • Tel: 408-879-9077 • Fax: 408-879-9018 www.pulsecoresemi.com Notice: The information in this document is subject to change without notice. ASM2P2351AH November 2006 rev 0.3 Pin Description Pin # Pin Name Typ Description 1 GND P Ground Pin 2 Y10 O Output 10 3 VCC P Power Supply Pin 4 Y9 O Output 9 5 OE I Output Enable Pin. When this pin is low, the outputs Y[1:10] are enabled and when this pin is high , the outputs Y[1:10] are disabled. 6 A I Input Clock 7 P0 - No Connect 8 P1 - No Connect 9 Y8 O Output 8 10 VCC P Power Supply 11 Y7 O Output 7 12 GND P Ground Pin 13 GND P Ground Pin 14 Y6 O Output 6 15 VCC P Power Supply 16 Y5 O Output 5 17 GND P Ground Pin 18 Y4 O Output 4 19 Y3 O Output 3 20 GND P Ground Pin 21 Y2 O Output 2 22 VCC P Power Supply 23 Y1 O Output 1 24 GND P Ground Pin Function Table Inputs A Outputs OE In L H Z H H Z L L L H L H 1-Line To 10-Line Clock Driver With 3-State Outputs Notice: The information in this document is subject to change without notice. 2 of 12 ASM2P2351AH November 2006 rev 0.3 Absolute Maximum Ratings Symbol Parameter Rating Unit VCC Voltage on Supply pin with respect to Ground -0.5 to +4.6 V VIN Voltage on any pin with respect to Ground -0.5 to +7.0 V tSTG Storage temperature -65 to +125 °C tA Operating temperature 0 to 70 °C ts Max. Soldering Temperature (10 sec) 260 °C tJ Junction Temperature 150 °C 2 KV Static Discharge Voltage tDV (As per JEDEC STD22- A114-B) Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. Recommended operating conditions (see Note 3) Symbol VCC VIH VIL VI IOH IOL fclock TA Parameter Supply voltage High-level input voltage Low-level input voltage Input voltage High-level output current Low-level output current Input clock frequency Operating free air temperature Min Max 3 2 3.6 0 0 Unit V V V V mA mA MHz °C 0.8 5.5 –12 12 100 70 NOTE 3: Unused pins (input or I/O) must be held high or low. . Electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) Parameter Test Conditions VIK VCC = 3 V, II = –18 mA VOH VCC = 3 V, IOH = – 12 mA VOL VCC = 3 V, IOL = 12 mA II VCC = 3.6 V, VI = VCC or GND 1 VCC = 3.6 V, VO = 2.5 V IOZ VCC = 3.6 V, VCC = 3 V IO Min Typ VCC = 3.6 V, IO = 0, VI = VCC or GND Unit -1.2 V 2 V 0.8 -7 Outputs high ICC Max V ±1 mA -70 mA ± 10 mA 0.3 Outputs low 15 Outputs disabled 0.3 mA Ci VI = VCC or GND, VCC = 3.3 V, f = 10 MHz 4 pF Co VO = VCC or GND, VCC = 3.3 V, f = 10 MHz 6 pF Note: 1 Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 1-Line To 10-Line Clock Driver With 3-State Outputs Notice: The information in this document is subject to change without notice. 3 of 12 ASM2P2351AH November 2006 rev 0.3 Switching Characteristics, CL = 50 pF (see Figures 1 and 2) Parameter tPLH From (Input) To (Output) ASM2P2351A VCC = 3.3 V, TA = 25°C ASM2P2351AH VCC = 3 V to 3.6 V, TA = 0°C to 70°C Min Max Min Typ Max 3.8 4.3 4.8 3.6 4.1 4.6 2.4 4.9 6.0 1.8 6.9 2.4 4.3 6.0 1.8 6.9 2.2 4.4 6.3 2.1 7.1 2.2 4.6 6.3 2.1 7.3 Unit A Y OE Y OE Y tsk(o) A Y 0.3 0.5 0.5 nS tsk(p) A Y 0.2 0.8 0.8 nS tsk(pr) A Y 1 1 nS tr A Y 2.5 nS tf A Y 2.5 nS tPHL tPZH tPZL tPHZ tPLZ nS nS nS Switching Characteristics temperature and VCC coefficients over recommended operating free-air temperature and VCC range (see Note 3) From To Parameter Min Max Unit (Input) (Output) tPLH(T) tPHL(T) tPLH(VCC) tPHL(VCC) Average temperature coefficient of low to high propagation delay Average temperature coefficient of high to low propagation delay Average VCC coefficient of low to high propagation delay Average VCC coefficient of high to low propagation delay A Y A Y A Y -1452 pS/ 100 mV A Y -1002 pS/ 100 mV 851 1 50 pS/10°C pS/10°C Note: 1 tPLH(T) and tPHL(T) are virtually independent of VCC. 2 tPLH(VCC) and tPHL(VCC) are virtually independent of temperature. 3 This data was extracted from characterization material and are not tested at the factory. 1-Line To 10-Line Clock Driver With 3-State Outputs Notice: The information in this document is subject to change without notice. 4 of 12 ASM2P2351AH November 2006 rev 0.3 Parameter Measurement Information 6V From Output Under Test CL = 50pF (see Note A) OPEN S1 500Ω GND 500Ω LOAD CIRCUIT 3V 1.5V TIMING INPUT OV tsu th 3V DATA INPUT 1.5V 1.5V 3V 1.5V 1.5V INPUT OV tPLH tPHL VOH 2V 2V 1.5V 0.8V 0.8V OUTPUT tr VOL tr tW 3V INPUT 1.5V 1.5V OV 1-Line To 10-Line Clock Driver With 3-State Outputs Notice: The information in this document is subject to change without notice. 5 of 12 ASM2P2351AH November 2006 rev 0.3 3V Output Control (low-level enabling) 1.5 V 1.5 V 0V tPLZ tPHZ Output Waveform 1 S1 at 6 V (see Note B) 3V VOL + O.3 V 1.5 V VOL tPHZ tPZH VOH Output Waveform 2 S1 at GND (see Note B) 1.5 V VOH. – 0.3 V 0V Figure 1. Load Circuit and Voltage Waveforms NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 3 10 MHz, ZO = 50Ω, tr 3 2.5 nS, tf 3 2.5 nS. D. The outputs are measured one at a time with one transition per measurement. 1-Line To 10-Line Clock Driver With 3-State Outputs Notice: The information in this document is subject to change without notice. 6 of 12 ASM2P2351AH November 2006 rev 0.3 Parameter Measurement Information A Y1 tPHL 1 tPLH 1 tPHL 2 tPLH 2 tPHL 3 tPLH 3 tPHL 4 tPLH 4 tPHL 5 tPLH 5 tPHL 6 tPLH 6 tPHL 7 tPLH 7 Y2 Y3 Y4 Y5 Y6 Y7 Y8 tPHL 8 tPLH 8 tPHL 9 tPLH 9 tPHL 10 tPLH 10 Y9 Y10 Figure 2. Waveforms for Calculation of tsk(o), tsk(p), tsk(pr) NOTES: A. Output skew, tsk(o), is calculated as the greater of: – The difference between the fastest and slowest of tPLHn (n = 1, 2, 3, 4, 5, 6, 7, 8, 9, 10) – The difference between the fastest and slowest of tPHLn (n = 1, 2, 3, 4, 5, 6, 7, 8, 9, 10) B. Pulse skew, tsk(p), is calculated as the greater of | tPLHn – tPHLn | (n = 1, 2, 3, 4, 5, 6, 7, 8, 9, 10). C. Process skew, tsk(pr), is calculated as the greater of: – The difference between the fastest and slowest of tPLHn (n = 1, 2, 3, 4, 5, 6, 7, 8, 9, 10) across multiple devices under identical operating conditions – The difference between the fastest and slowest of tPHLn (n = 1, 2, 3, 4, 5, 6, 7, 8, 9, 10) across multiple devices under identical operating conditions 1-Line To 10-Line Clock Driver With 3-State Outputs Notice: The information in this document is subject to change without notice. 7 of 12 ASM2P2351AH November 2006 rev 0.3 Package Information 24L SSOP (209 mil) Dimensions Symbol Inches Min Max Millimeters Min Max A …. 0.079 … 2.0 A1 0.002 … 0.05 … A2 0.065 0.073 1.65 1.85 D 0.315 0.331 8.00 8.40 L 0.021 0.037 0.55 0.95 E 0.295 0.319 7.50 8.10 E1 0.197 0.220 5.00 5.60 R1 0.004 …. 0.09 ….. b 0.009 0.015 0.22 0.38 c 0.004 0.010 0.09 0.25 L1 0.050REF 1.25 REF e 0.026 BSC 0.65 BSC a 0° 8° 0° 8° 1-Line To 10-Line Clock Driver With 3-State Outputs Notice: The information in this document is subject to change without notice. 8 of 12 ASM2P2351AH November 2006 rev 0.3 24L SOIC (300 mil) Dimensions Symbol Inches Min Max Millimeters Min Max A 0.093 0.104 2.35 2.65 A1 0.004 0.012 0.10 0.30 A2 0.088 0.094 2.25 2.40 D 0.598 0.614 15.20 15.60 L 0.016 0.050 0.40 1.27 E1 0.291 0.299 7.40 7.60 R1 0.003 …. 0.08 ….. b 0.013 0.022 0.33 0.56 c 0.009 0.015 0.23 0.38 E 0.394 0.419 10.00 10.65 e a 0.050 BSC 0° 1.27 BSC 8° 0° 8° 1-Line To 10-Line Clock Driver With 3-State Outputs Notice: The information in this document is subject to change without notice. 9 of 12 ASM2P2351AH November 2006 rev 0.3 Ordering Information Part Number Marking Package Type Temperature ASM2P2351AHF-24AR 2P2351AHF 24-Pin SSOP, TAPE & REEL, Pb Free Commercial ASM2P2351AHF-24AT 2P2351AHF 24-Pin SSOP, TUBE, Pb Free Commercial ASM2P2351AHF -24SR 2P2351AHF 24-Pin SOIC, TAPE & REEL, Pb Free Commercial ASM2P2351AHF-24ST 2P2351AHF 24-Pin SOIC, TUBE, Pb Free Commercial ASM2P2351AF-24AR 2P2351AF 24-Pin SSOP, TAPE & REEL, Pb Free Commercial ASM2P2351AF-24AT 2P2351AF 24-Pin SSOP, TUBE, Pb Free Commercial ASM2P2351AF -24SR 2P2351AF 24-Pin SOIC, TAPE & REEL, Pb Free Commercial ASM2P2351AF-24ST 2P2351AF 24-Pin SOIC, TUBE, Pb Free Commercial ASM2P2351AHG-24AR 2P2351AHG 24-Pin SSOP, TAPE & REEL, Green Commercial ASM2P2351AHG-24AT 2P2351AHG 24-Pin SSOP, TUBE, Green Commercial ASM2P2351AHG -24SR 2P2351AHG 24-Pin SOIC, TAPE & REEL, Green Commercial ASM2P2351AHG-24ST 2P2351AHG 24-Pin SOIC, TUBE, Green Commercial ASM2P2351AG-24AR 2P2351AG 24-Pin SSOP, TAPE & REEL, Green Commercial ASM2P2351AG-24AT 2P2351AG 24-Pin SSOP, TUBE, Green Commercial ASM2P2351AG -24SR 2P2351AG 24-Pin SOIC, TAPE & REEL, Green Commercial ASM2P2351AG-24ST 2P2351AG 24-Pin SOIC, TUBE, Green Commercial 1-Line To 10-Line Clock Driver With 3-State Outputs Notice: The information in this document is subject to change without notice. 10 of 12 ASM2P2351AH November 2006 rev 0.3 Device Ordering Information A S M 2 P 2 3 5 1 A H F - 2 4 A R R = Tape & Reel, T = Tube or Tray O = SOT S = SOIC T = TSSOP A = SSOP V = TVSOP B = BGA Q = QFN U = MSOP E = TQFP L = LQFP U = MSOP P = PDIP D = QSOP X = SC-70 DEVICE PIN COUNT F = LEAD FREE AND RoHS COMPLIANT PART G = GREEN PACKAGE, LEAD FREE, and RoHS PART NUMBER X= Automotive I= Industrial P or n/c = Commercial (-40C to +125C) (-40C to +85C) (0C to +70C) 1 = Reserved 2 = Non PLL based 3 = EMI Reduction 4 = DDR support products 5 = STD Zero Delay Buffer 6 = Power Management 7 = Power Management 8 = Power Management 9 = Hi Performance 0 = Reserved PulseCore Semiconductor Mixed Signal Product Licensed under US patent Nos 5,488,627 and 5,631,920. 1-Line To 10-Line Clock Driver With 3-State Outputs Notice: The information in this document is subject to change without notice. 11 of 12 ASM2P2351AH November 2006 rev 0.3 PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200 Campbell, CA 95008 Tel: 408-879-9077 Fax: 408-879-9018 www.pulsecoresemi.com Copyright © PulseCore Semiconductor All Rights Reserved Preliminary Information Part Number: ASM2P2351AH Document Version: v0.3 Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003 © Copyright 2006 PulseCore Semiconductor Corporation. All rights reserved. Our logo and name are trademarks or registered trademarks of PulseCore Semiconductor. All other brand and product names may be the trademarks of their respective companies. PulseCore reserves the right to make changes to this document and its products at any time without notice. PulseCore assumes no responsibility for any errors that may appear in this document. The data contained herein represents PulseCore’s best data and/or estimates at the time of issuance. PulseCore reserves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. PulseCore does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of PulseCore products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in PulseCore’s Terms and Conditions of Sale (which are available from PulseCore). All sales of PulseCore products are made exclusively according to PulseCore’s Terms and Conditions of Sale. The purchase of products from PulseCore does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of PulseCore or third parties. PulseCore does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of PulseCore products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify PulseCore against all claims arising from such use. 1-Line To 10-Line Clock Driver With 3-State Outputs Notice: The information in this document is subject to change without notice. 12 of 12