TI 74AC11000DE4

74AC11000
QUADRUPLE 2-INPUT POSITIVE-NAND GATE
www.ti.com
SCLS054B – APRIL 1987 – REVISED JUNE 2005
FEATURES
•
•
•
•
D OR N PACKAGE
(TOP VIEW)
Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
EPIC™ (Enhanced-Performance Implanted
CMOS) 1-µm Process
500-mA Typ Latch-Up Immunity at 125°C
Package Options Include Plastic
Small-Outline (D) Packages and Standard
Plastic 300-mil DIPs (N)
1A
1Y
2Y
GND
GND
3Y
4Y
4B
1
16
2
15
3
14
4
13
5
12
6
7
11
10
8
9
1B
2A
2B
VCC
VCC
3A
3B
4A
DESCRIPTION
This device contains four independent 2-input NAND gates. It performs the Boolean function Y = A • B or
Y = A + B in positive logic.
The 74AC11000 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(EACH GATE)
INPUTS
OUTPUT
Y
A
B
H
H
L
L
X
H
X
L
H
LOGIC SYMBOL(1)
1A
1B
2A
2B
3A
3B
4A
4B
(1)
1
16
&
2
1Y
15
14
3
2Y
11
10
6
3Y
9
8
7
4Y
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1987–2005, Texas Instruments Incorporated
74AC11000
QUADRUPLE 2-INPUT POSITIVE-NAND GATE
www.ti.com
SCLS054B – APRIL 1987 – REVISED JUNE 2005
LOGIC DIAGRAM (POSITIVE LOGIC)
1A
1B
2A
2B
3A
3B
4A
4B
1
2
16
15
3
14
11
6
10
9
8
7
1Y
2Y
3Y
4Y
Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
VCC
Supply voltage range
–0.5
7
V
VI
Input voltage range (2)
–0.5
VCC + 0.5
V
–0.5
VCC + 0.5
range (2)
UNIT
VO
Output voltage
IIK
Input clamp current
VI < 0 or VI > VCC
±20
mA
IOK
Output clamp current
VO < 0 or VO > VCC
±50
mA
IO
Continuous output current
VO = 0 to VCC
±50
mA
±100
mA
Continuous current through VCC or GND
Maximum power dissipation at TA = 55°C (in still air) (3)
Tstg
(1)
(2)
(3)
2
Storage temperature range
D package
1.3
N package
1.1
–65
150
V
W
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils,
except for the N package, which has a trace length of zero.
74AC11000
QUADRUPLE 2-INPUT POSITIVE-NAND GATE
www.ti.com
SCLS054B – APRIL 1987 – REVISED JUNE 2005
Recommended Operating Conditions
VCC
MIN
NOM
MAX
3
5
5.5
Supply voltage
VCC = 3 V
VIH
High-level input voltage
UNIT
V
2.1
VCC = 4.5 V
3.15
VCC = 5.5 V
3.85
V
VCC = 3 V
0.9
VIL
Low-level input voltage
VCC = 4.5 V
1.35
VI
Input voltage
0
VCC
V
VO
Output voltage
0
VCC
V
VCC = 5.5 V
1.65
VCC = 3 V
IOH
High-level output current
IOL
Low-level output current
∆t/∆v
Input transition rise fall rate
TA
Operating free-air temperature
V
–4
VCC = 4.5 V
–24
VCC = 5.5 V
–24
VCC = 3 V
12
VCC = 4.5 V
24
VCC = 5.5 V
24
mA
mA
0
10
ns/V
–40
85
°C
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = –50 µA
VOH
IOH = –4 mA
IOH = –24 mA
VOL
TA = 25°C
MIN
TYP MAX
MIN MAX
3V
2.9
2.9
4.5 V
4.4
4.4
5.5 V
5.4
5.4
3V
2.58
2.48
4.5 V
3.94
3.8
5.5 V
4.94
4.8
5.5 V
3V
0.1
0.1
IOL = 50 µA
4.5 V
0.1
0.1
IOL = 12 mA
0.1
0.1
3V
0.36
0.44
4.5 V
0.36
0.44
5.5 V
0.36
0.44
5.5 V
II
VI = VCC or GND
5.5 V
ICC
VI = VCC or GND,
Ci
VI = VCC or GND
IO = 0
3.85
5.5 V
IOL = 75 mA (1)
V
1.65
5.5 V
5V
UNIT
V
IOH = –75 mA (1)
IOL = 24 mA
(1)
VCC
3.5
±0.1
±1
µA
4
40
µA
pF
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
3
74AC11000
QUADRUPLE 2-INPUT POSITIVE-NAND GATE
www.ti.com
SCLS054B – APRIL 1987 – REVISED JUNE 2005
Switching Characteristics
over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
FROM
(INPUT)
TO
(OUTPUT)
A or B
Y
TA = 25°C
MIN
TYP MAX
MIN MAX
1.5
7.2
9.8
1.5
11.1
1.5
5.8
8.6
1.5
9.6
UNIT
ns
Switching Characteristics
over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
FROM
(INPUT)
TO
(OUTPUT)
A or B
Y
TA = 25°C
MIN
TYP MAX
MIN MAX
1.5
5
6.5
1.5
7.4
1.5
4.4
6.1
1.5
6.8
UNIT
ns
Operating Characteristics
VCC = 5 V, TA = 25°C
PARAMETER
Cpd
TEST CONDITIONS
Power dissipation capacitance per gate
CL = 50 pF,
f = 1 MHz
TYP
UNIT
33
pF
PARAMETER MEASUREMENT INFORMATION
VCC
Input
(see Note B)
From Output
Under Test
CL = 50 pF
(see Note A)
50%
50%
0V
tPHL
500 Ω
Output
tPLH
50% VCC
VOH
50% VCC
VOL
LOAD CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. Input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
4
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
74AC11000D
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74AC11000DE4
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74AC11000DG4
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74AC11000DR
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74AC11000DRE4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74AC11000DRG4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74AC11000N
ACTIVE
PDIP
N
16
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
74AC11000NE4
ACTIVE
PDIP
N
16
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
74AC11000NSR
ACTIVE
SO
NS
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74AC11000NSRE4
ACTIVE
SO
NS
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74AC11000NSRG4
ACTIVE
SO
NS
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
74AC11000DR
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.1
8.0
16.0
Q1
74AC11000NSR
SO
NS
16
2000
330.0
16.4
8.2
10.5
2.5
12.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
74AC11000DR
74AC11000NSR
SOIC
D
16
2500
333.2
345.9
28.6
SO
NS
16
2000
367.0
367.0
38.0
Pack Materials-Page 2
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