SCAS059A − D2957, JULY 1987 − REVISED APRIL 1993
•
•
•
•
•
•
•
DW OR NT PACKAGE
(TOP VIEW)
Local Bus-Latch Capability
Inputs Are TTL-Voltage Compatible
Flow-Through Architecture Optimizes
PCB Layout
Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
EPICt (Enhanced-Performance Implanted
CMOS) 1-mm Process
500-mA Typical Latch-Up Immunity
at 125°C
Package Options Include Plastic SmallOutline Packages and Standard Plastic
300-mil DIPs
A1
A2
A3
A4
GND
GND
GND
GND
A5
A6
A7
A8
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
GAB
B1
B2
B3
B4
VCC
VCC
B5
B6
B7
B8
GBA
description
The 74ACT11623 is designed for asynchronous two-way communication between data buses. The control
function implementation allows for maximum flexibility in timing.
The device allows data transmission from the A bus to the B bus or from the B bus to the A bus depending upon
the logic levels at the enable inputs (GBA and GAB). The enable inputs can be used to disable the device so
that the buses are effectively isolated.
The dual-enable configuration gives these devices the capability to store data by simultaneous enabling of GBA
and GAB. Each output reinforces its input in this transceiver configuration. Thus, when both control inputs are
enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (16
in all) will remain at their last states. The 8-bit codes appearing on the two sets of buses will be identical for the
74ACT11623.
The 74ACT11623 is characterized for operation from − 40°C to 85°C.
FUNCTION TABLE
ENABLE INPUTS
GBA
GAB
L
L
H
H
H
L
L
H
OPERATION
B data to A bus
A data to B bus
Isolation
B data to A bus,
A data to B bus
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1993, Texas Instruments Incorporated
!"# $ %&'# "$ (&)*%"# +"#',
+&%#$ %! # $('%%"#$ (' #-' #'!$ '."$ $#&!'#$
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#'$#1 "** (""!'#'$,
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
2−1
SCAS059A − D2957, JULY 1987 − REVISED APRIL 1993
logic symbol†
GBA
GAB
A1
A2
A3
A4
A5
A6
A7
A8
13
24
1
2
logic diagram (positive logic)
EN1
GBA
EN2
23
1
2
22
3
21
4
20
9
17
10
16
11
15
12
14
B1
B2
GAB
A1
B1
A2
B2
B3
B4
B5
B6
To Six Other Transceivers
B7
B8
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 200 mA
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2−2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SCAS059A − D2957, JULY 1987 − REVISED APRIL 1993
recommended operating conditions
MIN
MAX
4.5
5.5
VCC
VIH
Supply voltage
VIL
VI
Low-level input voltage
Input voltage
0
VO
IOH
Output voltage
0
IOL
Dt /Dv
TA
Operating free-air temperature
High-level input voltage
2
UNIT
V
V
0.8
V
VCC
VCC
V
High-level output current
−24
mA
Low-level output current
24
mA
0
10
ns/ V
− 40
85
°C
Input transition rise or fall rate
V
electrical characteristics over recommended operating free-air temperature range
PARAMETER
TEST CONDITIONS
MIN
4.5 V
4.4
4.4
5.5 V
5.4
5.4
4.5 V
3.94
3.8
IOH = − 24 mA
5.5 V
4.94
4.8
IOH = − 75 mA†
5.5 V
A
IOH = − 50 mA
VOH
A
IOL = 50 mA
VOL
TA = 25°C
TYP
MAX
VCC
IOL = 24 mA
MIN
MAX
UNIT
V
3.85
4.5 V
0.1
5.5 V
0.1
0.1
0.1
4.5 V
0.36
0.44
5.5 V
0.36
0.44
V
IOL = 75 mA†
VO = VCC or GND
5.5 V
5.5 V
± 0.5
±5
VI = VCC or GND
VI = VCC or GND, IO = 0
5.5 V
± 0.1
±1
mA
ICC
5.5 V
4
40
µA
DICC§
One input at 3.4 V, Other inputs at GND or VCC
5.5 V
0.9
1
mA
IOZ
II
A or B ports‡
GBA or GAB
Ci
1.65
GBA or GAB
VI = VCC or GND
5V
4
Cio
A or B ports
VO = VCC or GND
5V
20
† Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
‡ For I/O ports, the parameter IOZ includes the input leakage.
§ This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
mA
pF
pF
2−3
SCAS059A − D2957, JULY 1987 − REVISED APRIL 1993
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A or B
B or A
tPZH
tPZL
GBA
A
tPHZ
tPLZ
GBA
A
tPZH
tPZL
GAB
B
tPHZ
tPLZ
GAB
B
TA = 25°C
TYP
MAX
MIN
MAX
1.5
6
7.5
1.5
8.5
1.5
5.5
7.2
1.5
7.9
1.5
6.9
8.6
1.5
9.7
1.5
6.9
9
1.5
10
1.5
8.1
10
1.5
10.9
1.5
8.5
10.5
1.5
11.5
1.5
7.7
9.3
1.5
10.7
1.5
7.7
9.7
1.5
10.9
1.5
7.1
8.8
1.5
9.5
1.5
7.3
9.2
1.5
10
MIN
UNIT
ns
ns
ns
ns
ns
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
Outputs enabled
Cpd
2−4
Power dissipation capacitance per transceiver
Outputs disabled
POST OFFICE BOX 655303
TYP
UNIT
41
CL = 50 pF,
• DALLAS, TEXAS 75265
f = 1 MHz
8
pF
SCAS059A − D2957, JULY 1987 − REVISED APRIL 1993
PARAMETER MEASUREMENT INFORMATION
2 × VCC
S1
500 Ω
From Output
Under Test
Open
GND
CL = 50 pF
(see Note A)
Output
Control
(low-level
enabling)
3V
1.5 V
1.5 V
0V
tPLH
tPHL
VOH
Output
S1
Open
2 × VCC
GND
500 Ω
LOAD CIRCUIT
Input
(see Note B)
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
50% VCC
50% VCC
VOL
3V
0V
tPZL
tPLZ
Output
Waveform 1
S1 at 2 × VCC
(see Note C)
Output
Waveform 2
S1 at GND
(see Note C)
1.5 V
1.5 V
50% VCC
20% VCC
VOL
tPHZ
tPZH
VOLTAGE WAVEFORMS
[ VCC
50% VCC
80% VCC
VOH
[0V
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
2−5
PACKAGE OPTION ADDENDUM
www.ti.com
11-Nov-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
74ACT11623DW
ACTIVE
SOIC
DW
24
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74ACT11623DWE4
ACTIVE
SOIC
DW
24
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74ACT11623DWE4
ACTIVE
SOIC
DW
24
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74ACT11623DWG4
ACTIVE
SOIC
DW
24
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74ACT11623DWG4
ACTIVE
SOIC
DW
24
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74ACT11623DWR
ACTIVE
SOIC
DW
24
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74ACT11623DWR
ACTIVE
SOIC
DW
24
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74ACT11623DWRE4
ACTIVE
SOIC
DW
24
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74ACT11623DWRE4
ACTIVE
SOIC
DW
24
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74ACT11623DWRG4
ACTIVE
SOIC
DW
24
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74ACT11623DWRG4
ACTIVE
SOIC
DW
24
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
11-Nov-2009
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
74ACT11623DWR
Package Package Pins
Type Drawing
SOIC
DW
24
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2000
330.0
24.4
Pack Materials-Page 1
10.75
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
15.7
2.7
12.0
24.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
74ACT11623DWR
SOIC
DW
24
2000
367.0
367.0
45.0
Pack Materials-Page 2
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