INA128 INA129 SBOS051B − OCTOBER 1995 − REVISED FEBRUARY 2005 Precision, Low Power INSTRUMENTATION AMPLIFIERS FEATURES D D D D D D D D DESCRIPTION LOW OFFSET VOLTAGE: 50µV max LOW DRIFT: 0.5µV/5C max LOW INPUT BIAS CURRENT: 5nA max HIGH CMR: 120dB min INPUTS PROTECTED TO +40V WIDE SUPPLY RANGE: +2.25V to +18V LOW QUIESCENT CURRENT: 700µA 8-PIN PLASTIC DIP, SO-8 The INA128 and INA129 are low power, general purpose instrumentation amplifiers offering excellent accuracy. The versatile 3-op amp design and small size make them ideal for a wide range of applications. Current-feedback input circuitry provides wide bandwidth even at high gain (200kHz at G = 100). A single external resistor sets any gain from 1 to 10,000. The INA128 provides an industry-standard gain equation; the INA129 gain equation is compatible with the AD620. APPLICATIONS D D D D D The INA128/INA129 is laser trimmed for very low offset voltage (50µV), drift (0.5µV/°C) and high common-mode rejection (120dB at G ≥ 100). It operates with power supplies as low as ±2.25V, and quiescent current is only 700µA—ideal for batteryoperated systems. Internal input protection can withstand up to ±40V without damage. BRIDGE AMPLIFIER THERMOCOUPLE AMPLIFIER RTD SENSOR AMPLIFIER MEDICAL INSTRUMENTATION DATA ACQUISITION The INA128/INA129 is available in 8-pin plastic DIP and SO-8 surface-mount packages, specified for the –40°C to +85°C temperature range. The INA128 is also available in a dual configuration, the INA2128. V+ 7 2 − VIN INA128: INA128, INA129 G=1+ Over-Voltage Protection A1 40kΩ 1 G=1+ A3 8 + VIN 3 INA129: 40kΩ 25kΩ(1) RG 50kΩ RG 6 49.4kΩ RG VO 25kΩ(1) Over-Voltage Protection 5 A2 NOTE: (1) INA129: 24.7kΩ 40kΩ Ref 40kΩ 4 V− Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. Copyright 1995−2005, Texas Instruments Incorporated ! ! www.ti.com "#$ "#% www.ti.com SBOS051B − OCTOBER 1995 − REVISED FEBRUARY 2005 ELECTROSTATIC DISCHARGE SENSITIVITY ABSOLUTE MAXIMUM RATINGS(1) Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18V Analog Input Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . ±40V Output Short-Circuit (to ground) . . . . . . . . . . . . . . . . . . Continuous Operating Temperature . . . . . . . . . . . . . . . . . . . −40°C to +125°C Storage Temperature Range . . . . . . . . . . . . . . . . . −55°C to +125°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C Lead Temperature (soldering, 10s) . . . . . . . . . . . . . . . . . . . . . +300°C (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet. PIN CONFIGURATION 8-Pin DIP and SO-8 Top View RG 2 1 8 RG IN 2 7 V+ V+IN 3 6 VO V− 4 5 Ref V − "#$ "#% www.ti.com SBOS051B − OCTOBER 1995 − REVISED FEBRUARY 2005 ELECTRICAL CHARACTERISTICS At TA = +25°C, VS = ±15V, RL = 10kΩ, unless otherwise noted. INA128P, U INA129P. U PARAMETER CONDITIONS MIN INA128PA, UA INA129PA, UA TYP MAX TA = +25°C ±10±100/G TA = TMIN to TMAX VS = ±2.25V to ±18V ±0.2±2/G ±0.2±20/G MIN TYP MAX UNIT ±50±500/G ±25±100/G ±125±1000/G µV ±0.5±20/G ±0.2±5/G ±1±20/G µV/°C ±1±100/G ∗ ±2±200/G INPUT Offset Voltage, RTI Initial vs Temperature vs Power Supply µV/V Long-Term Stability ±0.1±3/G ∗ µV/mo Impedance, Differential 1010 || 2 ∗ Ω || pF Common-Mode 1011 || 9 ∗ Ω || pF V Common-Mode Voltage Range(1) VO = 0V (V+) − 2 (V+) − 1.4 ∗ ∗ (V−) + 2 (V−) + 1.7 ∗ ∗ ±40 Safe Input Voltage Common-Mode Rejection V ∗ V VCM = ±13V, ∆RS = 1kΩ G=1 80 86 73 ∗ dB G = 10 100 106 93 ∗ dB G = 100 120 125 110 ∗ dB G = 1000 120 130 110 ∗ BIAS CURRENT ±2 vs Temperature ±30 ±1 Offset Current ±5 ∗ dB ±10 ∗ ±5 ∗ nA pA/°C ±10 nA ±30 ∗ pA/°C f = 10Hz 10 ∗ nV/√Hz f = 100Hz 8 ∗ nV/√Hz f = 1kHz 8 ∗ nV/√Hz 0.2 ∗ µVPP f = 10Hz 0.9 ∗ pA/√Hz f = 1kHz 0.3 ∗ pA/√Hz fB = 0.1Hz to 10Hz 30 ∗ pAPP Gain Equation, INA128 1 + (50kΩ/RG) ∗ V/V Gain Equation, INA129 1 + (49.4kΩ/RG) ∗ vs Temperature NOISE VOLTAGE, RTI G = 1000, RS = 0Ω fB = 0.1Hz to 10Hz Noise Current GAIN Range of Gain Gain Error Gain vs Temperature(2) 1 ∗ V/V ∗ V/V G=1 ±0.01 ±0.024 ∗ ±0.1 % G = 10 ±0.02 ±0.4 ∗ ±0.5 % G = 100 ±0.05 ±0.5 ∗ ±0.7 % G = 1000 ±0.5 ±1 ∗ ±2 % G=1 ±1 ±10 ∗ ∗ ppm/°C ±25 ±100 ∗ ∗ ppm/°C VO = ±13.6V, G = 1 ±0.0001 ±0.001 ∗ ±0.002 % of FSR 50kΩ (or 49.4kΩ) Resistance(2)(3) Nonlinearity 10000 G = 10 ±0.0003 ±0.002 ∗ ±0.004 % of FSR G = 100 ±0.0005 ±0.002 ∗ ±0.004 % of FSR G = 1000 ±0.001 (4) ∗ ∗ % of FSR NOTE: ∗ Specification is same as INA128P, U or INA129P, U. (1) Input common-mode range varies with output voltage — see typical curves. (2) Specified by wafer test. (3) Temperature coefficient of the 50kΩ (or 49.4kΩ) term in the gain equation. (4) Nonlinearity measurements in G = 1000 are dominated by noise. Typical nonlinearity is ±0.001%. 3 "#$ "#% www.ti.com SBOS051B − OCTOBER 1995 − REVISED FEBRUARY 2005 ELECTRICAL CHARACTERISTICS (continued) At TA = +25°C, VS = ±15V, RL = 10kΩ, unless otherwise noted. INA128P, U INA129P. U PARAMETER CONDITIONS MIN TYP Voltage: Positive RL = 10kΩ (V+) − 1.4 Voltage: Negative RL = 10kΩ (V−) + 1.4 INA128PA, UA INA129PA, UA MAX MIN TYP MAX UNIT (V+) − 0.9 ∗ ∗ (V−) + 0.8 ∗ ∗ V 1000 ∗ pF +6/−15 ∗ mA OUTPUT Load Capacitance Stability Short-Circuit Current V FREQUENCY RESPONSE Bandwidth, −3dB Slew Rate Settling Time, 0.01% Overload Recovery G=1 1.3 ∗ MHz G = 10 700 ∗ kHz G = 100 200 ∗ kHz G = 1000 20 ∗ kHz VO = ±10V, G = 10 4 ∗ V/µs G=1 7 ∗ µs G = 10 7 ∗ µs G = 100 9 ∗ µs G = 1000 80 ∗ µs 50% Overdrive 4 ∗ µs POWER SUPPLY ±2.25 Voltage Range Current, Total VIN = 0V ±15 ±18 ±700 ±750 ∗ ∗ ∗ V ∗ ∗ µA °C TEMPERATURE RANGE Specification −40 +85 ∗ ∗ Operating −40 +125 ∗ ∗ qJA 80 ∗ °C/W SO-8 SOIC 150 ∗ °C/W NOTE: ∗ Specification is same as INA128P, U or INA129P, U. (1) Input common-mode range varies with output voltage — see typical curves. (2) Specified by wafer test. (3) Temperature coefficient of the 50kΩ (or 49.4kΩ) term in the gain equation. (4) Nonlinearity measurements in G = 1000 are dominated by noise. Typical nonlinearity is ±0.001%. 4 °C 8-Pin DIP "#$ "#% www.ti.com SBOS051B − OCTOBER 1995 − REVISED FEBRUARY 2005 TYPICAL CHARACTERISTICS At TA = +25°C, VS = ±15V, unless otherwise noted. COMMON−MODE REJECTION vs FREQUENCY GAIN vs FREQUENCY 140 60 G = 1000V/V G = 100V/V G = 1000V/V Common−Mode Rejection (dB) 50 40 Gain (dB) G = 100V/V 30 20 G = 10V/V 10 0 G = 1V/V − 10 − 20 120 G = 10V/V 100 G = 1V/V 80 60 40 20 0 1k 10k 100k 1M 10M 10 100 1k 100k 10k Frequency (Hz) Frequency (Hz) POSITIVE POWER SUPPLY REJECTION vs FREQUENCY NEGATIVE POWER SUPPLY REJECTION vs FREQUENCY 140 1M 140 Power Supply Rejection (dB) Power Supply Rejection (dB) G = 1000V/V 120 G = 1000V/V 100 G = 100V/V 80 60 G = 10V/V 40 G = 1V/V 20 1k 10k 100k 1M 60 G = 10V/V 40 G = 1V/V 20 100 10k 100k INPUT COMMON−MODE RANGE vs OUTPUT VOLTAGE, VS = ±15V INPUT COMMON−MODE RANGE vs OUTPUT VOLTAGE, VS = ±5V, ±2.5V G=1 G=1 VD/2 VD/2 + VCM +15V − + VO − Ref + − 15V −10 G ≥ 10 G ≥ 10 4 5 0 1M 5 G ≥ 10 10 3 2 G=1 G=1 G ≥ 10 1 0 G=1 −1 −2 −3 VS = ±5V VS = ±2.5V −4 −15 −15 1k Frequency (Hz) G ≥ 10 −5 80 Frequency (Hz) Common−Mode Voltage (V) Common−Mode Voltage (V) 15 100 G = 100V/V 100 0 10 0 10 120 −5 −10 −5 0 5 Output Voltage (V) 10 15 −5 −4 −3 −2 −1 0 1 2 3 4 5 Output Voltage (V) 5 "#$ "#% www.ti.com SBOS051B − OCTOBER 1995 − REVISED FEBRUARY 2005 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = ±15V, unless otherwise noted. SETTLING TIME vs GAIN 100 100 10 G = 10V/V 10 1 G = 100, 1000V/V Current Noise 1 0.01% Settling Time (m s) G = 1V/V 100 Input Bias Current Noise (pA/√Hz) Input-Referred Voltage Noise (nV/√Hz) INPUT−REFERRED NOISE vs FREQUENCY 1k 1 0.1 1 10 100 1k 0.1% 10 1 10k 10 100 1000 Gain (V/V) Frequency (Hz) QUIESCENT CURRENT and SLEW RATE vs TEMPERATURE 0.85 INPUT OVER−VOLTAGE V/I CHARACTERISTICS 5 6 3 5 0.75 4 Slew Rate 0.7 3 IQ 0.65 Input Current (mA) 0.8 Slew Rate (V/µs) Quiescent Current (µA) 4 2 −25 0 25 50 Temperature (°C) 75 100 G = 1V/V 0 −1 +15V G = 1V/V −2 −4 −50 G = 1000V/V 1 −3 2 06 −75 Flat region represents normal linear operation. −5 −50 1 125 VIN G = 1000V/V −40 0 −30 −20 −10 IIN −15V 10 20 30 40 50 Input Voltage (V) INPUT BIAS CURRENT vs TEMPERATURE INPUT OFFSET VOLTAGE WARM−UP 2 10 6 Input Bias Current (nA) Offset Voltage Change (µV) 8 4 2 0 −2 −4 1 IOS 0 IB −1 Typical IB and IOS Range ±2nA at 25°C −6 −8 −2 −10 0 100 200 300 Time (µs) 6 400 500 −75 −50 −25 0 25 50 Temperature (°C) 75 100 125 "#$ "#% www.ti.com SBOS051B − OCTOBER 1995 − REVISED FEBRUARY 2005 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = ±15V, unless otherwise noted. OUTPUT VOLTAGE SWING vs POWER SUPPLY VOLTAGE (V+) (V+)−0.4 Output Voltage Swing (V) (V+) (V+)−0.4 (V+)−0.8 (V+)−1.2 (V−)+1.2 (V−)+0.8 (V−)+0.4 +85°C +25°C (V+)−0.8 (V+)−1.2 −40°C RL = 10kΩ +25°C (V−)+1.2 −40°C +85°C (V−)+0.8 +85°C −40°C (V−)+0.4 (V−) (V−) 0 1 2 3 0 4 5 Output Current (mA) 10 15 20 Power Supply Voltage (V) SHORT−CIRCUIT OUTPUT CURRENT vs TEMPERATURE MAXIMUM OUTPUT VOLTAGE vs FREQUENCY 30 16 Peak−to−Peak Output Voltage (VPP) 18 −ISC 14 12 10 8 6 +ISC 4 2 G = 10, 100 25 G=1 G = 1000 20 15 10 5 0 0 −75 −50 −25 0 25 50 75 100 1k 125 10k 100k 1M Frequency (Hz) Temperature (°C) TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 1 VO = 1Vrms 500kHz Measurement Bandwidth THD + N (%) Short−Circuit Current (mA) Output Voltage (V) OUTPUT VOLTAGE SWING vs OUTPUT CURRENT 0.1 G=1 RL = 10kΩ G = 100, RL = 100kΩ 0.01 G = 1, RL = 100kΩ Dashed Portion is noise limited. 0.001 100 1k 10k G = 10V/V RL = 100kΩ 100k Frequency (Hz) 7 "#$ "#% www.ti.com SBOS051B − OCTOBER 1995 − REVISED FEBRUARY 2005 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = ±15V, unless otherwise noted. SMALL SIGNAL (G = 1, 10) SMALL SIGNAL (G = 100, 1000) G=1 G = 100 20mV/div 20mV/div G = 10 G = 1000 20µs/div 5µs/div LARGE SIGNAL (G = 100, 1000) LARGE SIGNAL (G = 1, 10) G=1 G = 100 5V/div 5V/div G = 10 G = 1000 5µs/div 20µs/div VOLTAGE NOISE 0.1 to 10Hz INPUT−REFERRED, G ≥ 100 0.1µV/div 1s/div 8 "#$ "#% www.ti.com SBOS051B − OCTOBER 1995 − REVISED FEBRUARY 2005 APPLICATIONS INFORMATION Figure 1 shows the basic connections required for operation of the INA128/INA129. Applications with noisy or high impedance power supplies may require decoupling capacitors close to the device pins as shown. resistors are laser trimmed to accurate absolute values. The accuracy and temperature coefficient of these internal resistors are included in the gain accuracy and drift specifications of the INA128/INA129. The output is referred to the output reference (Ref) terminal which is normally grounded. This must be a low-impedance connection to assure good common-mode rejection. A resistance of 8Ω in series with the Ref pin will cause a typical device to degrade to approximately 80dB CMR (G = 1). The stability and temperature drift of the external gain setting resistor, RG, also affects gain. RG’s contribution to gain accuracy and drift can be directly inferred from the gain equation (1). Low resistor values required for high gain can make wiring resistance important. Sockets add to the wiring resistance which will contribute additional gain error (possibly an unstable gain error) in gains of approximately 100 or greater. SETTING THE GAIN DYNAMIC PERFORMANCE Gain is set by connecting a single external resistor, RG, connected between pins 1 and 8: The typical performance curve Gain vs Frequency shows that, despite its low quiescent current, the INA128/INA129 achieves wide bandwidth, even at high gain. This is due to the current-feedback topology of the input stage circuitry. Settling time also remains excellent at high gain. INA128: G + 1) 50kW RG (1) INA129: G + 1) 49.4kW RG NOISE PERFORMANCE (2) Commonly used gains and resistor values are shown in Figure 1. The 50kΩ term in Equation 1 (49.4kΩ in Equation 2) comes from the sum of the two internal feedback resistors of A1 and A2. These on-chip metal film The INA128/INA129 provides very low noise in most applications. Low frequency noise is approximately 0.2µVPP measured from 0.1 to 10Hz (G ≥ 100). This provides dramatically improved noise when compared to state-of-the-art chopper-stabilized amplifiers. V+ INA129: INA128: 50kW G + 1) RG G + 1) INA128 DESIRED GAIN (V/V) 1 2 5 10 20 50 100 200 500 1000 2000 5000 10000 RG (Ω) NC 50.00k 12.50k 5.556k 2.632k 1.02k 505.1 251.3 100.2 50.05 25.01 10.00 5.001 0.1µF 49.4kW RG NC 49.9k 12.4k 5.62k 2.61k 1.02k 511 249 100 49.9 24.9 10 4.99 RG (Ω) NC 49.4k 12.35k 5489 2600 1008 499 248 99 49.5 24.7 9.88 4.94 INA128, INA129 − VIN INA129 NEAREST 1% RG (Ω) 7 NEAREST 1% RG (Ω) NC 49.9k 12.4k 5.49k 2.61k 1k 499 249 100 49.9 24.9 9.76 4.87 2 Over−Voltage Protection A1 40kΩ 1 − + VO = G • (VIN − VIN ) A3 RG VIN 3 25kΩ(1) Load VO A2 Over−Voltage Protection 40kΩ NOTE: (1) INA129: 24.7kΩ NC: No Connection 6 + 8 + 40kΩ 25kΩ(1) 4 40kΩ 5 Ref − 0.1µF − V IN V− Also drawn in simplified form: RG + V IN INA128 VO Ref Figure 1. Basic Connections 9 "#$ "#% www.ti.com SBOS051B − OCTOBER 1995 − REVISED FEBRUARY 2005 OFFSET TRIMMING The INA128/INA129 is laser trimmed for low offset voltage and offset voltage drift. Most applications require no external offset adjustment. Figure 2 shows an optional circuit for trimming the output offset voltage. The voltage applied to Ref terminal is summed with the output. The op amp buffer provides low impedance at the Ref terminal to preserve good common-mode rejection. V− IN + VIN INA128 VO INA128 47kΩ 47kΩ Thermocouple V+ RG Microphone, Hydrophone etc. INA128 100µA 1/2 REF200 Ref 10kΩ OPA177 ±10mV Adjustment Range 10kΩ 100Ω 100Ω 100µA 1/2 REF200 INA128 Center−tap provides bias current return. V− Figure 2. Optional Trimming of Output Offset Voltage INPUT BIAS CURRENT RETURN PATH The input impedance of the INA128/INA129 is extremely high—approximately 1010Ω. However, a path must be provided for the input bias current of both inputs. This input bias current is approximately ±2nA. High input impedance means that this input bias current changes very little with varying input voltage. Input circuitry must provide a path for this input bias current for proper operation. Figure 3 shows various provisions for an input bias current path. Without a bias current path, the inputs will float to a potential which exceeds the common-mode range, and the input amplifiers will saturate. If the differential source resistance is low, the bias current return path can be connected to one input (see the thermocouple example in Figure 3). With higher source impedance, using two equal resistors provides a balanced input with possible advantages of lower input offset voltage due to bias current and better high-frequency common-mode rejection. 10 Figure 3. Providing an Input Common-Mode Current Path INPUT COMMON-MODE RANGE The linear input voltage range of the input circuitry of the INA128/INA129 is from approximately 1.4V below the positive supply voltage to 1.7V above the negative supply. As a differential input voltage causes the output voltage increase, however, the linear input range will be limited by the output voltage swing of amplifiers A1 and A2. So the linear common-mode input range is related to the output voltage of the complete amplifier. This behavior also depends on supply voltage—see performance curves, Input Common-Mode Range vs Output Voltage. Input-overload can produce an output voltage that appears normal. For example, if an input overload condition drives both input amplifiers to their positive output swing limit, the difference voltage measured by the output amplifier will be near zero. The output of A3 will be near 0V even though both inputs are overloaded. LOW VOLTAGE OPERATION The INA128/INA129 can be operated on power supplies as low as ±2.25V. Performance remains excellent with power supplies ranging from ±2.25V to ±18V. Most parameters vary only slightly throughout this supply voltage range—see typical performance curves. "#$ "#% www.ti.com SBOS051B − OCTOBER 1995 − REVISED FEBRUARY 2005 Operation at very low supply voltage requires careful attention to assure that the input voltages remain within their linear range. Voltage swing requirements of internal nodes limit the input common-mode range with low power supply voltage. Typical performance curves, “Input Common-Mode Range vs Output Voltage” show the range of linear operation for ±15V, ±5V, and ±2.5V supplies. V+ 10.0V 6 REF102 R1 2 R2 4 Pt100 Cu K +5V Cu RG 2.5V − ∆V RG 300Ω VO INA128 Ref ISA TYPE E Figure 4. Bridge Amplifier K T − C1 0.1µF SEEBECK COEFFICIENT (µV/5C) R1, R2 58.5 66.5kΩ 50.2 76.8kΩ 39.4 97.6kΩ 38.0 102kΩ Figure 6. Thermocouple Amplifier with RTD Cold-Junction Compensation VO INA128 Ref MATERIAL + Chromel − Constantan + Iron − Constantan + Chromel − Alumel + Copper − Constantan J RG Ref R3 100Ω = Pt100 at 0°C 2.5V + ∆V VIN + VO INA128 R1 1MΩ − IO + R1 VIN RG INA128 V IN @G R1 + Ref OPA130 IB 1 f−3dB= 2πR1C1 A1 = 1.59Hz Figure 5. AC-Coupled Instrumentation Amplifier A1 IB ERROR OPA177 ± 1.5nA OPA131 ± 50pA OPA602 ± 1pA OPA128 ± 75fA IO Load Figure 7. Differential Voltage to Current Converter RG = 5.6kΩ 2.8kΩ G = 10 LA RA RG/2 INA128 VO Ref 2.8kΩ 390kΩ 1/2 OPA2131 RL 390kΩ VG 10kΩ VG 1/2 OPA2131 NOTE: Due to the INA128’s current-feedback topology, VG is approximately 0.7V less than the common-mode input voltage. This DC offset in this guard potential is satisfactory for many guarding applications. Figure 8. ECG Amplifier with Right-Leg Drive 11 PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) INA128P ACTIVE PDIP P 8 50 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type INA128P INA128PA ACTIVE PDIP P 8 50 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type INA128P A INA128PAG4 ACTIVE PDIP P 8 50 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type INA128P A INA128PG4 ACTIVE PDIP P 8 50 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type INA128P INA128U ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR INA 128U INA128U/2K5 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR INA 128U INA128U/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR INA 128U INA128UA ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 125 INA 128U A INA128UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 125 INA 128U A INA128UA/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 125 INA 128U A INA128UA/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 125 INA 128U A INA128UAE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 125 INA 128U A INA128UAG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 125 INA 128U A INA128UG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR Addendum-Page 1 INA 128U Samples PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) INA129P ACTIVE PDIP P 8 50 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type INA129P INA129PA ACTIVE PDIP P 8 50 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type INA129P A INA129PAG4 ACTIVE PDIP P 8 50 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type INA129P A INA129PG4 ACTIVE PDIP P 8 50 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type INA129P INA129U ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR INA 129U INA129U/2K5 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR INA 129U INA129U/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR INA 129U INA129UA ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 125 INA 129U A INA129UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 125 INA 129U A INA129UA/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 125 INA 129U A INA129UA/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 125 INA 129U A INA129UAE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 125 INA 129U A INA129UG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR SN412014DRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. Addendum-Page 2 INA 129U -40 to 125 INA 128U A Samples PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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OTHER QUALIFIED VERSIONS OF INA128, INA129 : • Enhanced Product: INA129-EP NOTE: Qualified Version Definitions: • Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 9-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant INA128U/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 INA128UA/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 INA129U/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 INA129UA/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 9-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) INA128U/2K5 SOIC D 8 2500 367.0 367.0 35.0 INA128UA/2K5 SOIC D 8 2500 367.0 367.0 35.0 INA129U/2K5 SOIC D 8 2500 367.0 367.0 35.0 INA129UA/2K5 SOIC D 8 2500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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