SSC RMB4S

RMB2S thru RMB6S
Surface Mount Bridge Rectifiers
PRODUCT SUMMARY
0.8 Amps Miniature Glass Passivated
Fast Recovery Surface Mount Bridge Rectifiers
MBS
FEATURES
.193(4.90)
.177(4.50)
Ideal for printed circuit board Reliable low cost construction utilizing molded
plastic technique High surge current capability High temperature soldering guaranteed:
o
260 C / 10 seconds at 5 lbs., (2.3 kg)
tension Small size, simple installation Pure tin plated terminal, Lead free.
Leads solderable per MIL-STD-202
Method 208
.033(0.84)
.022(0.56)
.157(4.00)
.142(3.60)
.272(6.9)
MAX
.102(2.60)
.087(2.20)
.106(2.70)
.053(1.53)
.014(0.35
.090(2.30)
.037(0.95)
.006(0.15
.008(0.20) .114(2.9)
.043(1.10) .083(2.12)
MAX
MAX
.028(0.70) .043(1.10)
Dimensions in inches and (millimeters)
Pb-free; RoHS-compliant
MAXIMUM RATINGS AND ELECTRICAL CHARACTERISTICS
Ratings at 25oC ambient temperature unless otherwise specified.
Single phase, half wave, 60 Hz, resistive or inductive load.
For capacitive load, derate current by 20%
Type Number
Maximum Recurrent Peak Reverse Voltage
Maximum RMS Voltage
Maximum DC Blocking Voltage
Maximum Average Forward Rectified Current
On glass-epoxy P.C.B.
On aluminum substrate
Peak Forward Surge Current, 8.3 ms Single
Half Sine-wave Superimposed on Rated Load
(JEDEC method )
Maximum Instantaneous Forward Voltage
@ 0.4A
Maximum DC Reverse Current @ TA=25 oC
at Rated DC Blocking Voltage @ TA=125 oC
Symbol
RMB2S
RMB4S
RMB6S
Units
VRRM
VRMS
VDC
200
140
200
400
280
400
600
420
600
V
V
V
I(AV)
0.5
0.8
A
IFSM
30
A
VF
1.0
V
5.0
100
Maximum Reverse Recovery Time at (Note 1)
Trr
150
Typical Junction Capacitance Per Leg
Cj
13
Typical Thermal Resistance Per Leg
RθJA
85
Operating Temperature Range
TJ
-55 to +150
Storage Temperature Range
TSTG
-55 to +150
Note: Reverse Recovery Test Conditions: IF=0.5A, IR=1.0A, IRR=0.25A
12/23/2007 Rev.1.00
IR
www.SiliconStandard.com
uA
uA
nS
pF
o
C /W
o
o
C
C
1
RATINGS AND CHARACTERISTIC CURVES
(RMB2S THRU RMB6S)
FIG.2- TYPICAL REVERSE LEAKAGE
CHARACTERISTICS PER LEG
0.8
0.5
Glass
Epoxy
P.C.B.
0.4
0.3
0.2
0.1
0
Resistive or Inductive Load
0
20
40
60
80
100
120
o
AMBIENT TEMPERATURE. ( C)
140
160
FIG.3- MAXIMUM NON-REPETITIVE PEAK FORWARD
SURGE CURRENT PER LEG
Ta=40OC
Single Half Sine Wave
(JEDEC Method)
30
10
1
0.1
Tj=25 0C
0.01
0
20
40
60
80
100
PERCENT OF RATED PEAK REVERSE VOLTAGE. (%)
25
20
15
F=60 Hz
F=50 Hz
FIG.5- TYPICAL INSTANTANEOUS FORWARD
CHARACTERISTICS PER LEG
10
10
5
0
1 Cycle
1
10
NUMBER OF CYCLES
100
FIG.4- TYPICAL JUNCTION CAPACITANCE PER LEG
30
JUNCTION CAPACITANCE.(pF)
Tj=125 0C
INSTANTANEOUS REVERSE LEAKAGE CURRENT. ( A)
0.6
35
PEAK FORWARD SURGE CURRENT. (A)
100
Aluminum Substrate
0.7
INSTANTANEOUS FORWARD CURRENT. (A)
AVERAGE FORWARD RECTIFIED CURRENT. (A)
FIG.1- DERATING CURVE FOR OUTPUT RECTIFIED
CURRENT
Tj=25 0C
f=1.0MHz
Vsig=50mVp-p
25
20
15
10
1
0.1
Tj=25 0C
Pulse Width=300 s
1% Duty Cycle
5
0
0.1
10
1
0.01
0.2
100 200
0.4
0.6
0.8
1.0
1.2
1.4
1.6
INSTANTANEOUS FORWARD VOLTAGE. (V)
REVERSE VOLTAGE. (V)
FIG.6- REVERSE RECOVERY TIME CHARACTERISTIC AND TEST CIRCUIT DIAGRAM
50W
NONINDUCTIVE
10W
NONINDUCTIVE
trr
+0.5A
(-)
DUT
(+)
50Vdc
(approx)
(-)
PULSE
GENERATOR
(NOTE 2)
1W
NON
INDUCTIVE
OSCILLOSCOPE
(NOTE 1)
NOTES: 1. Rise Time=7ns max. Input Impedance=
1 megohm 22pf
2. Rise Time=10ns max. Sourse Impedance=
50 ohms
12/23/2007 Rev.1.00
0
-0.25A
(+)
-1.0A
www.SiliconStandard.com
1cm
SET TIME BASE FOR
5/ 10ns/ cm
2
RMB2S thru RMB6S
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
12/23/2007 Rev.1.00
www.SiliconStandard.com
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