SS6845G Regulated 5V Charge Pump DESCRIPTION PRODUCT SUMMARY Input voltage range: 2.7V to 5.0V Regulated output voltage of 5V ±4% Output current: 100mA (VIN = 3.3V) 110mA (VIN = 3.6V) The SS6845G is a micropower charge pump DC/DC converter that produces a regulated 5V output. The input voltage range is 2.7V to 5.0V. Extremely low operating current (13µA typical with no load) and a low external part count (one FEATURES 0.22µF flying capacitor and two small bypass Ultralow power: I IN = 13µA No inductors needed capacitors at the input and output) make the Very low shutdown current: <1µA Internal oscillator: 650KHz Short-circuit and over-temperature protection SS6845G ideally suitable for small, batterypowered applications. The SS6845G operates as a PSM-mode (Pulse Skipping Modulation) switched capacitor APPLICATIONS voltage doubler to produce a regulated output and features thermal shutdown capability and White or Blue LED Backlighting SIM Interface Supplies for Cellular Telephones Li-Ion Battery Backup Supplies Local 3V to 5V Conversion Smart Card Readers PCMCIA Local 5V Supplies short circuit protection. Pb-free; RoHS-compliant SOT-23-6 package TYPICAL APPLICATION CIRCUIT VOUT ** R1 U1 1-Cell 1 VOUT CIN 2.2µF Li-ion Battery 2 GND C+ 6 VIN 3 SHDN C- COUT 2.2µF * * * * 5 4 0.22µF CFLY SS6845G Regulated 5V Output from 2.7V to 5.0V Input * WLED series number: NSPW310BS, VF=3.6V, IF=20mA ** R1 = VOUT − VF , where NWLED is the number of WLEDs. IF × N WLED CIN, COUT: CELMK212BJ225MG (X5R) (0805), TAIYO YUDEN CFLY 7/21/2005 Rev.3.01 : CEEMK212BJ224KG (X7R) (0805), TAIYO YUDEN www.SiliconStandard.com 1 of 13 SS6845G ORDERING INFORMATION PIN CONFIGURATION SS6845GG TR Packing type: TR: Tape and reel SOT-23-6 TOP VIEW C+ VIN 6 5 C4 (MARK SIDE) Package type: GG: RoHS-compliant SOT-23-6 1 2 3 VOUT GND SHDN SOT-23-6 Marking Part No. Marking SS6845GG BO50P ABSOLUTE MAXIMUM RATINGS VIN to GND 6V VOUT to GND 6V All other ins to GND 6V VOUT short-circuit duration Continuous Operating ambient temperature range Junction temperature -40°C to 85 °C 125°C -65°C to 150 °C Storage temperature range Lead temperature (minimum 10 seconds) 260°C Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. TEST CIRCUIT Refer to the TYPICAL APPLICATION CIRCUIT on page 1. 7/21/2005 Rev.3.01 www.SiliconStandard.com 2 of 13 SS6845G ELECTRICAL CHARACTERISTICS (TA=25°C, CFLY=0.22µF, CIN=2.2µF, COUT=2.2µF, unless otherwise specified.) (Note 1) PARAMETER TEST CONDITIONS Input voltage Output voltage Continuous output current Supply current Shutdown current Output ripple Efficiency Switching frequency Shutdown input threshold (High) Shutdown input threshold (Low) Shutdown input current (High) Shutdown input current (Low) 2.7V≤ VIN< 3.3V, IOUT≤ 30mA 3.3V≤ VIN≤ 5.0V, IOUT≤ 60mA VIN=3V, VOUT=5.0V SHDN =VIN 2.7V≤ VIN≤ 5.0V, IOUT=0 , SHDN =VIN 2.7V≤ VIN≤ 5.0V, IOUT=0 , SHDN =0V VIN =3V, IOUT=50mA VIN =2.7V , IOUT=30mA Oscillator free-running SYMBOL MIN. VIN 2.7 4.8 TYP. 5.0 MAX. UNIT 5.0 V 5.2 VOUT V 4.8 IOUT 5.0 5.2 60 mA ICC 13 30 µA I SHDN 0.01 1.0 µA VR 60 mV η 83 % fOSC 650 KHz VIH 1.4 V VIL 0.3 V SHDN =VIN IIH -1 1 µA SHDN = 0V IIL -1 1 µA Vout turn-on time VIN =3V, IOUT = 0mA tON 0.5 mS Output short-circuit current VIN=3V, VOUT= 0V, SHDN = VIN ISC 170 mA Note1: Specifications are production tested at TA=25°C. Specifications over the -40°C to 85°C operating temperature range are assured by design, characterization and correlation with Statistical Quality Controls (SQC). 7/21/2005 Rev.3.01 www.SiliconStandard.com 3 of 13 SS6845G TYPICAL PERFORMANCE CHARACTERISTICS (CN, COUT: CELMK212BJ225MG, CFLY: CEEMK212BJ224KG) 5.15 20 IOUT=25mA COUT=10µF CFLY=1µF 5.05 Supply Current (µΑ) Output Voltage (V) 5.10 TA = -40°C 5.00 4.95 TA =25°C 4.90 TA=-40°C 15 10 IOUT=0µA CFLY=1µF VSHDN=VIN TA =85°C 4.85 2.5 3.0 3.5 4.0 4.5 5 5.0 2.5 3.0 3.5 Supply Voltage (V) 5.1 5.05 Output Voltage (V) Output Voltage (V) 5.0 5.2 TA=25°C COUT=10µF CFLY=1µF 5.10 VIN=3.6V 5.00 4.95 5.0 4.9 4.8 VIN=3.3V VIN=3.6V 4.7 TA=25°C CFLY=0.22µF COUT=2.2µF VIN=3.3V 4.90 VIN=2.7V 4.85 0 20 4.6 VIN=3.0V 40 60 80 100 120 140 4.5 160 0 10 20 30 VIN=2.7V 40 50 60 70 VIN=3.0V 80 90 100 110 120 130 Output Current (mA) Output Current (mA) Fig. 4 Load Regulation Fig. 3 Load Regulation 100 100 CT=25°C CFLY=1µF VIN=2.7V 90 70 60 VIN=3.0V 50 VIN=3.3V 40 VIN=3.6V Efficiency (%) Efficiency (%) 4.5 Fig. 2 No Load Supply Current vs. Supply Voltage 5.15 80 4.0 Supply Voltage (V) Fig. 1 Line Regulation 90 TA=85°C TA=25°C VIN=2.7V VIN=3.0V 80 70 60 50 30 20 TA=25°C CFLY=0.22µF 40 10 0 0.001 0.01 0.1 1 10 100 30 0.01 Output Current (mA) 0.1 1 10 100 Output Current (mA) Fig. 6 Efficiency Fig. 5 Efficiency 7/21/2005 Rev.3.01 VIN=3.6V VIN=3.3V www.SiliconStandard.com 4 of 13 SS6845G TYPICAL PERFORMANCE CHARACTERISTICS (Continued) 50 175 45 150 35 Output Ripple (mV) Output Ripple (mV) 40 VIN=3.6V 30 25 VIN=3.3V 20 15 VIN=3.0V 10 0 COUT=10µF VIN=2.7V 5 0 20 40 60 100 120 VIN=3.6V 100 75 VIN=3.3V 50 VIN=2.7V CFLY=0.22µF 0 140 0 20 40 Fig.7 Output Current vs. Output Ripple 60 80 100 120 Output Current (mA) Output Current (mA) 140 Fig. 8 Output Current vs. Output Ripple 1000 5.05 VIN=2.5V Output Voltage (V) 900 Frequency (KHz) COUT=2.2µF VIN=3.0V 25 CFLY=1µF 80 125 800 700 600 5.00 VIN=3.0V CFLY=1µF IOUT=50mA 4.95 4.90 500 400 -60 -40 -20 0 20 40 60 80 100 120 4.85 -60 140 Temperature (°C) Fig. 9 Frequency vs. Temperature -40 -20 Fig. 10 0 20 40 60 80 100 120 140 Temperature (°C) Output Voltage vs. Temperature 220 TA=25°C CFLY=1µF 260 240 Short-Circuit Current (mA) Short-Circuit Current (mA) 280 220 200 180 160 140 120 100 200 180 160 140 120 TA=25°C CFLY=0.22µF 100 2.5 3.0 3.5 4.0 4.5 5.0 2.5 Supply Voltage (V) 3.5 4.0 4.5 5.0 5.5 Supply Voltage (V) Fig. 11 Short-Circuit Current vs. Supply Voltage 7/21/2005 Rev.3.01 3.0 Fig. 12 Short-Circuit Current vs. Supply Voltage www.SiliconStandard.com 5 of 13 SS6845G TYPICAL PERFORMANCE CHARACTERISTICS (Continued) CN CN VOUT VOUT Fig. 13 Output Ripple VIN=3.0V, IOUT=50mA, COUT=10µF,CFLY=1µF Fig. 14 Output Ripple VIN=3.0V, IOUT=50mA, COUT=2.2µF, CFLY=0.22µF VOUT IOUT VOUT Fig. 15 Load Transient Response VIN=3.0V, IOUT=0mA~50mA,COUT=10µF, CFLY=1µF IOUT Fig. 16 Load Transient Response VIN=3.0V, IOUT=0mA~50mA,COUT=2.2µF, CFY=0.22µF VOUT V SHDN Fig. 17 Start-Up Time VIN=3.0V, IOUT=0A, COUT=10µF 7/21/2005 Rev.3.01 www.SiliconStandard.com VOUT V SHDN Fig. 18 Start-Up Time VIN=3.0V, IOUT=0A, COUT=2.2µF 6 of 13 SS6845G BLOCK DIAGRAM VOUT 2 COUT 2.2µF C+ 1 VIN CFLY 2 Control 0.22µF CIN 2.2µF COMP CVREF SHDN 1 PIN DESCRIPTIONS PIN 1:VOUT - PIN 2: GND - Regulated output voltage. For the best performance, VOUT should be bypassed with a 2.2µF (min) low ESR capacitor with the shortest possible leads. PIN 4: C- - Flying capacitor negative terminal. PIN 5: VIN - Input supply voltage. VIN should be bypassed with a 2.2µF (min) low ESR capacitor. Ground. Should be tied to a ground plane for best performance. PIN 6: C+ - Flying capacitor positive terminal. PIN 3: SHDN - Active-low shutdown input. A low voltage on SHDN disables the SS6845G. SHDN is not allowed to float. 7/21/2005 Rev.3.01 www.SiliconStandard.com 7 of 13 SS6845G APPLICATION INFORMATION Introduction Short Circuit/Thermal Protection The SS6845G is a micropower charge pump DC/DC The SS6845G includes built-in short circuit current converter that produces a regulated 5V output limiting as well as over-temperature protection. with an input voltage range from 2.7V to 5.0V. It During a short circuit condition, the output current utilizes the charge pump topology to boost VIN to a regulated output voltage. Regulation is obtained is automatically constrained to approximately by sensing the output voltage through an internal in the internal IC junction temperature. When the resistor divider. A switched doubling circuit die temperature exceeds 150°C, the thermal enables the charge pump when the feedback protection will shut down the charge pump switching voltage is lower than the trip point of the internal operation and the die temperature will then comparator, and vice versa. When the charge reduce. Once the die temperature drops below pump is enabled, a two-phase non-overlapping 135°C, the charge pump switching circuit will clock activates the charge pump switches. To restart. If the fault has not been eliminated, the maximize battery life for a battery-use application, this protection mechanism will repeat again and quiescent current is limited to no more than 13µA. again, allowing the SS6845G to work continuously 170mA. This short circuit current will cause a rise in a short circuit condition without damaging the Operation device. This kind of converter uses capacitors to store and transfer energy. Since the capacitors can’t change their voltage level abruptly, the voltage Shutdown ratio of VOUT over VIN is limited to some range. Capacitive voltage conversion is obtained by In shutdown mode, the output is disconnected switching a capacitor periodically. It first charges since most of the circuitry is turned off. Due to the capacitor by connecting it across a voltage high impedance, the shutdown pin cannot float. from the input. The input current is extremely low source and then connects it to the output. Referring to Fig. 19, during the on state of internal clock, Q1 and Q4 are closed, which charges C1 to VIN level. During the off state, Q3 and Q2 are closed. The output voltage is VIN plus VC1, that is, 2VIN. VIN Q2 VOUT Q1 CIN COUT C1 Q3 Q4 Fig. 19 The circuit of charge pump Efficiency The diagrams, Fig. 20 and Fig. 21 show the operation of the charge pump in the on and off states. R DS-ON is the resistance of the switching element during conduction. ESR is the equivalent series resistance of the flying capacitor C1. ION-AVE and IOFF-AVE are the average current during the on-state and off-state, respectively. D is the duty-cycle, which means the ratio of the on-state time to the total cycle time. Let's look at capacitor C 1 - assuming that capacitor C 1, has reached its steady state, then the amount of charge flowing into C 1 during the on-state is equal to that flowing out of C 1 during the off-state. 7/21/2005 Rev.3.01 www.SiliconStandard.com 8 of 13 SS6845G ION− AVE × DT = IOFF − AVE × (1 − D)T (1) External Capacitor Selection ION- AVE × D = IOFF - AVE × (1 − D) (2) Three external capacitors, CIN, COUT and CFLY, determine SS6845G performance, in the area of IIN = ION- AVE × D + IOFF- AVE × (1 − D) = 2 × ION- AVE × D (3) = 2 × IOFF- AVE × (1 - D) output ripple voltage, charge pump strength and transients. Optimum performance can be obtained by the use of ceramic capacitors with low ESR. Due to their high ESR, tantalum and aluminum IOUT = IOFF- AVE × (1 − D) ..........(4) IIN = 2IOUT capacitors are not recommended for charge-pump applications. For the SS6845G, the controller uses the PSM (Pulse Skipping Modulation) control strategy. When To reduce noise and ripple, a low ESR ceramic the duty cycle is limited to 0.5, then: capacitor, ranging from 2.2µF to 10µF, is ION- AVE × 0.5 × T = IOFF- AVE × (1 − 0.5) × T ION- AVE = IOFF- AVE ..........(5) According to the equation (4), we know that as long as the flying capacitor C1 is at steady state, the input current is twice the output current. The efficiency of charge pump is given below: η = VIN VOUT × IOUT V ×I V = OUT OUT = OUT ..(6) VIN × IIN VIN × 2IOUT 2VIN ION Q2 Q1 RDS-ON CIN Q3 COUT ESR C1 VOUT recommended for CIN and COUT. The value of COUT determines the amount of output ripple voltage. An output capacitor with a larger value results in smaller ripple. CFLY is critical to the performance of a charge pump. The larger CFLY is, the larger the output current and the smaller the resulting ripple voltage. However, a large CFLY requires large CIN and COUT. The ratio of CIN (as well as COUT) to CFLY should be approximately 10:1. The values of the capacitors used under operating conditions, determine the performance of the charge Q4 pump converter, and two factors, described below, affect the value of the capacitors. RDS-ON Fig. 20 The on-state of charge pump circuit 1. Material: Ceramic capacitors of different materials, such as X7R, X5R, Z5U and Y5V, VIN CIN RDS-ON Q2 Q1 Q3 VOUT COUT ESR capacitance can vary significantly. For example, X7R or X5R types of capacitor retain their capacitance over temperatures from -40°C Q4 RDS-ON have different tolerances to temperature and to 85°C, but a Z5U or Y5V type will change a C1 lot over that temperature range. IOFF Fig. 21 The off-state of charge pump circuit 7/21/2005 Rev.3.01 www.SiliconStandard.com 9 of 13 SS6845G 2. Package Size: A ceramic capacitor with large volume (0805), gets a lower ESR than a small one (0603). Therefore, larger devices With a duty-cycle of 0.5, the power loss of RDS-ON is 2 × PRDS −ON ≅ IOUT provide improved transient response over 2 × RDS - ON 0.5(1 − 0.5) 2 = IOUT × 8R DS − ON smaller ones. Table 1 lists the recommended components for 2 PESR ≅ IOUT × ESR × use with the SS6845G. 2 = IOUT × 4ESR Table.1 Bill of Material Design- Part ator Type CIN 2.2µ CFLY 0.22µ COUT 2.2µ 1 0.5(1 − 0.5) Description Vendor CELMK212BJ- TAIYO 225MG (X5R) YUDEN In fact, whether the current is the on-state or the off-state, it decays exponentially rather than flows CEEMK212BJ TAIYO -224KG (X7R) YUDEN CELMK212BJ- TAIYO 225MG (X5R) YUDEN steadily, and as the root mean square value of exponential decay is not equal to that of steady flow, then we must use an approximation. Let’s use another approach to look at the charge pump circuit and focus on the flying capacitor C1. Referring to Fig. 20, when the circuit is in the Power Dissipation on state, the voltage across C1 is: Now, let’s look at the power dissipation in R DS-ON VC-ON (t) = VIN − 2R DS−ON × ION (t) - ESR × ION (t) …(9) and ESR. Assume that the RDS-ON of each internal switching element in the SS6845G is equal and ESR is the equivalent series resistance of CFLY (refer to Fig. 20 and Fig. 21). The approximation of the power losses of R DS-ON and ESR are given below: PRDS−ON 2 ≅ ION - AVE 2 × 2RDS − ON × D + IOFF - AVE × 2RDS − ON × (1 − D) IIN 2 I ) × 2RDS - ON × D + ( OUT )2 × 2RDS - ON × (1 - D) 2D 1- D 2IOUT 2 I =( ) × 2RDS -ON × D + ( OUT )2 × 2RDS -ON × (1 - D) 2D 1- D 2 2 2 2 = IOUT × ( RDS - ON ) + IOUT ×( RDS -ON ) D 1- D 2 2 = IOUT × × RDS -ON D(1 - D) =( ..........(7) 2 2 PESR ≅ ION − AVE × ESR × D + I OFF − AVE × ESR × (1 − D) I IIN 2 ) × ESR × D + ( OUT ) 2 × ESR × (1 − D) 2D 1− D 1 2 1 2 = IOUT × ESR × + IOUT × ESR × D 1- D 1 2 = IOUT × ESR × D(1 - D) =( 7/21/2005 Rev.3.01 The average of VC1 during the on-state is: VC−ON− AVE = VIN − 2R DS−ON × ION− AVE − ESR × ION− AVE ……………………….(10) Similarly, referring to Fig. 21, when the circuit is in the off-state, the voltage of C1 is: VC-OFF (t) = VOUT − VIN + 2R DS-ON × IOFF (t) + ESR × IOFF (t) ……………………………(11) The average of VC1 during the off-state is: VC−OFF− AVE = VOUT − VIN + 2R DS−ON × IOFF− AVE + ESR × IOFF− AVE ………………..(12) The difference in charge stored in C 1 between the on-state and off-state is the net charge transferred to the output in one cycle. www.SiliconStandard.com 10 of 13 SS6845G ∆Q = Q ON - Q OFF = C1 × (VC1−ON− AVE − VC1−OFF − AVE ) = C1 × (2VIN - VOUT - 2R DS-ON × ION- AVE - 2R DS-ON × IOFF- AVE - ESR × ION− AVE - ESR × IOFF- AVE ) ………(13) I I I IOUT − 2R DS −ON × OUT - ESR × OUT - ESR × OUT ) 1- D D 1− D D 1 + ESR) × IOUT × ] D(1 − D) = C1 × (2VIN − VOUT − 2R DS −ON × = C1 × [2VIN − VOUT − (2R DS−ON Thus the output current can be written as IOUT = f × ∆Q = f × (Q ON − Q OFF ) = f × C1 × [2VIN − VOUT - (2R DS-ON + ESR ) × IOUT × (14) 1 ] D(1 - D) When the duty cycle is 0.5, the output current can be written as: IOUT = f × C1 × [2VIN − VOUT − (2R DS−ON + ESR) × IOUT × 1 ] 0.5(1 − 0.5) (15) = fC1 × [2VIN − VOUT − (8R DS−ON + 4ESR) × IOUT ] And equation (15) can be re-written as: 2VIN − VOUT = 1 × IOUT + (8R DS−ON + 4ESR) × IOUT fC1 According to equation (16), when the duty cycle is 0.5, the equivalent circuit of the charge pump is shown in Fig. 22. The term 8RDS-ON is the total (16) IOUT 2VIN 1/fC1 8RDS-ON VOUT 4ESR COUT effect of switching resistance, 1/fC1 is the effect LOAD of flying capacitor and 4ESR is its equivalent resistance. Fig. 22 The equivalent circuit of charge pump From the equivalent circuit shown in Fig. 22, it is Layout Considerations seen that the terms 1/fC1, 4ESR and 8RDS-ON should be as small as possible to get large output With the high switching frequency and transient current. However, since the R DS-ON is internal to currents of the SS6845G, careful consideration of the SS6845G, all that can be done is to lower the PCB layout is important. To achieve the best values of 1/fC1 and ESR. However even if the performance, it is necessary to minimize the distance values of 1/fC1 and ESR can be kept as small as between every component and also to minimize possible, the term 8RDS-ON still dominates the the length of every connection and maximize the limit of the maximum output current. trace width. Make sure each device connects to an immediate ground plane. Fig. 23 to Fig. 25 show a recommended layout. 7/21/2005 Rev.3.01 www.SiliconStandard.com 11 of 13 SS6845G SS6845G Fig. 23 Top layer Fig. 24 Bottom layer Fig. 25 Topover layer APPLICATION EXAMPLES VIN CIN 2.2µ 1 2 3 VOUT GND VIN SHDN U1 2 GND CAP+ VIN 3 SHDN U2 CAP- 6 CFLY1 5 VOUT COUT 2.2µF 0.22µF 4 SS6845G 1 VOUT VSHDN CAP+ CAP- 6 CFLY2 0.22µF 5 4 SS6845G CIN, COUT : TAIYO YUDEN Ceramic Capacitor, CELMK212BJ225MG (X5R) (0805) CFLY1, CFLY2: TAIYO YUDEN Ceramic Capacitor, CEEMK212BJ224KG (X7R) (0805) Fig. 26 Using two SS6845G in parallel to provide larger output current. USB CIN 2.2µF VOUT 1 2 3 VSHDN VOUT GND SHDN U1 CAP+ VIN CAP- 6 5 4 COUT 2.2µF CFLY 0.22µF SS6845G CIN, COUT: TAIYO YUDEN Ceramic Capacitor, CELMK212BJ225MG (X5R) (0805) : TAIYO YUDEN Ceramic Capacitor, CEEMK212BJ224KG (X7R) (0805) CFLY1 Fig. 27 Regulated 5V from USB 7/21/2005 Rev.3.01 www.SiliconStandard.com 12 of 13 SS6845G PHYSICAL DIMENSIONS (unit: mm) D A A e e1 SEE VIEW B b WITH PLATING c A A2 SOT-23-6 MILLIMETERS MIN. MAX. A 0.95 1.45 A1 0.05 0.15 A2 0.90 1.30 b 0.30 0.50 c 0.08 0.22 D 2.80 3.00 E 2.60 3.00 E1 1.50 1.70 E E1 S Y M B O L 0.95 BSC 1.90 BSC L 0.30 L1 θ 0.60 0.60 REF 0° 8° 0.25 A1 BASE METAL SECTION A-A e e1 GAUGE PLANE SEATING PLANE θ L L1 VIEW B PART MARKING PART NUMBER CODE: BO50P = SS6845GG BO50P PACKING: Moisture sensitivity level MSL3 3000 pcs in antistatic tape on a reel packed in a moisture barrier bag (MBB). Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 7/21/2005 Rev.3.01 www.SiliconStandard.com 13 of 13