SS8014-xxG 300mA Low-Noise LDO Regulators FEATURES DESCRIPTION Ultra low output noise of 30µV (rms) Ultra low no-load supply current of 55µA Ultra low dropout of 70mV at 50mA load Guaranteed 300mA output current Over-temperature and short-circuit protection Fixed: 3.30V (SS8014-33), 3.0V (SS8014-30) 2.85V (SS8014-29), 2.80V (SS8014-28) 2.70V (SS8014-27), 2.50V (SS8014-25) 1.80V(SS8014-18), 1.50V(SS8014-15) Max. supply current in shutdown mode < 1µA Stable with low cost ceramic capacitors APPLICATIONS The SS8014-xxG is a low supply-current, low-dropout linear regulator that comes in a space-saving SOT23-5 package. The supply current at no-load is 55µA. In the shutdown mode, the maximum supply current is less than 1µA. Operating voltage range of the SS8014 is from 2.5V to 5.5V. The over-current protection limit is set at 500mA typical and 400mA minimum. An over-temperature protection circuit is built-in to the SS8014 to prevent thermal overload. These power saving features make the SS8014 ideal for use in such battery-powered applications as notebook computers, cellular phones, and PDA’s. ORDERING INFORMATION Notebook Computers Cellular Phones PDA Hand-Held Devices Battery-Powered Application Part Number Marking Voltage SS8014-15GTR SS8014-18GTR SS8014-25GTR SS8014-27GTR SS8014-28GTR SS8014-29GTR SS8014-30GTR SS8014-33GTR 4Gxx 4Hxx 4Exx 4Axx 4Bxx 4Fxx 4Cxx 4Dxx 1.50V 1.80V 2.50V 2.70V 2.80V 2.85V 3.0V 3.30V This device is only available with Pb-free lead finish (second-level interconnect). Pin Configuration IN GND 1 2 Typical Operating Circuit 5 OUT IN SS8014-xx BATTERY + C IN _ 1µF SS8014-xx 4 3 BYP COUT 1µF SHDN BYP GND SHDN OUTPUT VOLTAGE OUT CBYP 10nF SOT23-5 1/12/2005 Rev.2.10 www.SiliconStandard.com 1 of 10 SS8014-xxG Absolute Maximum Ratings VIN to GND……..………………..….….……………..….….……………..….….………-0.3V to +7V Output Short -Circuit Duration.…..…………..….….……………..….….…….……..…….….Infinite All Other Pins to GND…………………..….….……………..….….….……….-0.3V to (V IN + 0.3V) Continuous Power Dissipation (TA = +25°C) SOT 23-5 …………………………..……………..….….……………..….….…………...…..520 mW Operating Temperature Range….………..….….……………..….….……………….-40°C to +85°C Junction Temperature……………………..….….……………..….….……………..….….……+150°C θ JA …….See Recommended Minimum Footprint (Figure 2)....……………….……………….…..240°C/Watt Storage Temperature Range…………………..….….……………..….….………..…-65°C to +160°C Lead Temperature (soldering, 10sec)...…………..….….……………..….….………….……+260°C Electrical Characteristics (V IN=VOUT(STD)+1V, V SHDN =VIN, TA=TJ =25°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS Input Voltage (Note 2) V IN Output V oltage Accuracy V OUT Maximum Output Current Current Limit (Note 3) ILIM Ground Pin Current IQ Dropout Voltage (Note 4) V DROP Line Regulation ∆V LNR Load Regulation (Note 5) ∆V LDR Power Supply Rejection Ratio Output Voltage Temperature Coefficient PSRR Output V oltage Noise (10Hz to 100kHz) (SS8014-18) Variation from specified VOUT, IOUT=1mA,VOUT≥2.5V version For SS8014-18, I OUT =1mA For SS8014-15, I OUT =1mA VIN =3.6V MIN TYP MAX UNITS Note2 -2 -3 -4 ILOAD = 0mA ILOAD = 50mA ILOAD = 300mA IOUT = 1mA IOUT = 50mA, V OUT ≥ 2.7V Version V O (NOM) ≥ 3.0V 2.5V ≤V O (NOM) ≤2.85V IOUT = 150mA V O (NOM) = 1.8V V O (NOM) = 1.5V V O (NOM) ≥ 3.0V 2.5V ≤V O (NOM) ≤2.85V IOUT =300mA V O (NOM) = 1.8V V O (NOM) = 1.5V VIN=VOUT+100mV to 5.5V, IOUT = 1mA IOUT = 1mA to 150mA IOUT = 1mA to 300mA IOUT = 30mA CBYP = 10nF, f = 120HZ ∆ V O/ ∆ T IOUT = 50mA, TJ = 25°C to 125°C en COUT = 1µF, IOUT COUT = 1µF, IOUT V IN=V OUT +1V COUT = 1µF, IOUT 100nF COUT = 1µF, IOUT 5.5 2 3 4 300 500 55 120 145 265 2 70 230 250 380 510 450 600 500 660 760 960 910 1220 0.1 0.28 0.35 2 57 30 = 150mA, CBYP =1nF = 150mA, CBYP =10nF = 150mA, CBYP = 52 35 = 1mA, CBYP = 10nF 26 V % mA mA µA mV %/V % dB ppm/°C µV RMS 30 SHUTDOWN SHDN Input Threshold SHDN Input Bias Current Shutdown Supply Current THERMAL PROTECTION Thermal Shutdown Temperature Thermal Shutdown Hysteresis 1/12/2005 Rev.2.10 V IH V IL ISHDN Regulator enabled Regulator shutdown V SHDN = V IN TA = +25°C IQ SHDN V OUT = 0V VIN - 0.7 0.4 0.003 TA = +25°C TSHDN ∆TSHDN www.SiliconStandard.com 0.1 V µA 1 150 15 °C °C 2 of 10 SS8014-xxG Note 1: Limits are 100% production tested at TA= +25°C. Low duty pulse techniques are used during test to maintain junction temperature as close to ambient as possible. Note 2: VIN (min) =VOUT (STD)+VDROPOUT Note 3: Not tested. For design purposes, the current limit should be considered 400mA minimum to 600m A maximum. Note 4: The dropout voltage is defined as (VIN - VOUT) when VOUT is 100m V below the value of VOUT for VIN = VOUT +1V. For the performance of e ach SS8014-xx version, see “Typical Performance Characteristics”. Note 5: Regulation is measured at constant junction temperature using low duty cycle pulse testing. Parts are tested for load regulation in the load range from 1mA to 300mA. Changes in output due to heating effects are covered by the thermal regulation specification. Typical Performance Characteristics (V IN = V O+1V, CIN=1µF, COUT=1µF, V SHDN = VIN, SS8014-33, TA =25°C, unless otherwise noted.) Output Voltage vs. Load Current Ground Current vs. Load Current 3.340 400 3.330 SS8014-33 350 Ground Current (µA) Output Voltage (V) 3.320 3.310 3.300 3.290 3.280 3.270 VIN =3.6V No Load 300 250 200 150 100 3.260 50 3.250 3.240 0 0 50 100 150 200 250 300 0 50 Load Current (mA) Output Voltage vs. Input Voltage 150 200 250 300 Supply Current vs. Input Voltage 3.5 400 350 3.0 ILOAD =300mA No Load 2.5 Supply Current (µA) Output Voltage (V) 100 Load Current (mA) 2.0 1.5 1.0 300 250 200 I LOAD =50mA 150 100 50 0.5 I LOAD =0mA 0 0.0 0 1 2 3 4 5 0 6 1 2 3 4 5 6 Input Voltage (V) Input Voltage (V) Dropout Voltage vs. Load Current Ouptut Noise 10HZ to 100KHZ 1000 TA =25°C Dropout Voltage (mV) 900 800 SS8014-18 700 SS8014-25 600 SS8014-15 500 400 Top to down SS8014-27 SS8014-28 SS8014-30 SS8014-33 SS8014-29 300 200 100 0 0 50 100 150 200 250 300 Loading (mA) 1/12/2005 Rev.2.10 www.SiliconStandard.com 3 of 10 SS8014-xxG Typical Performance Characteristics (continued) SHDN Input Bias Current vs. Temperature Ground Current vs. Temperature 80 0.20 SS8014-33 V IN = 4.3V IOUT =0A SHDN Input Bias Current (µA) Ground Current (µA) 100 60 40 20 0 0.10 0.00 -0.10 -0.20 -40 -30 -20 -10 0 10 2 0 30 40 5 0 60 70 80 9 0 10 11 1 2 13 0 0 0 0 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 1 0 11 12 1 3 0 0 0 0 Junction Temperature TJ (°C) Junction Temperature TJ (°C) Shutdown Supply Current vs. Temperature Output Voltage vs. Temperature 3.36 SS8014-33 V IN = 4.3V 3.34 Output Voltage (V) Shutdown Supply Current(µA) 1.00 0.60 SS8014-33 V IN =4.3V V SHDN =VI N 0.20 -0.20 -0.60 SS8014-33 ILOAD =1mA V IN=5.5V 3.32 3.30 V IN =4.3V 3.28 V IN =3.4V 3.26 -1.00 3.24 -40 -30 -20 -10 0 10 20 30 40 5 0 60 70 8 0 90 10 1 1 12 13 0 0 0 0 -40 -30 -20 -10 0 1 0 20 30 4 0 50 60 7 0 80 90 1 0 11 12 1 3 0 0 0 0 Junction Temperature TJ (°C) Junction Temperature T J (°C) Dropout Voltage vs. Temperature 400 Dropout Voltage (mV) 350 SS8014-33 300 250 ILOAD=150mA 200 150 100 ILOAD =50mA 50 ILOAD =0mA 0 -40 -30 -20 -10 0 10 2 0 30 40 5 0 60 70 8 0 90 10 11 1 2 13 0 0 0 0 Junction Temperature T J (°C) 1/12/2005 Rev.2.10 www.SiliconStandard.com 4 of 10 SS8014-xxG Typical Performance Characteristics (continued) Line Transient Load Transient Load Transient Power Supply Rejection Ripple 80 SS8014-29 VIN =5V +2V(p-p) RL=100O CBYP =10nF Power Supply Rejection Ratio(db) 70 60 50 40 30 20 10 0 0.1 1 10 100 Frequency(KHZ) Output Noise vs. Bypass Capacitance Output Noise vs. Load Current 70 50 SS8014-18 VIN =2.8V T A =25°C COUT =1µF 40 30 20 10 0 0.001 SS8014-18 VIN =2.8V TA =25°C 60 Output Noise (µVrms) Output Noise (µVrms) 60 70 50 COUT=1µF 40 30 20 10 0 0.01 0.1 1 Bypass Capacitance (µF) 1/12/2005 Rev.2.10 10 100 1000 Load Current (mA) www.SiliconStandard.com 5 of 10 SS8014-xxG Typical Performance Characteristics (continued) Power On Response Waveform Power Off Response Waveform Shutdown Delay Waveform Shutdown Delay Waveform Turn-On Time vs. Bypass Capacitance Turn-Off Time vs. Bypass Capacitance 100000 1000 Propagation Delay Time Propagation Delay Time Time (µs) Time (µs) 10000 1000 SS8014-33 ILOAD =150mA CIN =COUT=1µF VIN=4.3V power already VSHDN=0 to 4.3V 100 10 Rise Time Fall Time 10 1 0.1 100 1 1 10 100 0.1 Bypass Capactor (nF) 1/12/2005 Rev.2.10 SS8014-33 ILOAD =150mA CIN =COUT=1µF VIN =4.3V power already VSHDN=4.3V to 0V 1 10 100 Bypass Capacitor (nF) www.SiliconStandard.com 6 of 10 SS8014-xxG Pin Description PIN NAME 1 IN 2 GND Ground. This pin also functions as a heatsink. Solder to large pads or the circuit board ground plane to maximize thermal dissipation. 3 SHDN Active-High Enable Input. A logic low reduces the supply current to less than 1µA. Connect to IN for normal operation. 4 BYP This is a reference bypass pin. It should connect external 10nF capacitor to GND to reduce output noise. Bypass capacitor must be no less than 1nF. (CBYP≥ 1nF) 5 OUT Regulator Output. Sources up to 150mA. Bypass with a 1µF, < 0.2Ω typical ESR capacitor to GND. FUNCTION Regulator Input. Supply voltage can range from +2.5V to +5.5V. Bypass with 1µF to GND. Detailed Description The block diagram of the SS8014-xx is shown in Figure 1. It consists of an error amplifier, 1.25V bandgap reference, PMOS output transistor, internal feedback voltage divider, shutdown logic, over current protection circuit, and over temperature protection circuit. The internal feedback voltage divider’s central tap is connected to the non-inverting input of the error amplifier. The error amplifier compares non-inverting input with the 1.25V bandgap reference. If the feedback voltage is higher than 1.25V, the error amplifier’s output becomes higher so that the PMOS output transistor has a smaller gate-to-source voltage (VGS). This reduces the current carrying capability of the PMOS output transistor, as a result the output voltage decreases until the feedback voltage is equal to 1.25V. Similarly, when the feedback voltage is less than 1.25V, the error amplifier causes the output PMOS to conduct more current to pull the feedback voltage up to 1.25V. Thus, through this feedback action, the error amplifier, output PMOS, and the voltage-divider effectively form a unity-gain amplifier with the feedback voltage forced to be the same as the 1.25V bandgap reference. The output voltage, VOUT, is then given by the following equation: VOUT = 1.25 (1 + R1/R2). (1) Alternatively, the relationship between R1 and R2 is given by: R1 = R2 (VOUT / 1.25 + 1). (2) IN SHDN ¡ Ð ERROR AMP SHUTDOWN LOGIC ¡ Ï OVER CURRENT PROTECT & DYNAMIC FEEDBACK OUT BYP R1 OVER TEMP. PROTECT 1.25V Vref CBYP R2 GND Figure 1. Functional Diagram 1/12/2005 Rev.2.10 www.SiliconStandard.com 7 of 10 SS8014-xxG Over Current Protection The SS8014 uses a current mirror to monitor the output current. A small portion of the PMOS output transistor’s current is mirrored onto a resistor such that the voltage across this resistor is proportional to the output current. This voltage is compared against the 1.25V reference. Once the output current exceeds the limit, the PMOS output transistor is turned off. Once the output transistor is turned off, the current monitoring voltage decreases to zero, and the output PMOS is turned on again. If the over current condition persist, the over current protection circuit will be triggered again. Thus, when the output is shorted to ground, the output current will be alternating between 0 and the over current limit. The typical over current limit of the SS8014 is set to 350mA. Note that the input bypass capacitor of 1µF must be used in this case to filter out the input voltage spike caused by the surge current due to the inductive effect of the package pin and the printed circuit board’s routing wire. Otherwise, the actual voltage at the IN pin may exceed the absolute maximum rating. Over Temperature Protection To prevent abnormal temperature from occurring, the SS8014 has a built-in temperature monitoring circuit. When it detects the temperature is above 150oC, the output transistor is turned off. When the IC is cooled down to below 135oC, the output is turned on again. In this way, the SS8014 will be protected against abnormal junction temperature during operation. Shutdown Mode When the SHDN pin is connected a logic low voltage, the SS8014 enters shutdown mode. All the analog circuits are turned off completely, which reduces the current consumption to only the leakage current. The output is disconnected from the input. When the output has no load at all, the output voltage will be discharged to ground through the internal resistor voltage divider. Operating Region and Power Dissipation Since the SS8014 is a linear regulator, its power dissipation is always given by P = IOUT (VIN – VOUT). The maximum power dissipation is given by: PDMAX = (TJ – TA)/ΘJA = (150-25) / 240 = 520mW where (TJ – TA) is the temperature difference between the SS8014 die and the ambient air, and θ JA, is the thermal resistance of the chosen package to the ambient air. For surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the PC board and its copper traces. In the case of a SOT23-5 package, the thermal resistance is typically 240oC/Watt. (See Recommended Minimum Footprint) [Figure 2]. Refer to Figure 3 for the SS8014 valid operating region (Safe Operating Area) & refer to Figure 4 for the maximum power dissipation of the SOT-23-5. 1/12/2005 Rev.2.10 The die attachment area of the SS8014’s lead frame is connected to pin 2, which is the GND pin. Therefore, the GND pin of SS8014 can carry away the heat of the SS8014 die very effectively. To improve the power dissipation, connect the GND pin to ground using a large ground plane near the GND pin. Applications Information Capacitor Selection and Regulator Stability Normally, use a 1µF capacitor on the input and a 1µF capacitor on the output of the SS8014. Larger input capacitor values and lower ESR provide better supply-noise rejection and transient response. A highervalue input capacitor (10µF) may be necessary if large, fast transients are anticipated and the device is located several inches from the power source. For stable operation over the full temperature range, with load currents up to 120mA, a minimum of 1µF is recommended. Power-Supply Rejection and Operation from Sources Other than Batteries The SS8014 is designed to deliver low dropout voltages and low quiescent currents in battery powered systems. Power-supply rejection is 57dB at low frequencies as the frequency increases above 20 kHz; the output capacitor is the major contributor to the rejection of power-supply noise. When operating from sources other than batteries, improve supply-noise rejection and transient response by increasing the values of the input and output capacitors, and using passive filtering techniques. Load Transient Considerations The SS8014 load-transient response graphs show two components of the output response: a DC shift of the output voltage due to the different load currents, and the transient response. Typical overshoot for step changes in the load current from 0mA to 100mA is 12mV. Increasing the output capacitor's value and decreasing its ESR attenuates transient spikes. Input-Output (Dropout) Voltage A regulator's minimum input-output voltage differential (or dropout voltage) determines the lowest usable supply voltage. In battery-powered systems, this will determine the useful end-of-life battery voltage. Because the SS8014 uses a P-channel MOSFET pass transistor, the dropout voltage is a function of RDS(ON) multiplied by the load current. www.SiliconStandard.com 8 of 10 SS8014-xxG Layout Guide An input capacitance of ~1µF is required between the SS8014 input pin and ground (the amount of the capacitance may be increased without limit), This capacitor must be located a distance of not more than 1cm from the input and return to a clean analog ground. The input capacitor filters out the input voltage spike caused by the surge current due to the inductive effect of the package pin and the printed circuit board’s rout- ing wire. Otherwise, the actual voltage at the IN pin may exceed the absolute maximum rating. The output capacitor also must be located a distance of not more than 1c m from output to a clean analog ground, so that it can filter out the output spike caused by the surge current due to the inductive effect of the package pin and the printed circuit board’s routing wire. Figure 5 is the SS8014 PCB recommended layout. Figure 2. Recommended Minimum Footprint Safe Operating Area [Power Dissipation Limit] Maximum Power Dissipation of SOT-23-5 400 0.7 Maximum Recommended Output Current 350 Still air 0.6 300 Still Air 1oz Copper on SOT-23-5 Package Mounted on recommended mimimum footprint (R ? JA=240°C/W) Power Dissipation (W) Output Current (mA) 0.5 250 T A=85°C 200 TA =55°C 150 T A=25°C 100 1oz Copper on SOT-23-5 Package Mounted on recommended mimimum footprint (RJA=240°C/W) 50 0.4 0.3 0.2 0.1 0 0 0.1 0.4 0.7 1.0 1.3 1.6 1.9 25 2.2 35 45 Input-Output Voltage Differential VIN-VOUT (V) 55 65 75 85 95 105 115 125 Amibent Temperature T A ( °C) Note: VI N(max) <= 5.5V Figure 3. Safe Operating Area Figure 4. Power Dissipation vs. Temperature Figure 4 Safe Operating Area Figure 5. Fixed Mode *Distance between pin & capacitor must be no more than 1cm 1/12/2005 Rev.2.10 www.SiliconStandard.com 9 of 10 SS8014-xxG Physical Dimensions C D L E H θ1 e1 e Tape/package orientation A A2 A1 b Feed Direction SOT23-5 package orientation Note: 1. Package body sizes exclude mold flash protrusions or gate burrs 2. Tolerance ±0.1000 mm (4mil) unless otherwise specified 3. Coplanarity: 0.1000mm 4. Dimension L is measured in gage plane SYMBOLS MIN A 1.00 A1 A2 DIMENSIONS IN MILLIMETERS NOM MAX 1.10 1.30 0.00 ----- 0.10 0.70 0.80 0.90 b 0.35 0.40 0.50 C 0.10 0.15 0.25 D 2.70 2.90 3.10 E 1.40 1.60 1.80 e ----- 1.90(TYP) ----- e1 ----- 0.95 ----- H 2.60 2.80 3.00 L 0.37 ------ ----- ?1 1º 5º 9º Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 1/12/2005 Rev.2.10 www.SiliconStandard.com 10 of 10