LVTTL/LVCMOS COMPATIBLE LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS SINGLE CHANNEL: DUAL CHANNEL: FOD070L FOD073L FOD270L DESCRIPTION The FOD070L, FOD270L and FOD073L optocouplers consist of an AlGaAs LED optically coupled to a high gain split darlington photodetector. These devices are specified to operate at a 3.3V supply voltage. 8 The split darlington configuration separating the input photodiode and the first stage gain from the output transistor permits lower output saturation voltage and higher speed operation than possible with conventional darlington phototransistor optocoupler. In the dual channel device FOD073L, an integrated emitter – base resistor provides superior stability over temperature. The combination of a very low input current of 0.5 mA and a high current transfer ratio of 2000% makes this family particularly useful for input interface to MOS, CMOS, LSTTL and EIA RS232C, while output compatibility is ensured to LVCMOS as well as high fan-out LVTTL requirements. 1 8 8 1 1 An internal noise shield provides exceptional common mode rejection of 10 kV/µs. FEATURES • Low power consumption • Low input current - 0.5 mA • Available in single channel 8-pin DIP (FOD270L), 8-pin SOIC (FOD070L) and dual channel 8-pin SOIC • High CTR-2000% • High CMR-10 kV/µs • Guaranteed performance over temperature 0°C to 70°C • U.L. recognized (File # E90700) • LVTTL/LVCMOS Compatible output 8 VCC N/C 1 8 VCC + 1 V F1 7 VB + 2 _ 2 7 V01 VF _ 6 VO 3 _ 6 V02 3 V F2 5 GND N/C 4 FOD070L / FOD270L 5 GND + 4 FOD073L APPLICATIONS • • • • • • Digital logic ground isolation – LVTTL/LVCMOS Telephone ring detector EIA-RS-232C line receiver High common mode noise line receiver µP bus isolation Current loop receiver TRUTH TABLE LED VO ON LOW OFF HIGH © 2004 Fairchild Semiconductor Corporation Page 1 of 17 8/10/04 LVTTL/LVCMOS COMPATIBLE LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS SINGLE CHANNEL: DUAL CHANNEL: FOD070L FOD073L FOD270L ABSOLUTE MAXIMUM RATINGS (No derating required up to 85°C) Parameter Symbol Value Units Storage Temperature TSTG -40 to +125 °C Operating Temperature TOPR -40 to +85 °C Lead Solder Temperature (Wave solder only. See reflow profile for surface mount devices) TSOL 260 for 10 sec °C EMITTER DC/Average Forward Input Current Each Channel IF (avg) 20 mA Peak Forward Input Current (50% duty cycle, 1 ms P.W.) Each Channel IF (pk) 40 mA Peak Transient Input Current - (≤1 µs P.W., 300 pps) Each Channel IF (trans) 1.0 A Reverse Input Voltage Each Channel VR 5 V Input Power Dissipation Each Channel PD 35 mW DETECTOR Average Output Current Each Channel IO (avg) 60 mA Emitter-Base Reverse Voltage (FOD070L, FOD270L) Each Channel VEB 0.5 V Supply Voltage, Output Voltage Each Channel VCC, VO -0.5 to 7 V Output power dissipation Each Channel PD 100 mW ELECTRICAL CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified) INDIVIDUAL COMPONENT CHARACTERISTICS Parameter Test Conditions EMITTER Input Forward Voltage Logic Low Supply Current Logic High Supply Current Device VF All BVR All IOH FOD070L FOD270L TA =25°C Each Channel (IF = 1.6 mA) (TA =25°C, IR = 10 µA) Input Reverse Breakdown Voltage DETECTOR Logic high output current Symbol Each Channel (IF = 0 mA, VO = VCC = 3.3 V) IF1 = IF2 = 0mA VO1 = VO2 = Open, VCC = 3.3 V ICCH 1.35 1.7 1.75 5.0 Unit V V FOD070L FOD270L 0.5 1.5 FOD073L 0.8 3 FOD070L FOD270L 0.01 1 FOD073L 0.01 2 IF = 1.6 mA, VO = Open, VCC = 3.3V IF = 0 mA, VO = Open, VCC = 3.3V Max 25 FOD073L IF1 = IF2 = 1.6mA VO1 = VO2 = Open, VCC = 3.3 V Typ** 0.05 Each Channel ICCL Min µA mA µA **All typicals at TA = 25°C © 2004 Fairchild Semiconductor Corporation Page 2 of 17 8/10/04 LVTTL/LVCMOS COMPATIBLE LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS SINGLE CHANNEL: DUAL CHANNEL: FOD070L FOD073L FOD270L TRANSFER CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified) Parameter COUPLED Current transfer ratio (Notes 1,2) Logic low output voltage output voltage (Note 2) Test Conditions Symbol (IF = 0.5 mA, VO = 0.4 V, VCC = 3.3V) CTR (IF = 1.6 mA, IO = 8 mA, VCC = 3.3V) (IF = 5 mA, IO = 15 mA, VCC = 3.3V) VOL Device Min ALL 400 Typ** Max Unit 7000 % ALL 0.07 0.3 ALL 0.07 0.4 V **All typicals at TA = 25°C SWITCHING CHARACTERISTICS (TA = 0 to 70°C unless otherwise specified., VCC = 3.3 V) Parameter Test Conditions Symbol Device (RL = 4.7 kΩ, IF = 0.5 mA) (Note 2) (Fig. 17) TPHL FOD070L FOD270L 3 FOD073L 5 (RL = 4.7 kΩ, IF = 0.5 mA) (Note 2) (Fig. 17) TPLH FOD070L FOD270L 50 FOD073L 25 Common mode transient immunity at logic high (IF = 0 mA, |VCM| = 10 VP-P) TA = 25°C (RL = 2.2 kΩ) (Note 3) (Fig. 18) |CMH| ALL 1,000 10,000 V/µs Common mode transient immunity at logic low (IF = 1.6 mA, |VCM| = 10 VP-P, RL = 2.2 kΩ) TA = 25°C (Note 3) (Fig. 18) |CML| ALL 1,000 10,000 V/µs Propagation delay time to logic low Propagation delay time to logic high Min Typ** Max Unit 30 µs 90 µs ** All typicals at TA = 25°C © 2004 Fairchild Semiconductor Corporation Page 3 of 17 8/10/04 LVTTL/LVCMOS COMPATIBLE LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS SINGLE CHANNEL: DUAL CHANNEL: FOD070L FOD073L FOD270L ISOLATION CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified) Characteristics Test Conditions Symbol (Relative humidity = 45%) (TA = 25°C, t = 5 s) (VI-O = 3000 VDC) (Note 4) Input-output insulation leakage current Min Typ** Max Unit 1.0 µA II-O ALL (RH ≤ 50%, TA = 25°C) (Note 4) ( t = 1 min.) VISO FOD070L FOD073L 2500 FOD270L 5000 (Note 4) (VI-O = 500 VDC) RI-O ALL 1012 Ω (Note 4,5) (f = 1 MHz) CI-O ALL 0.7 pF (RH ≤ 45%, VI-I = 500 VDC (Note 6) II-I FOD073L (VI-I = 500 VDC) (Note 6) RI-I FOD073L 1011 Ω (f = 1 MHz) (Note 6) CI-I FOD073L 0.03 pF Withstand insulation test voltage Resistance (input to output) Capacitance (input to output) Input-Input Insulation leakage current Device Input-Input Resistance Input-Input Capacitance VRMS 0.005 µA ** All typicals at TA = 25°C NOTES 1. Current Transfer Ratio is defined as a ratio of output collector current, IO, to the forward LED input current, IF, times 100%. 2. Pin 7 open. (FOD070L and FOD270L only) 3. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVCM/dt on the leading edge of the common mode pulse signal, VCM, to assure that the output will remain in a logic high state (i.e., VO>2.0 V). Common mode transient immunity in logic low level is the maximum tolerable (negative) dVCM/dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a logic low state (i.e., VO<0.8 V). 4. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together. 5. For dual channel devices, CI-O is measured by shorting pins 1 and 2 or pins 3 and 4 together and pins 5 through 8 shorted together. 6. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together. © 2004 Fairchild Semiconductor Corporation Page 4 of 17 8/10/04 LVTTL/LVCMOS COMPATIBLE LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS SINGLE CHANNEL: DUAL CHANNEL: FOD070L FOD073L FOD270L TYPICAL PERFORMANCE CURVES Fig. 2 Current Transfer Ratio vs. Input Forward Current (FOD270L only) Fig. 1 Input Forward Current vs Forward Voltage 4500 10 CTR - CURRENT TRANSFER RATIO (%) IF - FORWARD CURRENT (mA) 100 TA = 85°C TA = -40°C TA = 70°C 1 TA = 25°C TA = 0°C 0.1 0.01 0.001 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 4000 3500 TA = 70°C 3000 TA = 25°C 2500 TA = 0°C 2000 1500 TA = -40°C 1000 500 0 0.1 1.7 1 VF - FORWARD VOLTAGE (V) Fig. 4 Current Transfer Ratio vs. Input Forward Current (FOD073L only) 4500 3500 4000 TA = 85°C 3500 TA = 70°C 3000 TA = 25°C CTR - CURRENT TRANSFER RATIO (%) CTR - CURRENT TRANSFER RATIO (%) 10 IF - FORWARD CURRENT (mA) Fig. 3 Current Transfer Ratio vs. Input Forward Current (FOD070L only) VO = 0.4V VCC = 3.3V TA = 25°C 2500 TA = 0°C 2000 1500 TA = -40°C 1000 500 0 0.1 1 3000 TA = 70°C 2500 TA = 25°C 2000 TA = 0°C 1500 1000 TA = -40°C 500 0 0.1 10 1 10 IF - FORWARD CURRENT (mA) Fig. 6 DC Transfer Characterstics (FOD073L only) Fig. 5 DC Transfer Charactersitics (FOD070L, FOD270L) 140 160 140 VO = 0.4V VCC = 3.3V TA = 25°C TA = 85°C IF - FORWARD CURRENT (mA) TA = 25°C VCC = 3.3V TA = 25°C VCC = 3.3V IF = 5mA 120 IF = 4.5mA 120 IO - OUTPUT CURRENT (mA) IO - OUTPUT CURRENT (mA) VO = 0.4V VCC = 3.3V TA = 25°C TA = 85°C 4mA 3.5mA 100 3mA 80 2.5mA 2mA 60 1.5mA 40 1mA IF = 5mA IF = 4.5mA 100 4mA 3.5mA 80 3mA 2.5mA 60 2mA 40 1.5mA 1mA 20 20 0.5mA 0.5mA 0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0 0.0 V O - OUTPUT VOLTAGE (V) © 2004 Fairchild Semiconductor Corporation 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 V O - OUTPUT VOLTAGE (V) Page 5 of 17 8/10/04 LVTTL/LVCMOS COMPATIBLE LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS SINGLE CHANNEL: DUAL CHANNEL: FOD070L FOD073L FOD270L TYPICAL PERFORMANCE CURVES Fig. 7 Supply Current vs Input Forward Current (FOD270L, FOD070L, FOD073L) Fig. 8 Output Current vs Input Forward Current (FOD270L only) 100 TA = 25°C VCC = 3.3V FOD270L or FOD070L IO - Output Current (mA) ICC - (Per Channel) - Supply Current (mA) 10 FOD073L 1 0.1 TA = 85°C TA = -40°C TA = 0°C 10 TA = 25°C TA = 70°C VO = 0.4V VCC = 3.3V TA = 25°C 0.01 0.1 1 1 0.1 10 1 IF - Input Forward Current (mA) 10 IF - Input Forward Current (mA) Fig. 9 Output Current vs Input Forward Current (FOD070L only) Fig. 10 Output Current vs Input Forward Current (FOD073L only) 100 TA = 70°C, 85°C IO - Output Current (mA) IO - Output Current (mA) 100 TA = -40°C TA = 0°C TA = 25°C 10 TA = 70°C, 85°C TA = -40°C TA = 0°C 10 TA = 25°C 1 VO = 0.4V VCC = 3.3V TA = 25°C 1 0.1 1 VO = 0.4V VCC = 3.3V TA = 25°C 0.1 0.1 10 1 IF - Forward Current (mA) Fig. 11 Propagation Delay vs. Input Forward Current (FOD070L only) Fig. 12 Propagation Delay vs. Ambient Temperature (FOD073L only) 54 4 52 tPLH 3 50 2 48 1 46 tPHL 0 0 1 2 3 4 5 6 7 8 9 44 10 70 60 tP - Propagation Delay (µs) 1/f = 100µs Duty Cycle = 10% tPLH - Propagation Delay To Logic High (µs) tPHL - Propagation Delay To Logic Low (µs) 5 TA = 25°C VCC = 3.3V RL = 4.7kΩ 50 VCC = 3.3V IF = 0.5mA RL = 4.7kΩ 1/f = 100µs Duty Cycle = 10% 40 tPLH 30 20 10 tPHL 0 -40 IF - Input Forward Current (mA) © 2004 Fairchild Semiconductor Corporation 10 IF - Forward Current (mA) -20 0 20 40 60 80 100 TA - Ambient Temperature (°C) Page 6 of 17 8/10/04 LVTTL/LVCMOS COMPATIBLE LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS SINGLE CHANNEL: DUAL CHANNEL: FOD070L FOD073L FOD270L TYPICAL PERFORMANCE CURVES Fig. 13 Propagation Delay vs. Ambient Temperature (FOD070L, FOD270L) Fig. 14 Propagation Delay To Logic Low vs Pulse Period (FOD073L, FOD070L, FOD270L) 80 tPLH 6 60 4 40 tPHL 2 20 -20 0 20 40 60 1 0.01 0.1 1 10 T - Pulse Period (ms) Fig. 15 Propagation Delay vs. Input Forward Current (FOD270L only) Fig. 16 Propagation Delay vs. Input Forward Current (FOD073L only) 52 50 tPLH 3 48 2 46 1 44 tPHL 0 1 FOD070L, FOD270L TA - Ambient Temperature (°C) TA = 25°C VCC = 3.3V RL = 4.7kΩ 1/f = 100µs Duty Cycle = 10% 0 10 0 100 80 5 4 FOD073L 2 3 4 5 6 7 8 9 42 10 28 12 TA = 25°C VCC = 3.3V RL = 4.7kΩ 1/f = 100µs Duty Cycle = 10% 10 tPLH 8 24 6 22 4 20 2 18 tPHL 0 0 I F - Input Forward Current (mA) © 2004 Fairchild Semiconductor Corporation 26 1 2 3 4 5 6 7 8 9 tPLH - Propagation Delay to Logic High (µs) 8 tPHL - Propagation Delay to Logic Low (µs) 100 TA = 25°C VCC = 3.3V I = 0.5mA RL = 4.7kΩ Duty Cycle = 50µs tPHL - Propagation Delay to Logic Low (µs) 10 120 tPLH - Propagation Delay to Logic High (µs) 12 0 -40 tPHL - Propagation Delay to Logic Low (µs) 100 140 VCC = 3.3V IF = 0.5mA RL = 4.7kΩ 1/f = 200µs Duty Cycle = 10% tPLH - Propagation Delay to Logic High (µs) tPHL - Propagation Delay to Logic Low (µs) 14 16 10 I F - Input Forward Current (mA) Page 7 of 17 8/10/04 LVTTL/LVCMOS COMPATIBLE LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS SINGLE CHANNEL: DUAL CHANNEL: 1 Pulse Generator tr = 5ns Z O = 50 V Noise Shield FOD070L FOD073L 8 IF 2 7 3 6 VC CC Pulse Generator tr = 5ns Z O = 50 V +3.3 V VB IF Noise Shield + 1 8 VF1 - RL 2 7 3 6 4 5 VCC RL V01 VF VO VO IF MONITOR 0.1 µF I F Monitor Rm FOD270L 4 5 VO C = 15 pF* VF2 Rm + C L = 15 pF* GND V02 +3.3 V 0.1 µF Test Circuit for FOD070L, FOD270L GND Test Circuit for FOD073L IF 3.3 V VO 50% 50% VO OL *Includes Probe and Fixture Capacitance TPHL TPLH Fig. 17 Switching Time T Test Circuit © 2004 Fairchild Semiconductor Corporation Page 8 of 17 8/10/04 LVTTL/LVCMOS COMPATIBLE LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS SINGLE CHANNEL: DUAL CHANNEL: IF 1 FOD070L FOD073L Noise Shield 8 VCC FOD270L + +3.3 V IF 2 7 VB 1 8 VCC VF1 - RL +3.3 V RL 2 7 V01 A VF A B Noise Shield 3 6 B VO VO 0.1 µF VFF 4 5 + GND - VFF 3 6 4 5 VF2 + - V02 VO 0.1 µF GND VCM - + Pulse Gen VCM - Pulse Gen Test Circuit for FOD070L and FOD270L Test Circuit for FOD073L VCM 10 V 0V 90% 90% 10% 10% tr tf VO 3.3 V Switch at A : I F = 0 mA VO VOL Switch at B : I F = 1.6 mA Fig. 18 Common Mode Immunity Test Circuit © 2004 Fairchild Semiconductor Corporation Page 9 of 17 8/10/04 LVTTL/LVCMOS COMPATIBLE LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS SINGLE CHANNEL: DUAL CHANNEL: FOD070L FOD073L FOD270L 8-Pin DIP Package Dimensions (Through Hole) Package Dimensions (Surface Mount) 0.390 (9.91) 0.370 (9.40) PIN 1 ID. 4 3 2 4 3 2 1 0.270 (6.86) 0.250 (6.35) 5 6 7 PIN 1 ID. 1 0.270 (6.86) 0.250 (6.35) 8 5 6 8 7 SEATING PLANE 0.390 (9.91) 0.370 (9.40) 0.020 (0.51) MIN 0.020 (0.51) MIN 0.200 (5.08) 0.140 (3.55) 0.154 (3.90) 0.120 (3.05) 0.022 (0.56) 0.016 (0.41) 0.016 (0.40) 0.008 (0.20) 0.100 (2.54) TYP 15° MAX 3 2 0.405 (10.30) MIN Lead Coplanarity : 0.004 (0.10) MAX Recommend Pad Layout for Surface Mount Leadform PIN 1 ID. 1 0.315 (8.00) MIN 0.100 (2.54) TYP 0.300 (7.62) TYP 0.070 (1.78) 0.270 (6.86) 0.250 (6.35) 5 6 7 0.060 (1.52) 8 0.100 (2.54) 0.390 (9.91) 0.370 (9.40) SEATING PLANE 0.016 (0.41) 0.008 (0.20) 0.045 [1.14] 0.022 (0.56) 0.016 (0.41) Package Dimensions (0.4"Lead Spacing) 4 0.300 (7.62) TYP 0.070 (1.78) 0.045 (1.14) 0.070 (1.78) 0.045 (1.14) 0.295 (7.49) 0.415 (10.54) 0.070 (1.78) 0.045 (1.14) 0.030 (0.76) 0.004 (0.10) MIN 0.200 (5.08) 0.140 (3.55) 0.154 (3.90) 0.120 (3.05) 0.022 (0.56) 0.016 (0.41) 0.016 (0.40) 0.008 (0.20) 0.100 (2.54) TYP 0° to 15° 0.400 (10.16) TYP NOTE All dimensions are in inches (millimeters) © 2004 Fairchild Semiconductor Corporation Page 10 of 17 8/10/04 LVTTL/LVCMOS COMPATIBLE LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS SINGLE CHANNEL: DUAL CHANNEL: FOD070L FOD073L FOD270L SOIC 8 Package Dimensions (Surface Mount) Recommend Pad Layout 0.024 (0.61) SEATING PLANE 0.164 (4.16) 0.144 (3.66) 0.060 (1.52) 0.202 (5.13) 0.182 (4.63) 0.275 (6.99) 0.010 (0.25) 0.006 (0.16) 0.143 (3.63) 0.123 (3.13) 0.021 (0.53) 0.011 (0.28) 0.008 (0.20) 0.003 (0.08) 0.155 (3.94) 0.244 (6.19) 0.224 (5.69) 0.050 (1.27) TYP 0.050 (1.27) Lead Coplanarity : 0.004 (0.10) MAX © 2004 Fairchild Semiconductor Corporation Page 11 of 17 8/10/04 LVTTL/LVCMOS COMPATIBLE LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS SINGLE CHANNEL: DUAL CHANNEL: FOD070L FOD073L FOD270L ORDERING INFORMATION Option Order Entry Identifier S FOD270LS SD FOD270LSD SV Pending approval Surface Mount; VDE 0884 (DIP Package Only) SDV Pending approval Surface Mount; Tape and reel (DIP Package Only); VDE 0884 (1000 units per reel) T FOD270LT TV Pending approval R1 FOD070LR1 R1V Pending approval Description Surface Mount Lead Bend (DIP Package Only) Surface Mount; Tape and reel (DIP Package Only) (1000 units per reel) 0.4" lead spacing (DIP Package Only) 0.4" lead spacing, VDE 0884 (DIP Package Only) Tape and reel (500 units per reel) (SOIC 8 Package only) VDE, Tape and reel (500 units per reel) (SOIC 8 Package only) R2 FOD070LR2 R2V Pending approval Tape and reel (2500 units per reel) (SOIC 8 Package only) VDE 0884, Tape and reel (2500 units per reel) (SOIC 8 Package only) V Pending approval VDE 0884 MARKING INFORMATION (FOD070L, FOD073L) 70L 1 V X YY S 3 4 2 6 5 Definitions 1 Fairchild logo 2 Device number 3 VDE mark (Note: Only appears on parts ordered with VDE option – See order entry table) 4 One digit year code, e.g., ‘3’ 5 Two digit work week ranging from ‘01’ to ‘53’ 6 Assembly package code © 2004 Fairchild Semiconductor Corporation Page 12 of 17 8/10/04 LVTTL/LVCMOS COMPATIBLE LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS SINGLE CHANNEL: DUAL CHANNEL: FOD070L FOD073L FOD270L MARKING INFORMATION (FOD270L) 1 V 3 270L 2 XX YY B 6 4 5 Definitions 1 Fairchild logo 2 Device number 3 VDE mark (Note: Only appears on parts ordered with VDE option – See order entry table) 4 Two digit year code, e.g., ‘03’ 5 Two digit work week ranging from ‘01’ to ‘53’ 6 Assembly package code © 2004 Fairchild Semiconductor Corporation Page 13 of 17 8/10/04 LVTTL/LVCMOS COMPATIBLE LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS SINGLE CHANNEL: DUAL CHANNEL: FOD070L FOD073L FOD270L Carrier Tape Specifications (FOD070L and FOD073L) 8.0 ± 0.10 3.50 ± 0.20 2.0 ± 0.05 0.30 MAX Ø1.5 MIN 4.0 ± 0.10 1.75 ± 0.10 5.5 ± 0.05 12.0 ± 0.3 8.3 ± 0.10 5.20 ± 0.20 0.1 MAX 6.40 ± 0.20 Ø1.5 ± 0.1/-0 User Direction of Feed © 2004 Fairchild Semiconductor Corporation Page 14 of 17 8/10/04 LVTTL/LVCMOS COMPATIBLE LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS SINGLE CHANNEL: DUAL CHANNEL: FOD070L FOD073L FOD270L Carrier Tape Specifications (FOD270L) P0 t K0 P2 D0 E F A0 W1 W B0 d P User Direction of Feed Description Tape Width Symbol D1 Dimension in mm W 16.0 ± 0.3 t 0.30 ± 0.05 Sprocket Hole Pitch P0 4.0 ± 0.1 Sprocket Hole Diameter D0 1.55 ± 0.05 Sprocket Hole Location E 1.75 ± 0.10 F 7.5 ± 0.1 P2 4.0 ± 0.1 P 12.0 ± 0.1 A0 10.30 ±0.20 B0 10.30 ±0.20 K0 4.90 ±0.20 W1 1.6 ± 0.1 d 0.1 max Tape Thickness Pocket Location Pocket Pitch Pocket Dimensions Cover Tape Width Cover Tape Thickness Max. Component Rotation or Tilt Min. Bending Radius © 2004 Fairchild Semiconductor Corporation 10° R Page 15 of 17 30 8/10/04 LVTTL/LVCMOS COMPATIBLE LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS SINGLE CHANNEL: DUAL CHANNEL: FOD070L FOD073L FOD270L Reflow Profile (FOD070L and FOD073L) Te mperature ( °C) 300 230° C, 10–30 s 250 245° C peak 200 150 Time above 183°C, 120–180 sec 100 Ramp up = 2–10° C/sec 50 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 Time (Minute) • Peak reflow temperature: 245°C (package surface temperature) • Time of temperature higher than 183°C for 120–180 seconds • One time soldering reflow is recommended Reflow Profile (FOD270L) • Peak reflow temperature • Time of temperature higher than 245°C • Number of reflows 260° C (package surface temperature) 40 seconds or less Three 10 s 300 260° 245° Temperature (°C) 250 200 150 40 s 100 50 50 100 150 Time (s) © 2004 Fairchild Semiconductor Corporation 200 250 Page 16 of 17 8/10/04 LVTTL/LVCMOS COMPATIBLE LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS SINGLE CHANNEL: DUAL CHANNEL: FOD070L FOD073L FOD270L DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. © 2004 Fairchild Semiconductor Corporation 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Page 17 of 17 8/10/04