AKM AKD4683-B

ASAHI KASEI
[AKD4683-B]
AKD4683-B
AK4683 Evaluation Board Rev.0
FEATURE
AKD4683-B is an evaluation board for AK4683, a single chip 24bit CODEC that has two channels of ADC
and four channels of DAC with internal DIR, DIT. This board has interfaces with AKM’s evaluation boards
for A/D converter and D/A converter and makes easy to evaluate AK4683. Also this board has the digital
audio interface and then achieves the interface with digital audio systems via opt-connector or RCA
connector.
„ Ordering guide
AKD4683-B --- AK4683 Evaluation Board
10 wire flat cable for connection with printer port of PC (IBM-AT compatible machine),
control software for AK4683, driver for control software on Windows 2000/XP are
packed with this.
Control software does not work on Windows NT
Windows 2000/XP needs an installation of driver.
Windows 95/98/ME does not need an installation of driver.
FUNCTION
† On-board clock generator (use AK4114)
† Compatible with 2 types of digital audio interface
- Optical output/input and RCA input/output
- 10pin header for interface with external data source (x2)
† RCA connector for clock input with external clock source
† 10pin header for register control
-12V
+12V
GND
Regulator
Regulator
5V
Regulator
5V
3.3V
OpAmp
LOUT1/ROUT1
Opt Out
TX1
TX1
Opt IN RX0/1/2/3
RX0
Control Data
10pin Header
PORT A
OpAmp
LOUT2/ROUT2
10pin
Header
PORT B
AK4683
10pin
Header
HP-Jack
AK4114
RCA IN/OUT
LINA/RINA
MCKI
(Note) AK4114 has DIR, DIT and X’tal oscillator.
Figure 1. AKD4683-B Block Diagram
(* Circuit diagram and PCB layout are attached at the end of this manual.)
<KM080901>
2006/05
-1-
ASAHI KASEI
[AKD4683-B]
EVALUATION BOARD MANUAL
„ Operating sequence
(1) Set up power supply lines.
[+12V]
(Orange) = +12V
[-12V]
(Blue) = -12V
[AVSS1] (Black) = 0V
[AVSS2] (Black) = 0V
[DVSS] (Black) = 0V
[PVSS]
(Black) = 0V
[HVSS] (Black) = 0V
[DGND] (Black) = 0V
Each supply line should be distributed from the power supply unit.
(2) Set up evaluation mode and jumper pins. (Refer to the following item.)
(3) Connect cables. (Refer to the following item.)
(4) Power on.
The AK4683 should be reset once bringing PDN (SW3) “L” upon power-up.
(5) Set up control software registers. (Refer to the following item.)
„ Evaluation modes
(1) DAC with internal DIR
1. Connection of connector
In case of digital input through RX0, optical connector PORT5 (TORX176) or RCA connector J14 (RX0) are
available. In case of digital input through RX1, RX2 or RX3, only the optical connector PORT5 is available.
2. Setting of jumper pin
RX0 and RX1-3 should not select optical connector at the same time.
In case of digital input through RX1, RX2 or RX3, set jumpers JP32 (RX1), JP34 (RX2) or JP36 (RX3) as Table
2. Set unused channels to GND.
Connector
JP33 (RX0)
Optical (PORT5)
OPT
RCA (J14)
RCA
Table 1. Set-up of RX0
Input
RX1
RX2
RX3
Default
JP32 (RX1) JP34 (RX2) JP36 (RX3)
OPT
GND
GND
GND
OPT
GND
GND
GND
OPT
Table 2. Set-up of RX1, RX2, and RX3
<KM080901>
2006/05
-2-
ASAHI KASEI
[AKD4683-B]
3. Setting of toggle switch
Set SW1 (AK4114-PDN) to OFF.
(2) ADC with internal DIT
1. Connection of connector
For digital output, optical connector PORT3 (TOTX176) or RCA connector J13 (TX1) are available.
2. Setting of jumper pin
JP30 (TX1) controls digital output (optical connector PORT3 or RCA connector J13).
Connector
JP30(TX)
Optical (PORT3)
OPT
RCA (J13)
RCA
Table 3. Set-up of TX
Default
3. Setting of toggle switch
Set SW1 (AK4114-PDN) to OFF.
(3) DAC with external DIR
1. Connection of connector
For digital input, RCA connector J10 (AK4114-RX0) is available.
2. Setting of jumper pin
Setting of interface signal of PORTA/PORTB: AK4114 (U5) is as follows.
(Default input of PORTA is SDTIA1.)
PORT
PORTA
PORTB
PORT
PORTA
PORTB
JP22
(BICKA)
Short
Open
JP24
JP16
JP17
JP19
(OLRCKA) (ILRCKA) (SDTIA1) (SDTIA2)
Short
DIR
GND
Open
Open
GND
GND
Open
Table 4. Set-up of AK4114 interface (1/2)
JP27
(BICKB)
Open
Short
JP28
JP25
JP21
JP29
(LRCKB) (SDTIB) (MCLK-SEL) (MCLK)
Open
GND
Open
MCKO1
Open
DIR
MCKO1
Short
Table 5. Set-up of AK4114 interface (2/2)
JP20
(SDTIA3)
GND
GND
JP15
(XTIA)
Open
Open
JP23
(SDTO)
SDTOA
SDTOB
3. Setting of toggle switch
Set SW1 (AK4114-PDN) to ON.
4. Setting of DIP switch
Set SW2 (PORTA-DIR/4683): 2pin (DIF1) to OFF.
<KM080901>
2006/05
-3-
ASAHI KASEI
[AKD4683-B]
(4) ADC with external DIT
1. Connection of connector
For digital output, RCA connector J11 (AK4114-TX1) is available.
2. Setting of jumper pin
Setting of interface signal of PORTA/PORTB: AK4114 (U5) is as follows.
PORT
PORTA
PORTB
PORT
PORTA
PORTB
JP22
(BICKA)
Short
Open
JP24
JP16
JP17
JP19
(OLRCKA) (ILRCKA) (SDTIA1) (SDTIA2)
Open
GND
GND
Short
Open
GND
GND
Open
Table 6. Set-up of AK4114 interface (1/2)
JP27
(BICKB)
Open
Short
JP28
JP25
JP21
JP29
(LRCKB) (SDTIB) (MCLK-SEL) (MCLK)
Open
GND
Open
Open
Open
Open
GND
Short
Table 7. Set-up of AK4114 interface (2/2)
JP20
(SDTIA3)
GND
GND
JP15
(XTIA)
Short
Short
JP23
(SDTO)
SDTOA
SDTOB
3. Setting of toggle switch
Set SW1 (AK4114-PDN) to ON.
4. Setting of DIP switch
Set SW2 (PORTA-DIR/4683): 4pin (CM0) to ON.
(5) Internal loop back (Analog input → ADC → DAC → Analog output)
1. Connection of connector
For analog input, RCA connector J3 (LINA)/ J6 (RINA) are available.
For analog output, RCA connector J1 (LOUT1)/ J4 (ROUT1), J2 (LOUT2)/ J5 (ROUT2) are available.
2. Setting of jumper pin
JP1 (LIN1)/
JP7 (RIN1)
JP2 (LIN2)/
JP8 (RIN2)
JP3 (LIN3)/
JP9 (RIN3)
JP4 (LIN4)/
JP10 (RIN4)
JP5 (LIN5)/
JP11 (RIN5)
JP6 (LIN6)/
JP12 (RIN6)
LIN2/ RIN2
LINA/ RINA
Open
Open
LINA/ RINA
Open
Open
Open
Open
Open
Open
Open
Open
LIN3/ RIN3
Open
Open
LINA/ RINA
Open
Open
Open
LIN4/ RIN4
Open
Open
Open
LINA/ RINA
Open
Open
LIN5/ RIN5
Open
Open
Open
Open
LINA/ RINA
Open
LIN6/ RIN6
Open
Open
Open
Open
Open
LINA/ RINA
Input
LIN1/ RIN1
(Default)
Table 8. Set-up of LINA/RINA
<KM080901>
2006/05
-4-
ASAHI KASEI
[AKD4683-B]
JP1 (LIN1)/
JP7 (RIN1)
JP2 (LIN2)/
JP8 (RIN2)
JP3 (LIN3)/
JP9 (RIN3)
JP4 (LIN4)/
JP10 (RIN4)
JP5 (LIN5)/
JP11 (RIN5)
JP6 (LIN6)/
JP12 (RIN6)
LIN2/ RIN2
LINB/ RINB
Open
Open
LINB/ RINB
Open
Open
Open
Open
Open
Open
Open
Open
LIN3/ RIN3
Open
Open
LINB/ RINB
Open
Open
Open
LIN4/ RIN4
Open
Open
Open
LINB/ RINB
Open
Open
LIN5/ RIN5
Open
Open
Open
Open
LINB/ RINB
Open
LIN6/ RIN6
Open
Open
Open
Open
Open
LINB/ RINB
Input
LIN1/ RIN1
Table 9. Set-up of LINB/RINB
3. Setting of toggle switch
Set SW1 (AK4114-PDN) to OFF.
„ Register control
AKD4683-B can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT4
(uP-I/F) to PC by 10-line flat cable packed with this. Take care of the direction of connector. There is a mark at
pin#1. The pin layout of PORT4 is as Figure 2.
GND
CSN
GND
CCLK
GND
GND
CDTI
1
CDTO
2
NC
PORT4
uP I/F
GND
Mode
SW2_8
4-wire Serial
L
I2C
H
Table 10. Set-up of Parallel mode and Serial mode
10
9
Figure 2. PORT4 pin layout
Control software is packed with this evaluation board. Software operation procedure is included in evaluation board
manual.
<KM080901>
2006/05
-5-
ASAHI KASEI
[AKD4683-B]
„ Set-up DIP switch (SW2)
No.
1
2
3
4
5
6
7
8
Mode
0
1
2
3
4
5
6
7
Mode
0
1
2
3
No.
0
1
2
3
Name
ON (“H”)
OFF (“L”)
DIF0
Setting of AK4114 Audio Interface Format
DIF1
(Refer Table 12.)
DIF2
Selection of AK4114 Clock Mode (Clock Source)
CM0
(Refer Table 13.)
CM1
OCKS0 Selection of AK4114 Master Clock Output frequency
(Refer Table 14.)
OCKS1
I2C
I2C-bus control mode
4-wire serial control mode
Table 11. Set up modes of AK4114 (U5) and AK4683 (U1)
DIF2
DIF1
DIF0
DAUX
0
0
0
24bit, Left justified
0
0
1
24bit, Left justified
0
1
0
24bit, Left justified
0
1
1
24bit, Left justified
1
0
0
24bit, Left justified
1
0
1
24bit, I2S
1
1
0
24bit, Left justified
1
1
1
24bit, I2S
Table 12. AK4114 Audio Interface Format
CM1
0
0
Default
OFF
ON
ON
OFF
OFF
OFF
OFF
OFF
LRCK
I/O
H/L
O
H/L
O
H/L
O
H/L
O
H/L
O
L/H
O
H/L
I
L/H
I
SDTO
16bit, Right justified
18bit, Right justified
20bit, Right justified
24bit, Right justified
24bit, Left justified
24bit, I2S
24bit, Left justified
24bit, I2S
CM0
0
1
UNLOCK
PLL
X'tal
ON ON (Note1)
OFF
ON
0
ON
ON
1
0
1
ON
ON
1
1
ON
ON
Table 13. AK4114 Clock Mode (Clock Source)
OCKS1 OCKS0 MCKO1 MCKO2 X’tal
0
0
256fs
256fs
256fs
0
1
256fs
128fs
256fs
1
0
512fs
256fs
512fs
1
1
128fs
64fs
128fs
Table 14. AK4114 Master Clock Output Frequency
Clock source
PLL
X'tal
PLL
X'tal
X'tal
fs (max)
96 kHz
96 kHz
48 kHz
192 kHz
SDTO
RX
DAUX
RX
DAUX
DAUX
BICK
64fs
64fs
64fs
64fs
64fs
64fs
64-128fs
64-128fs
I/O
O
O
O
O
O
O
I
I
<Default>
<Default>
<Default>
„ Toggle switch
[SW3] (PDN):
Switch for power down reset of AK4683 (U1). Keep “H” during operation of AK4683 (U1).
Power down reset of AK4683 will be done by setting SW3 (PDN) to “L” once, after power on.
[SW1] (AK4114-PDN): Switch for power down reset of AK4114 (U5). Keep “H” during operation of AK4114 (U5).
Power down reset of AK4114 (U5) will be done by setting SW1 to “L” once, after power on.
„ LED indication
[LE1] (INT):
[LED1] (ERF):
LED for output of AK4683 (U1): INT. It turns on when output of AK4683 (U1): INT is “H”.
LED for output of AK4114 (U5): INT0.It turns on when output of AK4114 (U5): INT0 is “H”.
<KM080901>
2006/05
-6-
ASAHI KASEI
[AKD4683-B]
„ Set up Jumper pins
Jumper
Evaluation Mode
1
2
3
4
5
JP1 (LIN1)
LINA
LINA
LINA
LINA
LINA
JP2 (LIN2)
Open
Open
Open
Open
Open
JP3 (LIN3)
Open
Open
Open
Open
Open
JP4 (LIN4)
Open
Open
Open
Open
Open
JP5 (LIN5)
Open
Open
Open
Open
Open
JP6 (LIN6)
Open
Open
Open
Open
Open
JP7 (RIN1)
RINA
RINA
RINA
RINA
RINA
JP8 (RIN2)
JP9 (RIN3)
Open
Open
Open
Open
Open
Open
Open
Open
Open
Open
JP10 (RIN4)
Open
Open
Open
Open
Open
JP11 (RIN5)
Open
Open
Open
Open
Open
JP12 (RIN6)
Open
Open
Open
Open
Open
JP15 (XTIA)
Open
Open
Open
Short
Open
JP16 (ILRCKA)
Short
Short
Open
Short
JP17 (SDTIA1)
Short
GND
GND
DIR
GND
GND
JP19 (SDTIA2)
GND
GND
GND
GND
GND
JP20 (SDTIA3)
GND
GND
GND
JP21 (MCLK-SEL)
Open
Short
Open
MCKO1
GND
Open
GND
Open
Short
Short
Short
Short
SDTOA
Open
SDTOA
SDTOA
SDTOA
SDTOA
Open
Open
Short
Open
JP25 (SDTIB)
GND
GND
GND
JP27 (BICKB)
Open
Open
Open
GND
Open
GND
Open
JP28 (LRCKB)
Open
Open
Open
Open
Open
Open
Open
Open
JP30 (TX)
Open
OPT
Open
OPT
OPT
OPT
OPT
JP32 (RX1)
GND
GND
GND
GND
GND
JP22 (BICKA)
JP23 (SDTO)
JP24 (OLRCKA)
JP29 (MCLK)
JP33 (RX0)
OPT
OPT
OPT
OPT
OPT
JP34 (RX2)
GND
Short
GND
Short
GND
Short
GND
Short
GND
Short
GND
GND
GND
GND
GND
JP35 (GND)
JP36 (RX3)
(Default)
<KM080901>
2006/05
-7-
ASAHI KASEI
[AKD4683-B]
„ Set up control software registers
After the reset, setting example files are available as follows in CD-ROM to set registers in each evaluation modes.
Evaluation Mode 1
ADC/DAC: ak4683_adc_dac_mode1.akr
DIR/DIT: ak4683_dir_dit_mode1.akr
Evaluation Mode 2
ADC/DAC: ak4683_adc_dac_mode2.akr
DIR/DIT: ak4683_dir_dit_mode2.akr
Evaluation Mode 3
ADC/DAC: ak4683_adc_dac_mode3.akr
DIR/DIT: ak4683_dir_dit_mode3.akr
Evaluation Mode 4
ADC/DAC: ak4683_adc_dac_mode4.akr
DIR/DIT: ak4683_dir_dit_mode4.akr
Evaluation Mode 5
ADC/DAC: ak4683_adc_dac_mode5.akr
DIR/DIT: ak4683_dir_dit_mode5.akr
<KM080901>
2006/05
-8-
ASAHI KASEI
[AKD4683-B]
„ Analog Input Circuit
JP1
LIN1
LIN1
JP2
LIN2
LIN2
JP3
LIN3
LIN3
C20
+
LINA
2
3
1
1u
LINB
MR-552LS
LINA
VSS
LINB
LINA
C52
+
2
3
1
LINB
1u
JP4
LIN4
LIN4
JP5
LIN5
LIN5
JP6
LIN6
LIN6
JP7
RIN1
RIN1
JP8
RIN2
RIN2
JP9
RIN3
RIN3
LINA
LINB
VSS
LINA
LINB
LINA
LINB
C25
+
RINA
2
3
1
1u
RINB
J6 RINA
MR-552LS
RINA
VSS
RINB
RINA
C56
+
2
3
1
RINB
1u
RIN4
J7 LINB
MR-552LS
JP10 RINA
RIN4
J3 LINA
J9 RINB
MR-552LS
RINB
VSS
JP11 RINA
RIN5
RIN5
RINB
JP12 RINA
RIN6
RIN6
RINB
Figure 3. Analog Input Circuit
For analog input, RCA connector: J3 (LINA), J6 (RINA), J7 (LINB), J9 (RINB) are available to use.
Analog inputs are single-ended and input ranges of each channel are nominally 6.1Vpp@5V (R1~R12=47kΩ,
R=14,15=24kΩ).
<KM080901>
2006/05
-9-
ASAHI KASEI
[AKD4683-B]
„ Analog Output Circuit
-
1
2
3
1
N12V
LOUT1
R35
10k
MR-552LS
330p C21
HVSS
VSS
R38
4.7K
HVSS
-
7
J2
LOUT2
MR-552LS
R39
4.7k
HVSS
8
3
2
+
P12V
P12V
U3A
R41
NJM5532 220
C24
22u
1
2
3
1
-
N12V
330p C26
J4
ROUT1
ROUT2
R43
10k
5
+
6
-
U3B
R44
NJM5532 220
MR-552LS
HVSS
7
2
3
1
N12V
330p C27
VSS
R47
4.7K
2
3
1
N12V
330p C22
R40
4.7K
4
R42
10k
6
P12V
U2B
R36
NJM5532 220
4
+
ROUT1
+
VSS
R37
4.7k
HVSS
C23
22u
8
LOUT2
5
8
HVSS
C19
22u
J1
4
2
P12V
U2A
R34
NJM5532 220
+
8
+
4
R33
10k
3
+
+
C18
22u
LOUT1
J5
ROUT2
MR-552LS
VSS
R48
4.7K
R45
4.7k
R46
4.7k
HVSS
HVSS
Figure 4. Analog Output Circuit
For analog output, RCA connector: J1 (LOUT1), J4 (ROUT1), J2 (LOUT2), J5 (ROUT2) are available to use.
Analog outputs are single-ended and output ranges of each channel are nominally 3.0Vpp@5V.
Output range: AOUT is proportional to AVDD2 (AOUT=0.6 x AVDD2=0.6 x 5=3.0).
<KM080901>
2006/05
- 10 -
ASAHI KASEI
[AKD4683-B]
„ Digital Input Circuit (Internal DIR)
RX0/1/2/3
6
5
PORT5
6
5
GND
VCC
GND
OUT
L5 10u
4
3
2
1
VDD
C68
0.1u
TORX176
C69
+
10u
2
3
1
MR-552LS
VSS
JP33
RX0
C71
R85
75
JP32
RX1
OPT
470
PVSS
RX0 J14
R84
0.1u
RX1
GND
RX0
RCA
OPT
VSS
JP34
RX2
OPT
RX2
GND
VSS
VSS
JP36
RX3
OPT
RX3
GND
VSS
Figure 5. Digital Input Circuit (Internal DIR)
In case of input through RX0, optical connector PORT5 (TORX176) or RCA connector J14 (RX0) are available.
In case of input through RX1, RX2 or RX3, only the optical connector PORT5 is available.
Digital input: RX0, RX1, RX2 and RX3 is available to select overwriting IPS10 bit of control register (Addr=03H)
of AK4683: DIR/DIT part by control software.
„ Digital Input Circuit (External DIR: PORT A)
C30
J10 AK4114-RX0
2
3
1
MR-552LS
R54
75
0.1u
GND
GND
Figure 6. Digital Input Circuit (External DIR)
For digital input, RCA connector: J10 (AK4114-RX0) is available.
<KM080901>
2006/05
- 11 -
ASAHI KASEI
[AKD4683-B]
„ Digital Output Circuit (Internal DIT)
TX
5
6
PORT3
5
IN
VCC
IF
GND
6
4
3
2
1
TOTX176
R72
1k
DVSS
TX J13
OPT
VDD
T4
DA02
2
3
1
JP30
C67
0.1u
TX
TX
RCA
DVSS
R78
330
R79
100
MR-552LS
VSS
VSS
Figure 7. Digital Output Circuit (Internal DIT)
For digital output, optical connector PORT3 (TOTX176) or RCA connector J13 (TX1) are available.
„ Digital Output Circuit (External DIT)
J11 AK4114-TX1
T1
DA02
2
3
1
MR-552LS
R57
DGND2
R58
150
240
GND
Figure 8. Digital Output Circuit (External DIT)
For digital output, RCA connector: J11 (AK4114-TX1) is available.
„ Headphone Output Circuit
+
R51
HPR
(short)
HPL
(short)
J8
HP
4
3
C29
100u
01J0154
+
R49
6
VSS
C28
100u
Figure 9. Headphone Output Circuit
For headphone output, stereo mini jack J8 (HP) are available.
<KM080901>
2006/05
- 12 -
ASAHI KASEI
[AKD4683-B]
Control Software Manual
„ Set-up of evaluation board and control software
1. Set up the AKD4683-B according to previous term.
2. Connect IBM-AT compatible PC with AKD4683-B by 10-line type flat cable (packed with AKD4683-B). Take care
of the direction of 10pin header. (Please install the driver in the CD-ROM when this control software is used on
Windows 2000/XP. Please refer “Installation Manual of Control Software Driver by AKM device control software”.
In case of Windows95/98/ME, this installation is not needed. This control software does not operate on Windows
NT.)
3. Insert the CD-ROM labeled “AKD4683-B Evaluation Kit” into the CD-ROM drive.
4. Access the CD-ROM drive, and double-click the icon of “akd4683-b_adc_dac.exe”and “akd4683-b_dir_dit.exe”,
and set up the control program.
akd4683-b_adc_dac.exe: AK4683 ADC/DAC control program
akd4683-b_dir_dit.exe: AK4683 DIR/DIT control program
5. Then evaluate according to the follows.
„ Operation flow
Keep the following flow.
1. Set up the control program according to explanation above.
2. Click “Port Reset” button.
„ Explanation of each buttons
1. [Port Reset]:
2. [Write default]:
3. [All Write]:
4. [Function1]:
5. [Function2]:
6. [Function3]:
7. [Function4]:
8. [Function5]:
9. [SAVE]:
10. [OPEN]:
11. [Write]:
Set up the USB interface board (AKDUSBIF-A).
Initialize the registers.
Write all registers data that is currently displayed.
Dialog to write data by keyboard operation.
Dialog to write data by keyboard operation.
The sequence of register setting can be set and executed.
The sequence that is created on [Function3] can be assigned to buttons and
executed.
The register setting that is created by [SAVE] function on main window can
be assigned to buttons and executed.
Save the current register setting.
Write the saved values to all register.
Dialog to write data by mouse operation.
„ Indication of data
Input data is indicated on the register map. Red letter indicates “H” or “1” and blue one indicates “L” or “0”. Blank is the
part that is not defined in the datasheet.
<KM080901>
2006/05
- 13 -
ASAHI KASEI
[AKD4683-B]
„ Explanation of each dialog
1. [Write Dialog]: Dialog to write data by mouse operation
There are dialogs corresponding to each register.
Click the [Write] button corresponding to each register to set up the dialog. If you check the check box, data becomes
“H” or “1”. If not, “L” or “0”.
When writing the input data to register, click [OK] button. If not, click [Cancel] button.
2. [Function1 Dialog]: Dialog to write data by keyboard operation
Address Box: Input registers address in 2 figures of hexadecimal.
Data Box:
Input registers data in 2 figures of hexadecimal.
When writing the input data to register, click [OK] button. If not, click [Cancel] button.
3. [Function2 Dialog]: Dialog to evaluate ATT
This is a dialog corresponding to address: 0CH, 0DH, 0EH, 0FH, 10H, and 11H of AK4683.
Address Box:
Input registers address in 2 figures of hexadecimal.
Start Data Box:
Input starts data in 2 figures of hexadecimal.
End Data Box:
Input end data in 2 figures of hexadecimal.
Interval Box:
Data is written to register by this interval.
Step Box:
Data changes by this step.
Mode Select Box:
With checking this check box, data reaches end data, and returns to start data.
[Example]
Start Data = 00, End Data = 09
Data flow: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00
Without checking this check box, data reaches end data, but does not return to start data.
[Example]
Start Data = 00, End Data = 09
Data flow: 00 01 02 03 04 05 06 07 08 09
When writing the input data to register, click [OK] button. If not, click [Cancel] button.
<KM080901>
2006/05
- 14 -
ASAHI KASEI
[AKD4683-B]
4. [Save] and [Open]
4-1. [Save]
Save the current register setting data to the file. The extension of file name is “akr”.
(Operation flow)
(1) Click [Save] Button.
(2) Set the file name and push [Save] Button. The extension of file name is “akr”.
4-2. [Open]
The register setting data saved to the file by [Save] is written to register. The file type is the same as [Save].
(Operation flow)
(1) Click [Open] Button.
(2) Select the file (*.akr) and Click [Open] Button.
<KM080901>
2006/05
- 15 -
ASAHI KASEI
[AKD4683-B]
5. [Function3 Dialog]
The sequence of register setting can be set and executed.
(1) Click [F3] Button.
Set the control sequence.
Set the address, Data and Interval time. Set “-1” to the address of the step where the sequence should be paused.
(3) Click [Start] button. Then this sequence is executed.
The sequence is paused at the step of Interval="-1". Click [START] button, the sequence restarts from the paused step.
This sequence can be saved and opened by [Save] and [Open] button on the [Function3] window. The extension of file
name is “aks”.
Figure 1. Window of [F3]
<KM080901>
2006/05
- 16 -
ASAHI KASEI
[AKD4683-B]
6. [Function4 Dialog]
The sequence that is created on [Function3] can be assigned to buttons and executed. When [F4] button is clicked, the
window as shown in Figure 2 opens.
Figure 2. [F4] window
<KM080901>
2006/05
- 17 -
ASAHI KASEI
[AKD4683-B]
6-1. [OPEN] buttons on left side and [START] buttons
(1) Click [OPEN] button and select the sequence file (*.aks).
The sequence file name is displayed as shown in Figure 3.
Figure 3. [F4] window(2)
(2) Click [START] button, then the sequence is executed.
6-2. [SAVE] and [OPEN] buttons on right side
[SAVE]: The sequence file names can assign be saved. The file name is *.ak4.
[OPEN]: The sequence file names assign that are saved in *.ak4 are loaded.
6-3. Note
(1) [Function4] doesn't support the pause function of sequence function.
(2) All files need to be in same folder used by [SAVE] and [OPEN] function on right side.
(3) When the sequence is changed in [Function3], the file should be loaded again in order to reflect the change.
<KM080901>
2006/05
- 18 -
ASAHI KASEI
[AKD4683-B]
7. [Function5 Dialog]
The register setting that is created by [SAVE] function on main window can be assigned to buttons and executed. When
[F5] button is clicked, the following window as shown in Figure 4opens.
Figure 4. [F5] window
7-1. [OPEN] buttons on left side and [WRITE] button
(1) Click [OPEN] button and select the register setting file (*.akr).
(2) Click [WRITE] button, then the register setting is executed.
7-2. [SAVE] and [OPEN] buttons on right side
[SAVE]: The register setting file names assign can be saved. The file name is *.ak5.
[OPEN]: The register setting file names assign that are saved in *.ak5 are loaded.
7-3. Note
(1) All files need to be in same folder used by [SAVE] and [OPEN] function on right side.
(2) When the register setting is changed by [Save] Button in main window, the file should be loaded again in order to
reflect the change.
<KM080901>
2006/05
- 19 -
ASAHI KASEI
[AKD4683-B]
Measure Result
1) ADC part
[Measurement condition]
• Measurement unit : Audio Precision
• MCLK
: 256fs (fs=48kHz, 96kHz)
• BICK
: 64fs
• fs
: 48kHz, 96kHz
• BW
: 20Hz∼20kHz (fs=48kHz), 20Hz∼40kHz (fs=96kHz)
• Bit
: 24bit
• Power Supply
: AVDD1=AVDD2=DVDD=PVDD= TVDD=HVDD =5V,
• Interface
: Internal DIT (fs=48kHz, 96kHz)
• Temperature
: Room Temp
fs=48kHz
Parameter
S/(N+D)
DR
DR
S/N
S/N
Input signal
1kHz, -0.5dB
1kHz, -60dB
1kHz, -60dB
No signal
No signal
Measurement filter
20kLPF
20kLPF
20kLPF, A-weighted
20kLPF
20kLPF, A-weighted
Results
91.5 dB
98.9 dB
101.6 dB
99.0 dB
101.9 dB
fs=96kHz
Parameter
S/(N+D)
DR
DR
S/N
S/N
Input signal
1kHz, -0.5dB
1kHz, -60dB
1kHz, -60dB
No signal
No signal
Measurement filter
fs/2
fs/2
20kLPF, A-weighted
fs/2
20kLPF, A-weighted
Results
92.9 dB
98.0 dB
103.1 dB
98.0 dB
103.1 dB
<KM080901>
2006/05
- 20 -
ASAHI KASEI
[AKD4683-B]
2) DAC part
[Measurement condition]
• Measurement unit : Audio Precision
• MCLK
: 256fs (fs=48kHz, 96kHz), 128fs (fs=192kHz)
• BICK
: 64fs
• fs
: 48kHz, 96kHz, 192kHz
• BW
: 20Hz∼20kHz (fs=48kHz), 20Hz∼40kHz (fs=96kHz), 20Hz∼40kHz (fs=192kHz)
• Resolution
: 24bit
• Power Supply
: AVDD1=AVDD2=DVDD=PVDD= TVDD=HVDD=5V
• Interface
: Internal DIR (48kHz, 96kHz, 192kHz)
• Temperature
: Room Temp
fs=48kHz
Parameter
S/(N+D)
DR
DR
Input signal
1kHz, 0dB
1kHz, -60dB
1kHz, -60dB
Measurement filter
20kLPF
20kLPF
22kLPF, A-weighted
Results
98.0 dB
103.7 dB
105.8 dB
S/N
S/N
“0” data
“0” data
20kLPF
22kLPF, A-weighted
103.4 dB
106.0 dB
fs=96kHz
Parameter
Input signal
Measurement filter
Results
S/(N+D)
DR
DR
S/N
S/N
1kHz, 0dB
1kHz, -60dB
1kHz, -60dB
“0” data
“0” data
40kLPF
40kLPF
22kLPF, A-weighted
40kLPF
22kLPF, A-weighted
96.5 dB
102.0 dB
105.8 dB
101.0 dB
106.0 dB
fs=192kHz
Parameter
Input signal
Measurement filter
Results
S/(N+D)
DR
DR
S/N
S/N
1kHz, 0dB
1kHz, -60dB
1kHz, -60dB
“0” data
“0” data
40kLPF
40kLPF
22kLPF, A-weighted
40kLPF
22kLPF, A-weighted
96.8 dB
102.5 dB
105.8 dB
101.2 dB
105.8 dB
<KM080901>
2006/05
- 21 -
ASAHI KASEI
[AKD4683-B]
1.ADC
(ADC fs=48kHz)
AK4683 FFT fs=48kHz, -0.5dB input
AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
5k
10k
20k
Hz
Figure 10. FFT(Input Frequency =1kHz,Input Level=-0.5dBFS)
AK4683 FFT fs=48kHz, -60dB input
AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
Hz
Figure 11. FFT(Input Frequency =1kHz,Input Level=-60dBFS)
<KM080901>
2006/05
- 22 -
ASAHI KASEI
[AKD4683-B]
(ADC fs=48kHz)
AK4683 FFT fs=48kHz, No signal input
AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 12. FFT(noise floor)
AK4683 THD+N vs Input Level fs=48kHz
AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
-80
-82.5
-85
-87.5
-90
-92.5
-95
d
B
F
S
-97.5
-100
-102.5
-105
-107.5
-110
-112.5
-115
-117.5
-120
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBr
Figure 13. THD + N vs Input Level (Input Frequency =1kHz)
<KM080901>
2006/05
- 23 -
ASAHI KASEI
[AKD4683-B]
(ADC fs=48kHz)
AK4683 THD+N vs Input Frequency fs=48kHz
AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
-80
-82.5
-85
-87.5
-90
-92.5
-95
d
B
F
S
-97.5
-100
-102.5
-105
-107.5
-110
-112.5
-115
-117.5
-120
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 14. THD + N vs Input Frequency (Input Level=-0.5dBFS)
AK4683 Linarity fs=48kHz
AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0
T
-10
-20
-30
-40
-50
d
B
F
S
-60
-70
-80
-90
-100
-110
-120
-130
-140
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBr
Figure 15. Linearity (Input Frequency =1kHz)
<KM080901>
2006/05
- 24 -
ASAHI KASEI
[AKD4683-B]
(ADC fs=48kHz)
AK4683 Frequency Respons fs=48kHz
AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0
-0.1
-0.2
-0.3
-0.4
d
B
F
S
-0.5
-0.6
-0.7
-0.8
-0.9
-1
20
50
100
200
500
1k
2k
5k
10k
20k
5k
10k
20k
Hz
Figure 16. Frequency Response (Input Level=-0.5dBFS)
AK4683 Crosstalk fs=48kHz
AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
-70
-75
-80
-85
-90
-95
-100
-105
d
B
-110
-115
-120
-125
-130
-135
-140
-145
-150
20
50
100
200
500
1k
2k
Hz
Figure 17. Crosstalk (Input Level=-0.5dBFS)
<KM080901>
2006/05
- 25 -
ASAHI KASEI
[AKD4683-B]
(ADC fs=96kHz)
AK4683 FFT fs=96kHz, -0.5dB input
AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
40
50
100
200
500
1k
2k
5k
10k
20k
40k
10k
20k
40k
Hz
Figure 18. FFT(Input Frequency =1kHz,Input Level=-0.5dBFS)
AK4683 FFT fs=96kHz, -60dB input
AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
40
50
100
200
500
1k
2k
5k
Hz
Figure 19. FFT(Input Frequency =1kHz,Input Level=-60dBFS)
<KM080901>
2006/05
- 26 -
ASAHI KASEI
[AKD4683-B]
(ADC fs=96kHz)
AK4683 FFT fs=96kHz, No input
AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
40
50
100
200
500
1k
2k
5k
10k
20k
40k
Hz
Figure 20. FFT(Noise floor)
AK4683 THD+N vs Input Level fs=96kHz
AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
-80
-82.5
-85
-87.5
-90
-92.5
-95
d
B
F
S
-97.5
-100
-102.5
-105
-107.5
-110
-112.5
-115
-117.5
-120
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBr
Figure 21. THD + N vs Input Level (Input Frequency =1kHz)
<KM080901>
2006/05
- 27 -
ASAHI KASEI
[AKD4683-B]
(ADC fs=96kHz)
AK4683 THD+N vs Input Frequency fs=96kHz
AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
-80
-82.5
-85
-87.5
-90
-92.5
-95
d
B
F
S
-97.5
-100
-102.5
-105
-107.5
-110
-112.5
-115
-117.5
-120
40
50
100
200
500
1k
2k
5k
10k
20k
40k
Hz
Figure 22. THD + N vs Input Frequency (Input Level=-0.5dBFS)
AK4683 Linearity fs=96kHz
AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0
-10
-20
-30
-40
-50
d
B
F
S
-60
-70
-80
-90
-100
-110
-120
-130
-140
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBr
Figure 23. Linearity (Input Frequency =1kHz)
<KM080901>
2006/05
- 28 -
ASAHI KASEI
[AKD4683-B]
(ADC fs=96kHz)
AK4683 Frequency Respons fs=96kHz
AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0
-0.1
-0.2
-0.3
-0.4
d
B
F
S
-0.5
-0.6
-0.7
-0.8
-0.9
-1
40
50
100
200
500
1k
2k
5k
10k
20k
40k
10k
20k
40k
Hz
Figure 24. Frequency Response (Input Level=-0.5dBFS)
AK4683 Crosstalk fs=96kHz
AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
-70
-75
-80
-85
-90
-95
-100
-105
d
B
-110
-115
-120
-125
-130
-135
-140
-145
-150
40
50
100
200
500
1k
2k
5k
Hz
Figure 25. Crosstalk (Input Level=-0.5dBFS)
<KM080901>
2006/05
- 29 -
ASAHI KASEI
[AKD4683-B]
2.DAC部
(DAC fs=48kHz)
AK4683 FFT fs=48kHz, 0dBFS input
AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0
-10
-20
-30
-40
-50
-60
d
B
r
-70
A
-90
-80
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
5k
10k
20k
Hz
Figure 26. FFT(Input Frequency =1kHz, Input Level=0dBFS)
AK4683 FFT fs=48kHz, -60dB input
AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0
-10
-20
-30
-40
-50
-60
d
B
r
A
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
Hz
Figure 27. FFT(Input Frequency =1kHz, Input Level=-60dBFS)
<KM080901>
2006/05
- 30 -
ASAHI KASEI
[AKD4683-B]
(DAC fs=48kHz)
AK4683 FFT fs=48kHz, No signal input
AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0
-10
-20
-30
-40
-50
-60
d
B
r
-70
A
-90
-80
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 28. FFT(noise floor)
AK4683 FFT (Out of Band Noise) fs=48kHz, -60dB input
AVDD1=AVDD2=DVDD=PVDD=TVDD=HVDD=5V
+0
-10
-20
-30
-40
-50
-60
d
B
r
A
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
50k
100k
Hz
Figure 29. FFT(out-of-band noise)
<KM080901>
2006/05
- 31 -
ASAHI KASEI
[AKD4683-B]
(DAC fs=48kHz)
AK4683 THD+N vs Input Level fs=48kHz
AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
-80
-82.5
-85
-87.5
-90
-92.5
-95
d
B
r
-97.5
A
-102.5
-100
-105
-107.5
-110
-112.5
-115
-117.5
-120
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBFS
Figure 30. THD+N vs Input Level (Input Frequency =1kHz)
AK4683 THD+N vs Input Frequency fs=48kHz
AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
-80
-82.5
-85
-87.5
-90
-92.5
-95
d
B
r
-97.5
A
-102.5
-100
-105
-107.5
-110
-112.5
-115
-117.5
-120
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 31. THD+N vs Input Frequency (Input Level=0dBFS)
<KM080901>
2006/05
- 32 -
ASAHI KASEI
[AKD4683-B]
(DAC fs=48kHz)
AK4683 Linearity fs=48kHz
AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+0
-10
-20
-30
-40
-50
d
B
r
-60
A
-80
-70
-90
-100
-110
-120
-130
-140
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBFS
Figure 32. Linearity (Input Frequency =1kHz)
AK4683 Frequency Respons fs=48kHz
AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+1
+0.8
+0.6
+0.4
d
B
r
A
+0.2
+0
-0.2
-0.4
-0.6
-0.8
-1
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 33. Frequency Response (Input Level=0dBFS)
<KM080901>
2006/05
- 33 -
ASAHI KASEI
[AKD4683-B]
(DAC fs=48kHz)
AK4683 Crosstalk fs=48kHz
AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
-80
-82.5
-85
-87.5
-90
-92.5
-95
-97.5
d
B
-100
-102.5
-105
-107.5
-110
-112.5
-115
-117.5
-120
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 34. Cross-talk (Input Level=0dBFS)
<KM080901>
2006/05
- 34 -
ASAHI KASEI
[AKD4683-B]
(DAC fs=96kHz)
AK4683 FFT fs=96kHz, 0dB input
AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+0
-10
-20
-30
-40
-50
-60
d
B
r
-70
A
-90
-80
-100
-110
-120
-130
-140
-150
-160
40
50
100
200
500
1k
2k
5k
10k
20k
40k
10k
20k
40k
Hz
Figure 35. FFT(Input Frequency =1kHz, Input Level=0dBFS)
AK4683 FFT (Notch) fs=96kHz, 0dB input
AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+0
-10
-20
-30
-40
-50
-60
d
B
r
A
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
40
50
100
200
500
1k
2k
5k
Hz
Figure 36. FFT(Input Frequency =1kHz, Input Level=0dBFS,Notch-on)
<KM080901>
2006/05
- 35 -
ASAHI KASEI
[AKD4683-B]
(DAC fs=96kHz)
AK4683 FFT fs=96kHz, -60dB input
AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+0
-10
-20
-30
-40
-50
-60
d
B
r
-70
A
-90
-80
-100
-110
-120
-130
-140
-150
-160
40
50
100
200
500
1k
2k
5k
10k
20k
40k
10k
20k
40k
Hz
Figure 37. FFT(Input Frequency =1kHz, Input Level=-60dBFS)
AK4683 FFT fs=96kHz, No signal input
AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+0
-10
-20
-30
-40
-50
-60
d
B
r
A
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
40
50
100
200
500
1k
2k
5k
Hz
Figure 38. FFT(noise floor)
<KM080901>
2006/05
- 36 -
ASAHI KASEI
[AKD4683-B]
(DAC fs=96kHz)
AK4683 THD+N vs Input Level fs=96kHz
AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
-80
-82.5
-85
-87.5
-90
-92.5
-95
d
B
r
-97.5
A
-102.5
-100
-105
-107.5
-110
-112.5
-115
-117.5
-120
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBFS
FigureFigure 39. THD+N vs Input Level (Input Frequency =1kHz)
AK4683 THD+N vs Input Frequency fs=96kHz
AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
-80
-82.5
-85
-87.5
-90
-92.5
-95
d
B
r
-97.5
A
-102.5
-100
-105
-107.5
-110
-112.5
-115
-117.5
-120
40
50
100
200
500
1k
2k
5k
10k
20k
40k
Hz
Figure 40. THD+N vs fin (Input Level=0dBFS)
<KM080901>
2006/05
- 37 -
ASAHI KASEI
[AKD4683-B]
(DAC fs=96kHz)
AK4683 Linearity fs=96kHz
AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+0
-10
-20
-30
-40
-50
d
B
r
-60
A
-80
-70
-90
-100
-110
-120
-130
-140
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBFS
Figure 41. Linearity (Input Frequency =1kHz)
AK4683 Frequency Respons fs=96kHz
AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+1
+0.8
+0.6
+0.4
d
B
r
A
+0.2
+0
-0.2
-0.4
-0.6
-0.8
-1
40
50
100
200
500
1k
2k
5k
10k
20k
40k
Hz
Figure 42. Frequency Response (Input Level=0dBFS)
<KM080901>
2006/05
- 38 -
ASAHI KASEI
[AKD4683-B]
(DAC fs=96kHz)
AK4683 Crosstalk fs=96kHz
AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
-80
-82.5
-85
-87.5
-90
-92.5
-95
-97.5
d
B
-100
-102.5
-105
-107.5
-110
-112.5
-115
-117.5
-120
40
50
100
200
500
1k
2k
5k
10k
20k
40k
Hz
Figure 43. Cross-talk (Input Level=0dBFS)
<KM080901>
2006/05
- 39 -
ASAHI KASEI
[AKD4683-B]
(DAC fs=192kHz)
AK4683 FFT fs=192kHz 0dBFS input
AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+0
-10
-20
-30
-40
-50
-60
d
B
r
A
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
90
200
500
1k
2k
5k
10k
20k
50k
80k
20k
50k
80k
Hz
Figure 44. FFT(Input Frequency =1kHz, Input Level=0dBFS)
AK4683 FFT(Notch) fs=192kHz 0dBFS input
AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+0
-10
-20
-30
-40
-50
-60
d
B
r
A
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
90
200
500
1k
2k
5k
10k
Hz
Figure 45. FFT(Input Frequency =1kHz, Input Level=0dBFS,Notch-on)
<KM080901>
2006/05
- 40 -
ASAHI KASEI
[AKD4683-B]
(DAC fs=192kHz)
AK4683 FFT fs=192kHz -60dBFS input
AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+0
-10
-20
-30
-40
-50
-60
d
B
r
A
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
90
200
500
1k
2k
5k
10k
20k
50k
80k
20k
50k
80k
Hz
Figure 46. FFT(Input Frequency =1kHz, Input Level=-60dBFS)
AK4683 FFT fs=192kHz No signal input
AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+0
-10
-20
-30
-40
-50
-60
d
B
r
A
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
90
200
500
1k
2k
5k
10k
Hz
Figure 47. FFT(noise floor)
<KM080901>
2006/05
- 41 -
ASAHI KASEI
[AKD4683-B]
(DAC fs=192kHz)
AK4683 THD+N vs Input Level fs=192kHz
AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
-80
-82.5
-85
-87.5
-90
-92.5
-95
d
B
r
-97.5
A
-102.5
-100
-105
-107.5
-110
-112.5
-115
-117.5
-120
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
50k
80k
dBFS
Figure 48. THD+N vs Input Level (Input Frequency =1kHz)
AK4683 THD+N vs Input Frequency fs=192kHz
AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
-80
-82.5
-85
-87.5
-90
-92.5
-95
d
B
r
-97.5
A
-102.5
-100
-105
-107.5
-110
-112.5
-115
-117.5
-120
90
200
500
1k
2k
5k
10k
20k
Hz
Figure 49. THD+N vs Input Frequency (Input Level=0dBFS)
<KM080901>
2006/05
- 42 -
ASAHI KASEI
[AKD4683-B]
(DAC fs=192kHz)
AK4683 Linearity fs=192kHz
AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+0
-10
-20
-30
-40
-50
d
B
r
-60
A
-80
-70
-90
-100
-110
-120
-130
-140
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
50k
80k
dBFS
Figure 50. Linearity (f Input Frequency =1kHz)
AK4683 Frequency Respons fs=192kHz
AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
+1
+0.75
+0.5
+0.25
-0
-0.25
-0.5
d
B
r
-0.75
A
-1.25
-1
-1.5
-1.75
-2
-2.25
-2.5
-2.75
-3
90
200
500
1k
2k
5k
10k
20k
Hz
Figure 51. Frequency Response (Input Level=0dBFS)
<KM080901>
2006/05
- 43 -
ASAHI KASEI
[AKD4683-B]
(DAC fs=192kHz)
AK4683 Crosstalk fs=192kHz
AVDD1=AVDD2=DVDD=TVDD=HVDD=5V
-80
-82.5
-85
-87.5
-90
-92.5
-95
-97.5
d
B
-100
-102.5
-105
-107.5
-110
-112.5
-115
-117.5
-120
90
200
500
1k
2k
5k
10k
20k
50k
80k
Hz
Figure 52. Cross-talk (Input Level=0dBFS)
<KM080901>
2006/05
- 44 -
ASAHI KASEI
[AKD4683-B]
Revision History
Date
Manual
Board
(YY/MM/DD) Revision Revision
06/05/12
KM080900
0
06/05/25
KM080901
0
Reason
Contents
First Edition
Error Correct P.3. (3) DAC with external DIR
2. Setting of jumper pin
Add (Default input of PORTA is SDTIA1.)
JP16 (ILRCK)ÆJP16 (ILRCKA)
JP19(SDTIA2)： PORTA: DIRÆGND
JP20(SDTIA3)： PORTA: DIRÆGND
Add column of JP23 (SDTO)
4. Setting of DIP switch
P.4. (4) ADC with external DIT
2. Setting of jumper pin
JP16 (ILRCK)ÆJP16 (ILRCKA)
Add column of JP23 (SDTO)
4. Setting of DIP switch
SW2 (PORT-DIR/4683)ÆSW2 (PORTA-DIR/4683)
P.7. Set up Jumper pins
JP15 (XTIA)：Evaluation Mode 4：OpenÆShort
JP16 (ILRCKA)：Evaluation Mode 4：Short Æ Open
JP19(SDTIA2)： Evaluation Mode 3: DIRÆGND
JP20(SDTIA3)： Evaluation Mode 3: DIRÆGND
JP21(MCLK-SEL)： Evaluation Mode 1, 2, 4, 5：
MCKO1ÆOpen
JP24 (OLRCK)ÆJP24 (OLRCKA)
JP24 (OLRCKA)：Evaluation Mode 4：Open Æ Short
JP25 (SDTIB)：Evaluation Mode 3：DIR Æ GND
JP27 (BICKB)：Evaluation Mode 1, 2, 3, 4, 5：
Short Æ Open
JP28 (LRCKB)：Evaluation Mode 1, 2, 3, 4, 5：
Short Æ Open
JP29(MCLK)： Evaluation Mode 1, 2, 3, 4, 5：
MCKIÆOpen
<KM080901>
2006/05
- 45 -
ASAHI KASEI
[AKD4683-B]
IMPORTANT NOTICE
• These products and their specifications are subject to change without notice. Before considering any
use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized
distributor concerning their current status.
• AKM assumes no liability for infringement of any patent, intellectual property, or other right in the
application or use of any information contained herein.
• Any export of these products, or devices or systems containing them, may require an export license or
other official approval under the law and regulations of the country of export pertaining to customs and
tariffs, currency exchange, or strategic materials.
• AKM products are neither intended nor authorized for use as critical components in any safety, life
support, or other hazard related device or system, and AKM assumes no responsibility relating to any
such use, except with the express written consent of the Representative Director of AKM. As used
here:
(a) A hazard related device or system is one designed or intended for life support or maintenance of
safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its
failure to function or perform may reasonably be expected to result in loss of life or in significant
injury or damage to person or property.
(b) A critical component is one whose failure to function or perform may reasonably be expected to
result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or
system containing it, and which must therefore meet very high standards of performance and
reliability.
• It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or
otherwise places the product with a third party to notify that party in advance of the above content and
conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and
hold AKM harmless from any and all claims arising from the use of said product in the absence of such
notification.
<KM080901>
2006/05
- 46 -
5
4
3
RIN6
LIN6
RIN5
LIN5
RIN4
LIN4
RIN3
LIN3
2
RIN2
LIN2
RIN1
LIN1
1
AVDD1
D
D
R2
47k
R3
47k
R4
47k
R5
47k
R6
47k
R7
47k
R8
47k
R9
47k
R10
47k
R11
47k
10u
C1
R12
47k
+
R1
47k
R13
12k
1
RX0
2
I2C
3
RX1
4
RX2
5
RX3
6
INT
7
49
VSS
AVSS1
AVDD1
LIN1
50
51
53
52
LIN2
RIN2
RIN1
55
56
54
LIN3
57
RIN3
RIN4
LIN4
58
59
LIN5
60
61
LIN6
RIN5
62
63
RIN6
R
C4
0.1u
PVSS
+
C3
10u
PVDD
0.1u
C2
64
U1
PVDD
RISEL
RX0
ROPIN
I2C
LOPIN
48
47
46
C
RX1
LISEL
RX2
AVSS2
RX3
AVDD2
R14
24k
45
R15
24k
C
44
C5
0.1u
8
R16 (short)
CDTO
TST1
9
INT
VCOM
AK4683
VOUT
ROUT1
CDTO
LOUT1
LRCKB
ROUT2
BICKB
LOUT2
43
+
VSS
VSS
C6
10u
AVDD2
42
C7
0.1u
C8
+ 2.2u
VSS
41
ROUT1
40
LOUT1
39
ROUT2
38
LOUT2
R17 (short)
10
LRCKB
R18 (short)
11
BICKB
R19 (short)
SDTOB
SDTOB
MUTET
37
C9
R20 (short)
13
OLRCKA
B
OLRCKA
HPL
ILRCKA
HPR
+
12
1u
VSS
36
HPL
35
HPR
R21 (short)
14
ILRCKA
B
R22 (short)
BICKA
BICKA
HVSS
SDTOA
HVDD
34
C10
0.1u
C11
10u
VSS
HVDD
SDTIB
SDTIA3
33
32
31
SDTIA2
30
SDTIA1
29
CSN
CCLK
28
27
PDN
CDTI
26
25
TX
MCLK2
24
23
XTO
22
XTI
21
20
DVSS
TVDD
19
MCKO
17
18
16
DVDD
R23 (short)
SDTOA
+
15
12.288MHz
C12
0.1u
C13
0.1u
X1
1
2
+
+
C14
10u
C15
10u
C16
5p
VSS
C17
5p
VSS
R26
R27
R28
R29
R30
R31
R32
SDTIB
SDTIA3
SDTIA2
SDTIA1
CSN
(short) (short) (short) (short) (short) (short) (short)
CCLK/SCL
MCLK2
(short)
CDTI/SDA
R25
TX
DVDD
MCKI
4683-TVDD
R24
(short)
PDN
A
MCKO
A
Title
Size
Date:
5
4
3
AKD4683-B
Document Number
2
Rev
AK4683
A2
Tuesday, May 09, 2006
1
Sheet
0
1
of
5
B
R54
75
GND
E
E
R53
10k
0.1u
2
D3.3V
U4A
1
D3.3V
2
C32
0.1u
GND
D3.3V
U4B
1
4
74HC14
A
C31
10u
+
MR-552LS
D
GND
C30
J10 AK4114-RX0
2
3
1
C
C34
0.47u
GND
D1
HSU119
3
74HC14
L
C33
0.1u
DVDD
D3.3V
K
A
H
E
SW1
ATE1D-2M3
AK4114-PDN
R55
18k
D3.3V
D
1
37
INT1
AVDD
R
38
39
40
VCOM
41
AVSS
42
RX0
43
AVSS
44
RX1
45
TEST1
46
RX2
AVSS
16
15
14
13
12
11
10
9
48
SW2
1
2
3
4
5
6
7
8
RX3
DIF0
DIF1
DIF2
CM0
CM1
OCKS0
OCKS1
I2C
U5
47
GND
PORT A-DIR/4683
IPS0/RX4
D3.3V
U4C
INT0
36
5
R56
1k
LED1
ERF
6
K
A
D3.3V
74HC14
2
AVSS
OCKS0/CSN/CAD0
35
OCKS0
3
DIF0/RX5
OCKS1/CCLK/SCL
34
OCKS1
4
TEST2
CM1/CDTI/SDA
33
CM1
5
DIF1/RX6
CM0/CDTO/CAD1
32
CM0
D
RP1
9
8
7
6
5
4
3
2
1
CM0
CM1
OCKS0
OCKS1
I2C
JP15 XTIA
47k
MCKO
6
7
AVSS
PDN
AK4114
31
SDTOA
XTI
30
X2
5p
JP16
ILRCKA
C
IPS1/IIC
XTO
29
2
C36
8
11.2896MHz
GND
9
P/SN
DAUX
28
10
XTL0
MCKO2
27
XTL1
BICK
2
1
C39
10u
DIR
GND
R57
LRCK
24
MCKO1
23
25
JP21
MCLK-SEL
MCKO2
JP22 BICKA
JP23
SDTO
SDTOA
JP24 OLRCKA
MCLK
1
10 GND
9 MCKO
8 SDTIA1
7 SDTIA2
6 SDTIA3
1
2
3
4
5
B
SDTOB
DIR
BICKB
LRCKB
JP25
SDTIB
SDTIB
GND
DGND1
PORT2
MCLK
BICKB
LRCKB
SDTOB
1
2
3
4
5
10 GND
9 MCKO
8 SDTIB
7
6
GND
PORT B
A
MCKI
MCKI
MCLK2
MCLK2
Title
MR-552LS
Size
GND
A3
Date:
A
SDTIA3
JP29
2
74HC14
GND
GND
JP28 LRCKB
U8A
2
3
1
SDTIA2
PORT A
D3.3V
VDD
J12 MCKI
MCLK
BICKA
OLRCKA
SDTOA
ILRCKA
GND
GND
GND
JP20
SDTIA3
DIR
2
JP27 BICKB
A
SDTIA1
SDTOB
R58
150
DGND2
C
GND
JP19
SDTIA2
DIR
PORT1
DGND2
MCKO1
240
MR-552LS
ILRCKA
JP17
SDTIA1
26
C40
10u
4114-TVDD
2
3
1
22
C38
0.1u
+
1
+
C37
0.1u
B
DVSS
DVDD
21
VOUT
20
UOUT
19
COUT
18
BOUT
17
16
15
NC
14
13
GND
TX1
SDTO
TX0
VIN
TVDD
12
T1
DA02
5p
GND
11
J11 AK4114-TX1
MCLK2
BICKA
OLRCKA
C35
DIF2/RX7
1
GND
B
C
D
Document Number
AKD4683-B
Rev
DIR/DIT AK4114
Tuesday, May 09, 2006
Sheet
E
0
2
of
5
4
R33
10k
1
5 +
LOUT2
R35
10k
P12V
R36
U2B
NJM5532 220
D
J2
7
2
3
1
6 -
N12V
330p C22
MR-552LS
330p C21
HVSS
VSS
JP1
LIN1
R37
4.7k
R40
4.7K
LINB
1u
2
3
1
MR-552LS
JP2
LIN2
LINA
VSS
LIN2
LINB
R39
4.7k
JP3
LIN3
HVSS
LINA
LIN1
J3 LINA
MR-552LS
VSS
R38
4.7K
C20
LOUT2
4
N12V
4
HVSS
LOUT1
2
3
1
2 -
8
C19
22u
J1
1
+
LOUT1
P12V
R34
U2A
NJM5532 220
2
HVSS
LIN3
LINA
C52
J7 LINB
+
+
3 +
3
+
C18
22u
D
8
5
2
3
1
LINB
1u
JP4
LIN4
LINA
MR-552LS
LIN4
LINB
R42
10k
J4
1
2 4
N12V
330p C26
HVSS
ROUT1
2
3
1
8
C24
22u
5 +
ROUT2
R43
10k
JP5
LIN5
U3B
R44
NJM5532 220
J5
7
6 -
N12V
330p C27
MR-552LS
HVSS
ROUT2
2
3
1
4
3 +
ROUT1
P12V
U3A
R41
NJM5532 220
+
+
8
P12V
C23
22u
C
LIN5
JP6
MR-552LS
LIN6
VSS
LINA
C
LINB
LINA
LIN6
LINB
VSS
VSS
R48
4.7K
R45
4.7k
R46
4.7k
C25
JP7
RIN1
RINB
1u
RIN1
HVSS
HVSS
RINA
+
R47
4.7K
J6 RINA
2
3
1
MR-552LS
JP8
RIN2
RINA
VSS
RIN2
RINB
RIN3
B
RIN3
RINA
C56
J9 RINB
+
JP9
2
3
1
RINB
1u
JP10 RINA
RIN4
MR-552LS
RIN4
R51
+
(short)
C29
100u
R49
+
RINB
(short)
C28
100u
J8
HPL
VSS
JP11 RINA
HP
6
HPR
B
RIN5
RIN5
4
3
RINB
JP12 RINA
01J0154
RIN6
VSS
RIN6
RINB
A
A
Title
Size
A3
Date:
5
4
3
2
Document Number
AKD4683-B
Rev
0
INPUT/OUTPUT ANALOG
Tuesday, May 09, 2006
Sheet
1
3
of
5
5
4
3
2
1
VDD
U9
VDD
D
R66
10k
R67
470
R68
10k
R70
470
R73
10k
R74
PORT4
6
7
8
9
10
470
I2C
CSN
SCL/CCLK
SDA/CDTI
SDA(ACK)/CDTO
5
4
3
2
1
2
3
5
6
11
10
14
13
1A
1B
2A
2B
3A
3B
4A
4B
1
15
A/B
G
TX
1Y
4
2Y
7
3Y
9
1
4Y
12
74LS07
U7A
2
R69
100
R71
100
R75
100
R76
100
PORT3
CSN
5
5
CCLK/SCL
6
CDTI/SDA
6
IN
VCC
IF
GND
4
3
2
1
JP30
R72
1k
TOTX176
CDTO
D
OPT
VDD
C67
0.1u
TX
TX
RCA
VDD
DVSS
DVSS
T4
DA02
TX J13
74HCT157
R78
2
3
1
DGND2
330
R79
100
MR-552LS
R81 10k
GND
uP-I/F
VDD
VSS
VSS
C
C
RX0/1/2/3
PORT5
6
VDD
5
D2
1S1588
R82 VDD
10k
U8B
3
H
5
6
C71
RX0 J14
GND
U8D
1k
74HC14
8
9
OPT
RX1
GND
RX0
VSS
RCA
OPT
R85
75
JP34
RX2
0.1u
RX2
GND
VSS
R86
JP32
RX1
OPT
MR-552LS
VDD
4683-TVDD
R84
JP33
RX0
2
3
1
PR4553K
0.1u
C69
+
10u
PVSS
C70
0.1u
LE1
VDD
C68
470
PDN
B
L5 10u
4
3
2
1
PDN
74HC14 100
74HC14
5
GND
VCC
GND
OUT
TORX176
R83
U8C
4
L
SW3
ATE1D-2M3
VDD
6
VSS
B
VSS
INT
JP35
OPT
JP36
RX3
GND
RX3
GND
GND
VSS
VSS
A
A
Title
Size
A3
Date:
5
4
3
2
Document Number
AKD4683-B
Rev
INPUT/OUTPUT DIGITAL
Tuesday, May 09, 2006
Sheet
1
4
of
0
5
5
4
3
T2
NJM78M05DL1A
1
-12V
+12V
R60
+ C41
47u
R62
OUT
C42
0.1u
R61
1
IN
P12V
+
C43
0.1u
2
(short)
C44
47u
D
N12V
(short)
C46
0.1u
C45
+
3
AVDD1
GND
R59
D
2
47u
(short)
AVDD2
(short)
HVSS
R63
VSS
HVSS
VSS
DVDD
(short)
R64
PVDD
(short)
R87
VDD
(short)
C
R88
for NJM5532 x2
4683-TVDD
(short)
N12V
+
R89
C48
0.1u
4114-TVDD
+
C
(short)
C49
10u
VSS
C50
0.1u
C51
10u
T3
NJM78M05DL1A
3
HVDD
+ C47
47u
OUT
C72
0.1u
for NJM5532 x2
1
IN
P12V
C73
0.1u
2
(short)
GND
R90
C57
0.1u
+
C58
10u
VSS
C60
10u
C59
0.1u
T5
LT1117-3.3
R65
2
D3.3V
+ C53
47u
1
(short)
OUT
GND
B
+
C54
0.1u
IN
B
3
C55
0.1u
for 74HC14(U4)
D3.3V
C62
0.1u
U7B
GND
3
U4D
4
9
74LS07
U7C
5
6
8
10
13
74HC14
for 74HC14(U8), 74LS07(U7)
VDD
74HC14
C63
0.1u
GND
C64
0.1u
10
74LS07
U7F
13
GND
12
12
74LS07
A
10
74HC14
U8F
13
74HC14
U4F
U7E
11
11
74HC14
U4E
11
74LS07
U7D
9
U8E
8
GND
GND
12
A
74LS07
GND
Title
Size
A3
Date:
5
4
3
2
Document Number
AKD4683-B
Rev
Power Supply
Tuesday, May 09, 2006
Sheet
1
0
5
of
5