ASAHI KASEI AKD4706-A Evaluation board Rev.1 for AK4706 GENERAL DESCRIPTION AKD4706-A is an evaluation board for quickly evaluating the AK4706, 2ch DAC with AV SCART switch. Evaluation requires audio/video analog analyzers/generators, a digital audio signal source, and a power supply. AKM’s ADC evaluation board can be also used for the audio source. Also included is a AK4112B digital audio interface receiver which receives S/PDIF compatible audio data. The digital audio data is available via optical connector or BNC. AKD4706-A --- Evaluation board for AK4706 (Cable for connecting with printer port of IBM-AT compatible PC and a control software are enclosed with board. This control software dose not supports Windows NT.) FUNCTION BNC connectors for analog audio input/output BNC connectors for SD/HD video input/output On-board clock generator BNC connector for an external clock input Compatible with 2 types of digital interface 1. Serial interface: Direct interface with evaluation boards for AKM’s A/D converter evaluation boards. 2. S/PDIF: On-board AK4112BVF as DIR that accepts optical input or BNC input 10pin header for serial control interface PORT2 Serial interface VP VD VVD AGND ENCY2 BNC AK4112B ENCPR PORT3 ENCPB TVINL TVINR VCRVINL VCRVINR VCRFB ENCB ENCC ENCG ENCV ENCY ENCRC HDY HDPR HDPB AK4706 MONOOUT TVOUTL TVOUTR VCROUTL VCROUTR TVVOUT VCRVOUT VCRCOUT TVVIN TVB TVG TVRC TVSB TVFB RFV VCRVIN VCRB VCRG VCRRC VCRSB Figure 1. AKD4706-A Block Diagram Circuit diagram and PCB layout are attached at the end of this manual. <KM081401> 2005/12 -1- ASAHI KASEI Operation sequence 1) Set up the power supply lines. (Note 1) [+12V] [+5V] [D5V] [VVD] [AGND] [DGND] (Orange) (Red) (Red) (Red) (Black) (Black) = +12V = +5.0V (Note 2) = +5.0V (Note 3) = +5.0V (Note 4) = 0V = 0V Note: 1. Each supply line should be distributed from the power supply unit. 2. JP2 (REG) should be open when the “+5V” jack is used. 3. JP1 (D-A) should be open when the “D5V” jack is used. 4. JP22 (REG) should be open when the “VVD” jack is used. 2) Set-up the evaluation modes, jumper pins and DIP-switches. (Refer next sections.) 3) Connect the PORT1 (=µP-I/F) with PC by the enclosed 10-wire flat cable. 4) Set up the PC and execute the enclosed control software. (Refer “CONTROL SOFTWARE MANUAL”.) 5) Turn the power on. 6) Reset the AK4706 once by bringing the SW1 (PDN) “L”, and return it to “H”. Evaluation mode 1) S/PDIF mode (Optical Link or BNC: default) When the CM0 (DIP-switch S1_1 on board) is “L”, the AK4112B (DIR) generates MCLK, BICK, LRCK and SDATA from the received bit stream through PORT3 (TORX176: optical link) or J2 (BNC). This mode is used for the evaluation using CD test disk. The PORT2 (EXT) should be open. 1)-1. DIP-switch set-up No. CM0 DIF1 DIF0 Audio Data Format of AK4112B 1 2 3 4 L L L L L L H H L H L H 16bit LSB justified 18bit LSB justified 24bit MSB justified 24bit I2S Default Table 1. DIP-switch set-up Much the data format of the AK4706 via I2C-bus control as following notes. 1)-2. Jumper pins set up Input TORX BNC JP8 (RX) TORX BNC JP3 (EXT) Open Open JP4 (MCLK) Short Short JP5 (BICK) Short Short JP6 (SDTI) Short Short JP7 (LRCK) Short Short Table 2. Jumper pins set up <KM081401> 2005/12 -2- ASAHI KASEI 2) On-board X’tal mode/ Feeding external MCLK via BNC When the CM0 (DIP-switch S1_1 on board) is “H”, the AK4112B generates MCLK, BICK and LRCK from on-board X’tal or external clock form J1. SDATA should be fed via PORT2. 2)-1. DIP-switch set-up No. CM0 DIF1 DIF0 1 “H” Don’t care Don’t care Table 3. DIP-switch set-up 2)-2. Jumper pins set up Mode On-board X’tal External clock via BNC connector J1 JP3 (EXT) Open JP4 (MCLK) Short JP5 (BICK) Short JP6 (SDTI) Open JP7 (LRCK) Short Short Short Short Short Short Table 4. Jumper pins set up 3) Feeding all clocks from external Under the following set-up, all external signals can be fed to the AK4706 through POTR1 (EXT). The AKM’s evaluation board for ADC can be used. 3)-1. DIP-switch set-up No. CM0 DIF1 DIF0 1 Don’t care Don’t care Don’t care Table 5. DIP-switch set-up 3)-2. Jumper pins set up JP3 (EXT) Open JP4 (MCLK) Open JP5 (BICK) Open JP6 (SDTI) Open JP7 (LRCK) Open Table 6. Jumper pins set up <KM081401> 2005/12 -3- ASAHI KASEI 4) Set-up of S bit=“0/1” Mode SCART S1/S2 JP13 (ENCRC) S=“0” S=“1” JP14 (ENCRC) Open Short JP15 (VCRFB) Don’t care ENCRC Default Table 7. Set-up of Input for ENCRC Mode SCART S1/S2 JP9 (VCRRC) S=“0” S=“1” JP10 (VCRRC) Open Short JP11 (VCRRC) “I” “I” JP12 (VCRSB) Don’t care VCRRC Default Table 8. Set-up of Input for VCRRC Mode SCART S1/S2 JP17 (VCRC) S=“0” S=“1” JP18 (VCRC) Open Short Default Table 9. Set-up of Output for VCRC Mode SCART S1/S2 JP20 (TVRC) S=“0” S=“1” JP21 (TVRC) Open Short Default Table 10. Set-up of Output for TVRC DIP-switch (S1) List No. 1 2 3 4 5 Switch Name CM0 DIF0 DIF2 - Default OFF OFF OFF OFF OFF Function Refer the “ Evaluation mode” (Reserved) (Reserved) Table 11. DIP-switch list <KM081401> 2005/12 -4- ASAHI KASEI Jumper List No. Jumper Name 1 D-A 2 REG 3 EXT 4, 5, 6, 7 MCLK, BICK, LRCK, SDTI 8 RX 9 VCRRC 10 VCRRC 11 VCRRC 12 VCRSB 13 ENCRC 14 ENCRC 15 VCRFB 16 TVSB 17 VCRC 18 VCRC 19 TVFB 20 TVRC 21 TVRC 22 REG Function Power supply source set-up for digital section of AKD4706. Open: from the “D5V” Jack. (default) Short: from the regulator or the “+5V” Jack. Don’t connect anything to the “D5V” Jack. (default) Power supply source set-up for VD of AK4706. Open: from the “+5V” Jack. Short: from the regulator. Don’t connect anything the “+5V” Jack. (default) MCLK source set-up when CM0=“H”. Short: X’tal. (default). Open: External clock via BNC (J1). Remove the on-board X’tal. Clock source set-up Short: Connect the DIR (AK4112B). (default) Open: Separate the DIR. Supply clocks via Port1. S/PDIF’s port set-up when CM0=“L”. TORX: Optical connector PORT2. (default) BNC: BNC connector J2. Set-up of S=“0/1”. S=“0”: S bit=“0”. (default) S=“1”: S bit=“1”. Set-up of S=“0/1”. Open: S bit=“0”. (default) Short: S bit=“1”. Input Selection for VCRRC. “I” side: Input to VCRRC from VCRRC jack. (default) “I/O” side: Input to VCRC from VCRC jack. (Note: Refer CIO bit of AK4706) Input Selection for VCRRC or VCRSB. VCRRC: Input to VCRRC. VCRSB: Input to VCRSB. (default) Set-up of S=“0/1”. S=“0”: S bit=“0”. (default) S=“1”: S bit=“1”. Set-up of S=“0/1”. Open: S bit=“0”. (default) Short: S bit=“1”. Input Selection for ENCRC or VCRFB. ENCRC: Input to ENCRC. VCRFB: Input to VCRFB. (default) Output Selection for TVSB. Open: Output to TVSB. (default) Short: Output to VCRCOUT. Set-up of S=“0/1”. S=“0”: S bit=“0”. (default) S=“1”: S bit=“1”. Set-up of S=“0/1”. Open: S bit=“0”. (default) Short: S bit=“1”. Output Selection for TVFB. Open: Output to TVFB. (default) Short: Output to TVRC. Set-up of S=“0/1”. S=“0”: S bit=“0”. (default) S=“1”: S bit=“1”. Set-up of S=“0/1”. Open: S bit=“0”. (default) Short: S bit=“1” Power supply source set-up for VVD of AK4706. Open: from the “VVD” Jack. Short: from the regulator. Don’t connect anything the “VVD” Jack. (default) Table 12. Jumper list <KM081401> 2005/12 -5- ASAHI KASEI Serial Control The AK4706 can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT1 (µP-IF) with PC by 10 wire flat cable packed with the AKD4706. Be careful connector direction. Flat cable should be connected 10-pin header, red line put on 10pin header 5 and 6 pin. 1 10 SCL Connect SDA PC AKD4705-A SDA(ACK) RED 10 wire flat cable 5 10 pin Connector PORT1 µP-IF 6 10 pin Header Figure 2. Connection of 10 pin flat cable for PORT1 The indication content for LED LED turns on during each output is “H”. [LE1] Indicates unlock or parity error of S/PDIF. Connected to the ERF pin of DIR (AK4112B). (Normally off.) [LE2] Indicates the validity status of S/PDIF. Connected to the V pin of DIR (AK4112B). (Normally off.) Toggle switch (SW1 on board) operation “H”: AK4706 is Active. “L”: AK4706 is Powered Down. (Note; when the power of AKD4706-A is ON at first, SW1 should be switched from “L” to “H”.) <KM081401> 2005/12 -6- ASAHI KASEI Control Software Manual Set-up of evaluation board and control software 1. Set up the AKD4706 according to previous term. 2. Connect IBM-AT compatible PC with AKD4706-A by 10-line type flat cable (packed with AKD4706-A). Take care of the direction of 10pin header. (Please install the driver in the CD-ROM when this control software is used on Windows 2000/XP. Please refer “Installation Manual of Control Software Driver by AKM device control software”. In case of Windows95/98/ME, this installation is not needed. This control software does not operate on Windows NT.) 3. Insert the CD-ROM labeled “AK4706 Evaluation Kit” into the CD-ROM drive. 4. Access the CD-ROM drive and double-click the icon of “akd4706.exe” to set up the control program. 5. Then please evaluate according to the follows. Operation flow Keep the following flow. 1. Set up the control program according to explanation above. 2. Click “Port Reset” button. 3. Click “Write default” button Explanation of each buttons 1. [Port Reset] : 2. [Write default] : 3. [All Write] : 4. [Function1] : 5. [Function2] : 6. [Function3] : 7. [Function4] : 8. [Function5]: 9. [SAVE] : 10. [OPEN] : 11. [Write] : Set up the USB interface board (AKDUSBIF-A) when using the board. Initialize the register of AK4706. Write all registers that is currently displayed. Dialog to write data by keyboard operation. Dialog to write data by keyboard operation. The sequence of register setting can be set and executed. The sequence that is created on [Function3] can be assigned to buttons and executed. The register setting that is created by [SAVE] function on main window can be assigned to buttons and executed. Save the current register setting. Write the saved values to all register. Dialog to write data by mouse operation. Indication of data Input data is indicated on the register map. Red letter indicates “H” or “1” and blue one indicates “L” or “0”. Blank is the part that is not defined in the datasheet. <KM081401> 2005/12 -7- ASAHI KASEI Explanation of each dialog 1. [Write Dialog]: Dialog to write data by mouse operation There are dialogs corresponding to each register. Click the [Write] button corresponding to each register to set up the dialog. If you check the check box, data becomes “H” or “1”. If not, “L” or “0”. If you want to write the input data to the AK4706, click [OK] button. If not, click [Cancel] button. 2. [Function1 Dialog] : Dialog to write data by keyboard operation Address Box: Data Box: Input registers address in 2 figures of hexadecimal. Input registers data in 2 figures of hexadecimal. If you want to write the input data to the AK4706, click [OK] button. If not, click [Cancel] button. 3. [Function2 Dialog] : Dialog to evaluate DATT There are dialogs corresponding to register of 02h. Address Box: Input registers address in 2 figures of hexadecimal. Start Data Box: Input starts data in 2 figures of hexadecimal. End Data Box: Input end data in 2 figures of hexadecimal. Interval Box: Data is written to AK4706 by this interval. Step Box: Data changes by this step. Mode Select Box: If you check this check box, data reaches end data, and returns to start data. [Example] Start Data = 00, End Data = 09 Data flow: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00 If you do not check this check box, data reaches end data, but does not return to start data. [Example] Start Data = 00, End Data = 09 Data flow: 00 01 02 03 04 05 06 07 08 09 If you want to write the input data to the AK4706, click [OK] button. If not, click [Cancel] button. <KM081401> 2005/12 -8- ASAHI KASEI [AKD4706] 4. [SAVE] and [OPEN] 4-1. [SAVE] All of current register setting values displayed on the main window are saved to the file. The extension of file name is “akr”. <Operation flow> (1) Click [SAVE] Button. (2) Set the file name and click [SAVE] Button. The extension of file name is “akr”. 4-2. [OPEN] The register setting values saved by [SAVE] are written to the AK4706. The file type is the same as [SAVE]. <Operation flow> (1) Click [OPEN] Button. (2) Select the file (*.akr) and Click [OPEN] Button. <KM081401> 2005/12 -9- ASAHI KASEI [AKD4706] 5. [Function3 Dialog] The sequence of register setting can be set and executed. (1) Click [F3] Button. The following is displayed. (2) Set the control sequence. Set the address, Data and Interval time. Set “-1” to the address of the step where the sequence should be paused. (3) Click [START] button. Then this sequence is executed. The sequence is paused at the step of Interval="-1". Click [START] button, the sequence restarts from the paused step. This sequence can be saved and opened by [SAVE] and [OPEN] button on the Function3 window. The extension of file name is “aks”. Figure 1. Window of [F3] <KM081401> 2005/12 - 10 - ASAHI KASEI [AKD4706] 6. [Function4 Dialog] The sequence file (*.aks) saved by [Function3] can be listed up to 10 files, assigned to buttons and then executed. When [F4] button is clicked, the window as shown in Figure 2 opens. Figure 2. [F4] window <KM081401> 2005/12 - 11 - ASAHI KASEI [AKD4706] 6-1. [OPEN] buttons on left side and [START] buttons (1) Click [OPEN] button and select the sequence file (*.aks) saved by [Function3]. The sequence file name is displayed as shown in Figure 3. ( In case that the selected sequence file name is “DAC_Stereo_ON.aks”) Figure 3. [F4] window(2) (2) Click [START] button, then the sequence is executed. 6-2. [SAVE] and [OPEN] buttons on right side [SAVE] : The name assign of sequence file displayed on [Function4] window can be saved to the file. The file name is “*.ak4”. [OPEN] : The name assign of sequence file(*.ak4) saved by [SAVE] is loaded. 6-3. Note (1) This function doesn't support the pause function of sequence function. (2) All files used by [SAVE] and [OPEN] function on right side need to be in the same folder. (3) When the sequence is changed in [Function3], the sequence file (*.aks) should be loaded again in order to reflect the change. <KM081401> 2005/12 - 12 - ASAHI KASEI [AKD4706] 7. [Function5 Dialog] The register setting file(*.akr) saved by [SAVE] function on main window can be listed up to 10 files, assigned to buttons and then executed. When [F5] button is clicked, the window as shown in Figure 4 opens. Figure 4. [F5] window 7-1. [OPEN] buttons on left side and [WRITE] button (1) Click [OPEN] button and select the register setting file (*.akr). The register setting file name is displayed as shown in Figure 5. (In case that the selected file name is “DAC_Output.akr”) (2) Click [WRITE] button, then the register setting is executed. <KM081401> 2005/12 - 13 - ASAHI KASEI [AKD4706] Figure 5. [F5] windows(2) 7-2. [SAVE] and [OPEN] buttons on right side [SAVE] : The name assign of register setting file displayed on [Function5] window can be saved to the file. The file name is “*.ak5”. [OPEN] : The name assign of register setting file(*.ak5) saved by [SAVE] is loaded. 7-3. Note (1) All files used by [SAVE] and [OPEN] function on right side need to be in the same folder. (2) When the register setting is changed by [SAVE] Button on the main window, the register setting file (*.akr) should be loaded again in order to reflect the change. <KM081401> 2005/12 - 14 - ASAHI KASEI [AKD4706] MEASUREMENT RESULTS Audio [Measurement condition] • Measurement unit: Audio Precision System two Cascade • MCLK : 256fs • BICK : 64fs • fs : 44.1kHz • BW : 10Hz∼20kHz • Bit : 24bit • Power Supply : VD1=VD2=5V, VDD1=VDD2=VDD3=VDD4=5V, VP=12V • Interface : DIR : Room • Temperature • Volume#0=Volume#1=0dB • Measurement signal line path: DAC → Volume#0 → Volume#1 → TVOUTL/R Parameter S/(N+D) at 2Vrms Output DR S/N Input signal 1kHz, 0dBFS 1kHz, -60dBFS “0” data Measurement filter 20kLPF 22kLPF, A-weighted 22kLPF, A-weighted Results [dB] 93.8 97.1 97.5 Video [Measurement condition] • Signal Generator : Sony Tectonics TG2000 • Measurement unit: Sony Tectonics VM700T / Agilent 4395A • Power Supply : VD1=VD2=5V, VDD1=VDD2=VDD3=VDD4=5V, VP=12V • Interface : BNC • Temperature : Room • Measurement signal line path: ENCV → TVVOUT, ENCRC → TVRC, ENCY2 → HDY Parameter S/N Crosstalk DG DP Measurement conditions Input = 0% flat field Filter = Uni-weighted, BW= 15kHz to 5MHz Input = 100%red(ENCRC), Measured at TVVOUT Input = Modulated Lamp Input = Modulated Lamp <KM081401> Results 72.5 Unit dB -50.1 dB 0.58 0.80 % deg. 2005/12 - 15 - ASAHI KASEI [AKD4706] Plots (Audio) AKM AK4706 FFT fs=44.1kHz, fin=1kHz, 0dB input VP=12V, VD1=VD2=VVD1=VVD2=VVD3=VVD4=5V +0 -10 -20 -30 -40 -50 -60 d B r -70 A -90 -80 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 1k 2k 5k 10k 20k 5k 10k 20k Hz Figure1-1. FFT (fin=1kHz Input Level=0dBFS) AKM AK4706 FFT fs=44.1kHz, fin=1kHz, -60dB input VP=12V, VD1=VD2=VVD1=VVD2=VVD3=VVD4=5V +0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 1k 2k Hz Figure-1-2. FFT (fin=1kHz Input Level=-60dBFS) <KM081401> 2005/12 - 16 - ASAHI KASEI [AKD4706] AKM AK4706 FFT fs=44.1kHz, fin=1kHz, No input VP=12V, VD1=VD2=VVD1=VVD2=VVD3=VVD4=5V +0 -10 -20 -30 -40 -50 -60 d B r -70 A -90 -80 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure1-3. FFT (Noise Floor) AKM AK4706 Out of band Noise fs=44.1kHz, fin=1kHz, No input VP=12V, VD1=VD2=VVD1=VVD2=VVD3=VVD4=5V +0 -10 -20 -30 -40 -50 -60 d B r -70 A -90 -80 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 1k 2k 5k 10k 20k 50k 100k Hz Figure1-4. FFT (Outband Noise) <KM081401> 2005/12 - 17 - ASAHI KASEI [AKD4706] AKM AK4706 THD+N vs Input Level fs=44.1kHz, fin=1kHz VP=12V, VD1=VD2=VVD1=VVD2=VVD3=VVD4=5V -80 -82 -84 -86 -88 -90 -92 d B r -94 -96 A -98 -100 -102 -104 -106 -108 -110 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 dBFS Figure1-5. THD+N vs. Input level (fin=1kHz) AKM AK4706 THD+N vs Input Frequency fs=44.1kHz, fin=1kHz VP=12V, VD1=VD2=VVD1=VVD2=VVD3=VVD4=5V -80 -82 -84 -86 -88 -90 -92 d B r -94 -96 A -98 -100 -102 -104 -106 -108 -110 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure1-6. THD+N vs. Input Frequency (Input level=0dBFS) <KM081401> 2005/12 - 18 - ASAHI KASEI [AKD4706] AKM AK4706 Linearity fs=44.1kHz, fin=1kHz VP=12V, VD1=VD2=VVD1=VVD2=VVD3=VVD4=5V +0 -10 -20 -30 -40 d B r A -50 -60 -70 -80 -90 -100 -110 -120 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 dBFS Figure1-7.Linearity (fin=1kHz) AKM AK4706 Frequency Respons fs=44.1kHz, fin=1kHz VP=12V, VD1=VD2=VVD1=VVD2=VVD3=VVD4=5V +1 +0.9 +0.8 +0.7 +0.6 +0.5 +0.4 +0.3 +0.2 d B r A +0.1 +0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1 2k 4k 6k 8k 10k 12k 14k 16k 18k 20k Hz Figure1-8. Frequency Response (Input level=0dBFS) <KM081401> 2005/12 - 19 - ASAHI KASEI [AKD4706] AKM AK4706 Crosstalk fs=44.1kHz, fin=1kHz VP=12V, VD1=VD2=VVD1=VVD2=VVD3=VVD4=5V -80 -82 -84 -86 -88 -90 -92 -94 -96 -98 d B -100 -102 -104 -106 -108 -110 -112 -114 -116 -118 -120 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure1-9. Crosstalk (Input level=0dBFS) <KM081401> 2005/12 - 20 - ASAHI KASEI [AKD4706] Plots(Video) Figure 2-1. Noise spectrum (Input=0%flat field, BW=15kHz to 5MHz, Uni-weighted) Figure 2-2. Frequency Response (SD LPF response=6MHz) <KM081401> 2005/12 - 21 - ASAHI KASEI [AKD4706] Figure 2-3. Frequency Response (HD LPF response=6MHz) Figure 2-4. Frequency Response (HD LPF response=12MHz) <KM081401> 2005/12 - 22 - ASAHI KASEI [AKD4706] Figure 2-5. Frequency Response (HD LPF response=30MHz) Figure 2-6. Crosstalk (Input= 100% red (ENCRC), measured at TVVOUT) <KM081401> 2005/12 - 23 - ASAHI KASEI [AKD4706] Figure 2-7. DG, DP (Input= Modulated Lamp) <KM081401> 2005/12 - 24 - ASAHI KASEI [AKD4706] Revision History Date (YY/MM/DD) 05/11/02 05/12/28 Manual Board Revision Revision KM081400 0 First edition KM081401 Modification 1 Reason Contents Circuit diagram was changed (page 5/5). The R94 was changed from 300Ω to 75Ω. IMPORTANT NOTICE • These products and their specifications are subject to change without notice. Before considering any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor concerning their current status. • AKM assumes no liability for infringement of any patent, intellectual property, or other right in the application or use of any information contained herein. • Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. • AKM products are neither intended nor authorized for use as critical components in any safety, life support, or other hazard related device or system, and AKM assumes no responsibility relating to any such use, except with the express written consent of the Representative Director of AKM. As used here: (a) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. (b) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. • It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or otherwise places the product with a third party to notify that party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification. <KM081401> 2005/12 - 25 - 52 49 BICK MCLK 53 VD1 SDTI 54 50 LRCK 55 49 C4 0.1u VSS2 50 VD1 51 VD2 MCLK 52 53 BICK SDTI 54 55 LRCK 56 SCL 57 SDA 58 PDN 59 VVSS4 60 C3 0.1u D C2 10u R1 0 NC VVD4 61 62 NC VVSS3 NC CN2 63 64 C1 10u U1 1 + SCL 56 51 SDA 57 59 60 61 + 62 63 CN1 64 D 2 PDN 3 58 4 VVD4 5 CN3 R84 2 HDY 2 HDPR VSS1 48 PVCOM 47 HDPB 3 3 75 VVD3 4 + C5 10u HDPB 4 VVD3 RFV 5 5 RFV VCRVOUT 6 6 VCRVOUT 7 7 8 8 9 9 TVFB VCRC TVVOUT 10 VVD2 11 + 10u C13 DVCOM 0.1u C14 TVFB AK4706 VCRC VVSS2 C9 10u C12 10u 46 46 C11 0.1u C10 0.1u C7 10u 47 C8 0.1u 75 R91 C 48 C6 0.1u 75 R87 + HDPR 1 + 1 + HDY C VP 45 45 VP MONOOUT 44 44 MONOOUT TVOUTL 43 43 TVOUTL TVOUTR 42 42 TVOUTR VCROUTL 41 41 VCROUTL VCROUTR 40 40 VCROUTR 10 TVVOUT TVINL 39 39 TVINL 11 VVD2 TVINR 38 38 TVINR TVRC 12 12 TVRC VCRINL 37 37 VCRINL TVG 13 13 TVG VCRINR 36 36 VCRINR TVB 14 14 TVB TVSB 35 35 TVSB 15 15 VVSS1 VCRSB 34 34 VCRSB 16 16 INT 33 33 INT + C15 10u VCRB B 32 VCRRC VCRFB VCRVIN TVVIN ENCY VCRG 31 30 29 28 27 26 ENCV 25 RNCC 24 ENCRC 23 ENCG 22 ENCB 21 ENCPR ENCY2 ENCPB 20 17 R2 10k 19 VVD1 REFI 18 B C16 0.1u 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 ENCY2 ENCPR ENCPB ENCB ENCG ENCRC ENCC ENCV ENCY TVVIN VCRVIN VCRFB VCRRC VCRG VCRB A VVD1 A CN4 Title Size C Date: 5 4 3 2 AKD4706-A Document Number Rev AK4706 Monday, August 08, 2005 1 Sheet 0 1 of 5 4 3 D5V 470 2 3 4 5 6 7 8 9 PORT1 1 2 3 4 5 10 9 8 7 6 R7 R8 10k 470 SCL SDA SDA(ACK) A1 A2 A3 A4 A5 A6 A7 A8 1 19 R9 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 18 17 16 15 14 13 12 11 SCL D-A + Logic R6 3 OUT REG 10u +C24 C23 C25 47u 47u 1 +12V T1 NJM78M05FA JP2 L1 Logic IN 1 C17 0.1u VP + C26 2 10k Logic 100 R5 0.1u 0.1u C27 C18 0.1u C19 0.1u C20 0.1u C21 0.1u C22 0.1u D Short 47u for 74ACT14, 74HCU04, 74LS07, 74HCT541 R10 VD1 G1 G2 T2 LP2950A short 74HCT541 1 4112B_3.3V 51 C28 JP22 REG uP-I/F C29 47u 0.1u OUT GND R4 +5V JP1 U2 R3 IN 3 Logic + C30 + C31 47u 0.1u 2 D 2 GND 5 VVD R11 U3A 2 74LS07 1 Logic 10k + R13 SDA C71 47u (short) SDA(ACK) R12 VVD1 short R14 VVD2 C C short R15 VVD3 short ٛ 4112B_3.3V 5.1 C32 0.1u 10u MCLK BICK LRCK SDATA R16 C33 + VVD4 short C34 Logic C35 10u PORT2 10 9 8 7 6 EXT Logic D1 R19 10k INT + CM0 R18 10k U4A Logic 1 R20 10k R21 0.1u Logic 1 2 3 4 5 U4B 2 3 74ACT14 H 4 PDN 74ACT14 L C36 300 SW1 0.1u PDN U6 U5A 1 JP3 2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 EXT 74HCU04 2 C37 J1 BNC X1 22p 12.288MHz R24 75 1 C38 22p B DVDD DVSS TVDD V/TX XTI XTO PDN R AVDD AVSS RX1 DIF0/RX2 DIF1/RX3 DIF2/RX4 PDN CM0/CDTO CM1/CDTI OCKS1/CCLK OCKS0/CSN MCK01 MCK02 DAUX BICK SDTO LRCK ERF FS96 P/S AUTO 28 27 26 25 24 23 22 21 20 19 18 17 16 15 JP4 JP5 JP6 JP7 R22 MCLK BICK SDTI LRCK 100 R23 100 R25 100 MCLK BICK SDTI R26 100 LRCK B Logic AK4112BVF R27 3 4112B_3.3V C39 + C40 10u 0.1u 5 LE1 R28 U5B 4 ERF 1k U5C 5 LE2 R29 U5D 9 9 74HCU04 V 11 5 11 13 C41 CM0 1 DIF0 2 DIF2 3 C42 + 0.1u R30 470 C43 BNC(RX) 74ACT14 11 U3E 10 74LS07 U4F 12 13 10 9 8 7 6 4 5 TORX 74ACT14 12 74LS07 Logic SW DIP-5 5 4 3 2 1 JP8 RX U3F 12 13 74HCU04 AK4112B 10u RP1 J2 U3D 8 74LS07 10 S1 DIF2 4 3 2 1 TORX176 A 9 U4E 10 U5F DIF0 47u PORT3 5 U3C 6 74LS07 8 74ACT14 U5E 1k 74HCU04 GND VCC GND OUT 5 U4D 6 8 74HCU04 L2 6 U3B 4 74LS07 6 74ACT14 74HCU04 Logic 6 3 U4C 18k CM0 DIF0 DIF2 A BNC R-PACK5R R31 75 0.1u Title Size C Date: 5 4 3 2 AKD4706-A Document Number Rev 0 Power supply / AK4112B Thursday, August 11, 2005 1 Sheet 2 of 5 5 4 J3 VCRINR C44 2 R32 1 C45 R33 10u 300 + D 3 + 0.47u R34 VCRINR J4 D MONOOUT MONOOUT 300 R35 10k (open) J5 VCRINL C47 R36 10u + C46 + 0.47u R38 VCRINL J6 R37 TVOUTL 300 TVOUTL 300 R39 10k (open) C C + 0.47u R42 TVINR 300 (open) J9 TVINL TVOUTR 300 R43 10k C51 10u TVINL J8 R41 TVOUTR R44 + 0.47u R46 B 10u + C50 C49 + R40 From Analog output C48 FOR Analog input J7 TVINR J10 R45 VCROUTL 300 VCROUTL 300 R47 B 10k (open) C52 + 10u J11 R48 VCROUTR 300 VCROUTR R49 10k A A Title Size B Date: 5 4 3 2 Document Number AKD4706-A Analog Input/Output Circuit Thursday, July 21, 2005 Sheet 1 3 of Rev 0 5 5 4 J12 ENCY2 3 J13 ENCC C53 R50 2 (short) R52 ENCC (short) 0.1u R53 75 J14 VCRFB C54 R51 ENCY2 1 VCRFB1 0.1u R54 75 R55 75 300 D D J15 ENCPR J16 ENCV C55 R56 (short) ENCV (short) 0.1u R59 75 J17 JP9 VCRRC S=0 C56 R57 ENCPR JP11 I VCRRC R58 C58 (short) 0.1u VCRRC O VCRRC 0.1u R60 75 JP10 S=1 C57 0.1u R61 75 VCRRC VCRCOUT JP12 VCRRC R62 100k J18 ENCPB VCRSB J19 ENCY C59 R63 C60 R64 ENCPB (short) C ENCY (short) 0.1u R65 75 VCRSB VCRSB VCRSB1 C 0.1u R66 75 J20 VCRG C61 R67 VCRG (short) R68 75 J21 ENCB J22 TVVIN C62 R69 C63 R70 ENCB (short) TVVIN (short) 0.1u R71 75 0.1u 0.1u R72 75 J23 VCRB C64 R73 VCRB (short) R74 75 B J24 ENCG J25 VCRVIN C65 R75 (short) B C66 R76 ENCG VCRVIN (short) 0.1u R77 75 0.1u 0.1u R78 75 J26 VCRSB R79 VCRSB1 R80 75 J27 JP13 ENCRC S=0 JP14 C67 (short) 0.1u ENCRC S=1 ENCRC ENCRC R81 300 C68 0.1u R82 75 JP15 ENCRC A R83 100k VCRFB1 A VCRFB VCRFB VCRFB Title Size B Date: 5 4 3 2 AKD4706-A Document Number Rev 0 Video Block Input Circuit Friday, July 22, 2005 Sheet 1 4 of 5 5 4 3 J28 2 J29 R85 HDY J30 R86 VCRVOUT 75 HDY 1 TVG 75 VCRVOUT TVG D D TVSB1 TVSB JP16 R88 J31 HDPR JP17 S=0 HDPR VCRC JP18 75 J32 J33 R89 VCRCOUT TVB 75 TVB C69 S=1 VCRC VCRC 0.1 VCRCOUT R90 C C 10k TVSB1 J34 J35 R92 HDPB HDPB J36 R93 TVVOUT 75 300 TVVOUT TVSB TVSB TVFB1 R94 75 B TVFB JP19 R95 J37 RFV JP20 S=0 RFV TVRC JP21 75 J38 TVRC B C70 S=1 TVRC TVRC 0.1 R96 10k TVFB1 R97 75 J39 TVFB TVFB A A Title Size B Date: 5 4 3 2 AKD4706-A Document Number Rev 0 Video Block Output Circuit Wednesday, December 28, 2005Sheet 1 5 of 5