AMSCO AND52

CUB
AND52
R
Austria Mikro Systeme International
0.6 µm CMOS
AND52 is a 5-input AND gate with 2x drive strength.
Truth Table
Capacitance
A
B
C
D
E
Q
L
X
X
X
X
H
X
L
X
X
X
H
X
X
L
X
X
H
X
X
X
L
X
H
X
X
X
X
L
H
L
L
L
L
L
H
Ci (pF)
A
B
C
D
E
AND52
A
B
C
D
E
Q
Area
0.95 mils
Power
2
4.05 µW / MHz
Delay [ns] = tpd.. = f(SL, L)
Output Slope [ns] = op_sl.. = f(L)
AC Characteristics :
0.054
0.053
0.059
0.057
0.058
Tj = 25°C
with SL = Input Slope [ns] ; L = Output Load [pF]
with L = Output Load [pF]
VDD = 3.3V
Typical Process
AC Characteristics
Characteristics
Symbol
Delay A to Q
SL = 0.1
SL = 2.0
L = 0.2
L = 1.4
L = 2.0
L = 0.2
L = 1.4
L = 2.0
tpdar
tpdaf
0.55
0.61
1.91
1.73
2.64
2.28
0.60
0.98
1.96
2.10
2.65
2.64
Delay B to Q
tpdbr
tpdbf
0.60
0.70
2.02
1.84
2.65
2.37
0.64
1.07
2.01
2.18
2.71
2.72
Delay C to Q
tpdcr
tpdcf
0.65
0.79
2.05
1.93
2.69
2.50
0.65
1.17
2.00
2.30
2.69
2.83
Delay D to Q
tpddr
tpddf
0.68
0.89
2.01
2.03
2.71
2.61
0.62
1.24
1.98
2.41
2.67
2.93
Delay E to Q
tpder
tpdef
0.68
0.97
2.07
2.08
2.74
2.64
0.59
1.33
1.94
2.49
2.63
3.02
Output Slope A to Q
op_slar
op_slaf
0.98
0.71
5.22
3.62
7.31
5.26
0.93
0.71
5.18
3.68
7.47
5.25
Output Slope B to Q
op_slbr
op_slbf
1.00
0.75
5.30
3.55
7.46
5.06
0.93
0.75
5.27
3.53
7.31
5.05
Output Slope C to Q
op_slcr
op_slcf
0.97
0.78
5.21
3.57
7.30
5.11
0.96
0.78
5.23
3.61
7.45
5.01
Output Slope D to Q
op_sldr
op_sldf
0.98
0.81
5.18
3.63
7.30
5.12
0.97
0.81
5.22
3.63
7.46
5.07
Output Slope E to Q
op_sler
op_slef
0.98
0.85
5.27
3.80
7.37
5.06
0.96
0.82
5.22
3.72
7.43
5.05
Sept. 1996
- 34 -
Rev. N/C