APW7025 Advanced PWM and Dual Linear Power Control Features General Description • The APW7025 integrates a PWM controller and Dual linear controller, as well as the monitoring and protection functions into a single package , which provides three controlled power outputs with over-voltage and over-current protections. The PWM controller regulates the DDR reference voltage with a synchronous-rectified buck converter. The linear controller regulates power for microprocessor core voltage and Memory Voltage. 3 Regulated Voltage are provided • Switching Power for VTT(1.25V) • Linear1 Regulator for FBVDDQ(2.5V) • Linear2 Regulator for NVVDD(2.05V) • Simple Single-Loop Control Design • Voltage-Mode PWM Control • Excellent Output Voltage Regulation The precision reference and voltage-mode PWM control provide ±2% static regulation. The linear controller drives an external N-channel MOSFET to provide adjustable voltage. • PWM Output: ±1% • Linear Output: ±3% • Fast Transient Response The APW7025 monitors all the output voltages , and a single Power Good signal is issued when the PWM Voltage is within 10% of the 1.25V setting and the other output levels are above their under-voltage thresholds. Additional built-in over-voltage protection for the PWM output uses the lower MOSFET to prevent output voltages above 115% of the 1.25V setting. The PWM over-current function monitors the output current by using the voltage drop across the upper MOSFET’s RDS(ON) , eliminating the need for a current sensing resistor. • High-Bandwidth Error Amplifier • Full 0% to 100% Duty Ratio • Power-Good Output Voltage Monitor • Over-Voltage and Over-Current Fault Monitors • Small Converter Size • Constant Frequency Operation(200kHz) • Programmable Oscillator from 50kHz to 1MHz • Reduce External Component Count Pin Description Applications • • • VCC 1 24 DRIVE2 2 23 PHASE NC 3 22 LGATE Low-Voltage Distributed Power Supplies NC 4 21 PGND NC 5 20 OCSET VGA Card Power Regulation NC 6 19 VSEN1 NC 7 18 FB PGOOD 8 17 COMP VSEN2 9 16 VSEN3 SS 10 15 DRIVE3 FAULT 11 14 GND NC 12 13 VAUX Motherboard Power Regulation for Computers UGATE SOP24 ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev.P.1 - Mar., 2001 1 www.anpec.com.tw APW7025 Ordering Information APW7025 Package Code K : SOP - 24 Temp. Range C : 0 to 70°C Handling Code TU : Tube Handling Code Temp. Range Package Code TR : Tape & Reel Block Diagram VSEN1 VSEN3 VCC OCSET VAUX Power-on Reset (POR) × 1.10 + - DRIVE3 + × 0.90 × 0.75 1.26V INHIBIT VSEN2 DRIVE2 - - + + FAULT PGOOD - LINEAR UNDERVOLTAGE - VAUX + LUV + 200µA + - × 1.15 + - VCC OV SOFT START & FAULT LOGIC DRIVER1 UGATE OC1 + - PHASE INHIBIT + ERROR AMP1 - + 1.5V GATE CONTROL + - PWM COMP1 VCC - LGATE SYNCH DRIVE + 1.25V 28µA - OSCILLATOR VCC PWM1 PGND GND 4.5V FAULT SS FB COMP Absolute Maximum Ratings Symbol VCC VI , VO Parameter Supply Voltage Input , Output or I/O Voltage Rating Unit 15 V GND -0.3 V to VCC +0.3 V TA Operating Ambient Temperature Range 0 to 70 °C TJ Junction Temperature Range 0 to 125 °C TSTG Storage Temperature Range -65 to +150 °C 300 ,10 seconds °C TS Soldering Temperature Copyright ANPEC Electronics Corp. Rev. P.1 - Mar., 2001 2 www.anpec.com.tw APW7025 Thermal Characteristics Symbol R θJA Parameter Thermal Resistance in Free Air SOIC SOIC (with 3in2 of Copper) Value Unit 75 65 °C/W Electrical Characteristics (Recommended operating conditions , Unless otherwise noted) Refer to Block and Simplified Power System Diagrams , and Typical Application Schematic Symbol Parameter Test Conditions Min. APW7025 Typ. Max. Unit VCC Supply Current ICC Nominal Supply Current UGATE, LGATE, DRIVE2, DRIVE3 open Power-on Reset Rising VCC Threshold Vocset=4.5V Falling VCC Threshold Vocset=4.5V Rising VAUX Threshold Vocset=4.5V VAUX Threshold Hysteresis Vocset=4.5V Rising VOCSET Threshold Oscillator FOCS Free Running Frequency RT= Open RT= Open ∆VOSC Ramp Amplitude DAC and Bandgap Reference DAC Voltage accuracy VBG Bandgap Reference Voltage Bandgap Reference Tolerance Linear Regulators (OUT2, OUT3) Regulation (All Linears) Output Drive Current (All Liners) VAUX-VDRIVE >0.6V Synchronous PWM Controller Error Amplifier DC Gain GBWP Gain-Bandwidth Product SR Slew Rate COMP=10pF PWM Controller Gate Driver IUGATE UGATE Source VCC=12V, VUGATE =6V RUGATE UGATE Sink VUGATE1-PHASE =1V ILGATE LGATE Source VCC=12V, VLGATE =1V RLGATE LGATE Sink VLGATE= 1V Copyright ANPEC Electronics Corp. Rev. P.1 - Mar., 2001 3 9 mA 10.4 V V V V V 215 kHz VP-P +1.0 % V % 8.2 2.5 0.5 1.26 185 200 1.9 -1.0 1.265 -2.5 20 +2.5 3 40 % mA 88 15 6 dB MHz V/µs 1 A 3.5 Ω A 3 Ω 1 www.anpec.com.tw APW7025 Electrical Characteristics Cont. Symbol Parameter Protection VSEN1 Over-Voltage (VSEN1/DACOUT) IOVP FAULT Souring Current IOCSET OCSET Current Source ISS Soft Start Current Power Good VSEN1 Upper Threshold (VSEN1/DACOUT) VSEN1 Under Voltage (VSEN1/DACOUT) VSEN1 Hysteresis (VSEN1 /DACOUT) VPGOOD PGOOD Voltage Low Test Conditions Min. APW7025 Typ. Max. VSEN1 Rising 115 VFAULT/RT=2.0V VOCSET= 4.5VDC 170 8.5 200 28 VSEN1 Rising VSEN1 Rising Upper /Lower Threshold Unit 120 % mA 230 µA µA 108 110 % 92 94 % 2 % IPGOOD= -4mA 0.8 V Functional Pin Description VCC (Pin 1) regulator (NVVDD) output voltage. Provide a 12V bias supply for the IC to this pin. This pin also provides the gate bias charge for all the MOSFETs controlled by the IC. The voltage at this pin is monitored for Power-On Reset (POR) purposes. SS (Pin 10) Connect a capacitor from this pin to ground. This capacitor, along with an internal 28µA current source, sets the soft-start interval of the converter. DRIVE2 (Pin 2) FAULT (Pin 11) Connect this pin to the gate of an external MOSFET. This pin provides the drive for the NVVDD regulator’s pass transistor. This pin provides oscillator switching frequency adjustment. By placing a resistor (RT) from this pin to GND, the nominal 200kHz switching frequency is increased according to the following equation: PGOOD (Pin 8) Fs =200kHz + 5 × 10 6 / RT (kΩ) (RT to GND) PGOOD is an open collector output used to indicate the status of the output voltages. This pin is pulled low when the synchronous regulator output is not within ±10% of the DACOUT reference voltage or when any of the other outputs are below their undervoltage thresholds. Conversely, connecting a resistor from this pin to VCC reduces the switching frequency according to the following equation: Fs =200kHz + 4 × 10 7 / RT (kΩ) (RT to 12V) VSEN2 (Pin 9) Nominally, the voltage at this pin is 1.26V. In the event of an over-voltage or over-current condition, this pin Connect this pin to a resistor divider to set the linear Copyright ANPEC Electronics Corp. Rev. P.1 - Mar., 2001 4 www.anpec.com.tw APW7025 Functional Pin Description Cont. is internally pulled to VCC. current trip point. An over-current trip cycles the softstart function. The voltage at this pin is monitored for power-on reset (POR) purposes and pulling this pin low with an open drain device will shutdown the IC. VAUX (Pin 13) This pin provides boost current for the linear regulator’s output drives in the event bipolar NPN transistors (instead of N-channel MOSFETs) are employed as pass elements. The voltage at this pin is monitored for power-on reset purposes. PGND (Pin 21) This is the power ground connection. Tie the synchronous PWM converter’s lower MOSFET source to this pin. GND (Pin 14) Signal ground for the IC. All voltage levels are measured with respect to this pin. LGATE (Pin 22) DRIVE3 (Pin 15) Connect LGATE to the PWM converter’s lower MOSFET gate. This pin provides the gate drive for the lower MOSFET. Connect this pin to the gate of an external MOSFET. This pin provides the drive for the FBVDDQ regulator’s pass transistor. PHASE (Pin 23) Connect this pin to a resistor divider to set the linear regulator (FBVDDQ) output voltage. Connect the PHASE pin to the PWM converter’s upper MOSFET source. This pin represents the gate drive return current path and is used to monitor the voltage drop across the upper MOSFET for over-current protection. COMP and FB (Pin 17, and 18) UGATE (Pin 24) COMP and FB are the available external pins of the PWM converter error amplifier. The FB pin is the inverting input of the error amplifier. Similarly, the COMP pin is the error amplifier output. These pins are used to compensate the voltage-mode control feedback loop of the synchronous PWM converter. Connect UGATE pin to the PWM converter’s upper MOSFET gate. This pin provides the gate drive for the upper MOSFET. VSEN3 (Pin 16) VSEN1 (Pin 19) This pin is connected to the PWM converter’s output voltage. The PGOOD and OVP comparator circuits use this signal to report output voltage status and for over- voltage protection. OCSET (Pin 20) Connect a resistor from this pin to the drain of the respective upper MOSFET. This resistor, an internal 200µA current source, and the upper MOSFET’s onresistance set the converter overCopyright ANPEC Electronics Corp. Rev. P.1 - Mar., 2001 5 www.anpec.com.tw APW7025 Typical Characteristics +5VIN +3.3VIN Q3 Linear Controller VOUT2 APW7025 Q4 VOUT3 Q1 PWM1 Controller VOUT1 Q2 Linear Controller Customer Service Anpec Electronics Corp. Head Office : 5F, No. 2 Li-Hsin Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369 Copyright ANPEC Electronics Corp. Rev. P.1 - Mar., 2001 6 www.anpec.com.tw