ANPEC APW7016KC-TU

APW7016
Advanced PWM Power Controller
Features
General Description
•
Simple Single-Loop Control Design
•
Excell Output Voltage Regulation
•
Fast Transient Response
The APW7016 provides a complete control and protection for a DC-DC converter optimized for high performance microprocessor applications. It is designed
to drive two N-Channel MOSFETs in a synchronousrectified buck topology. The APW7016 integrates
output voltage control , monitoring and protection
functions into a single Package.
The APW7016 includes a 3-bit digital-to-analog converter (DAC) that provides a easily adjustable and
precisely output voltage from 1.3VDC to 1.65VDC in
0.05V steps. Any selected output voltage can be
maintained within ±1% accuracy over temperature
and line voltage variations.
With a 200kHz free-running triangle-wave oscillator
and a error amplifier featuring a 15MHz unity-gain
bandwidth and 6V/us slew rate inside the chip ,
APW7016 can implement a simple , single feedback
loop , voltage-mode control topology with high transient performance.
The APW7016 also features with multiple protections
against over-current and over-voltage conditions by
inhibiting PWM operation. The APW7016 uses the
RDS(ON) of the upper MOSFET as the current sensing
element which eliminates the demend for an extra
component. The APW7016 also monitors the output
voltage using a comparator with hysteresis that tracks
the DAC output.
•
•
•
− Voltage-Mode PWM Control
− PWM Output : ±1% Over Temperautre
− High-Bandwidth Error Amplifier
−Full 0% to 100% Duty Ratio
3-Bit Digital-to-Analog Output Voltage Selection
Over-Voltage and Over-Current Fault Monitors
Small Converter Size
−200kHz Free-Running Oscillator
− Programmable from 50KHz to 800KHz
Applications
•
High-Power 5V to 3.xV (or below) DC-DC Regulators
•
•
Low-Voltage Distributed Power Supplies
VGA Card Power Regulation
Pin Description
VSEN
1
16
OCSET
2
15
VCC
SS
3
14
LGATE
VID0
4
13
PGND
VID1
5
12
BOOT
RT
VID2
6
11
UGATE
COMP
7
10
PHASE
FB
8
9
GND
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.2 - Oct., 2002
1
www.anpec.com.tw
APW7016
Ordering and Marking Information
APW 7016
P ackage C ode
K : S O P - 16
Tem p. R ange
C : 0 to 7 0 ° C
H a n d lin g C o d e
TU : Tube
H a n d lin g C o d e
Tem p. R ange
P ackage C ode
APM 7017
XXXXX
A P M 7 0 1 6 K /N :
N : SSO P - 16
TR : Tape & R eel
X X X X X - D a te C o d e
Block Diagram
VCC
Power on
Reset
+
VSEN
-
OVP
DETN
(Power on Reset)
115%
OCSET
SS
OC
VID0
VID1
TTL D/A
CONVERER
(DAC)
UGATE
SOFT
START
DETN
(Power on Reset)
PHASE
DAC OUT
ERRAMP
+
+
-
VID2
CP4
+
-
CP1
OC
200µA
BOOT
+
-
UGATE
FB
COMP
DETN, OC
PHASE
DRIVER
OSC
LGATE
DETN
(Power on Reset)
PGND
GND
RT
Absolute Maximum Ratings
Symbol
VCC
VBOOT –VPHASE
VI , VO
TA
TJ
TSTG
TS
Parameter
Supply Voltage
Boot Voltage
Input , Output or I/O Voltage
Operating Ambient Temperature Range
Junction Temperature Range
Storage Temperature Range
Soldering Temperature
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2002
2
Rating
15
15
GND - 0.3 V to VCC + 0.3
0 to 70
0 to 150
-65 to +150
300,10 seconds
Unit
V
V
V
°C
°C
°C
°C
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APW7016
Thermal Characteristics
Symbol
R θJA
Parameter
Value
Unit
110
°C/W
Thermal Resistance in Free Air
SOP , SSOP
2
SOP (with 3in of Copper)
86
Electrical Characteristics
Recommended operating conditions , unless otherwise noted
Symbol
Parameter
VCC Supply Current
ICC
Nominal Supply
Power-on Reset
Rising VCC Threshold
Falling VCC Threshold
Oscillator
Free Running Frequency
∆VOSC Ramp Amplitude
Reference and DAC
DAC(VID0-VID2) Input Low Voltage
DAC(VID0-VID2) Input High Voltage
DACOUT Voltage accuracy
Error Amplifier
DC Gain
GBW Gain-Bandwidth Product
SR
Slew Rate
PWM Controller Gate Driver
Test Conditions
Min.
UGATE and LGATE open
Vocset=4.5V
Vocset=4.5V
RT= Open
RT= Open
APW7016
Typ. Max.
3
mA
10.7
V
V
215
kHz
VP-P
0.8
V
V
%
8.2
185
200
2
3.0
-1.0
COMP=20pF
RUGATE
UGATE Source
VCC=12V , VUGATE =6V
RUGATE
UGATE Sink
VUGATE-PHASE =1V
RLGATE
LGATE Source
VCC=12V , VLGATE =1V
RLGATE
LGATE Sink
VLGATE =1V
350
+1.0
88
15
6
dB
MHz
V/µs
500
mA
10
Ω
mA
3.5
6.5
Ω
115
120
%
200
230
µA
5.5
350
Unit
450
Protection
Over-Voltage Trip (VSEN /DACOUT)
IOCSET
ISS
OCSET Current Source
VOCSET=4.5VDC
Soft Start Current
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2002
170
10
3
µA
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APW7016
Pin Function Description
VSEN (pin 1)
PHASE (pin 10)
Connect this pin to the converter’s voltage output.
The OVP comparator circuits monitor output voltage
status and act over voltage protection by using this
signal.
Connect the PHASE pin to the source of the upper
MOSFET. This pin is used to monitor the voltage
drop across the upper MOSFET for over-current
protection.
OCSET(pin 2)
UGATE (pin 11)
Connect a resistor(ROCSET) from this pin to the drain
of the upper MOSFET. An internal 200µA current
source (IOCS), ROCSET, and the upper MOSFET’s onresistance (RDS(ON)) set the converter over-current
(OC) trip point according to the following equation :
Connect UGATE to the upper MOSFET gate. This
pin enables the gate drive signal to drive the upper
MOSFET .
BOOT (pin 12)
IPEAK=
IOCSET * ROCSET
BOOT pin provides bias voltage to the upper
MOSFET gate driver. A bootstrap circuit could be
used to pump a BOOT voltage for enforcing the driving capability of the gate driver and improving the
performance of the upper MOSFET.
rDS(ON)
An over-current trip resets the soft-start function.
SS (Pin 3)
PGND(pin 13)
Connect a capacitor from this pin to ground. This
capacitor, along with an internal 10µA current source,
sets the soft-start interval of the converter.
PGND pin provides the power ground connection.
Connect this pin to the source of the lower MOSFET.
VID0-2 (Pins 4-6)
LGATE (pin 14)
VID0-2 are the input pins to the 3-bit DAC. The states
of these three pins decide the internal voltage reference (DACOUT). The level of DACOUT sets the converter output voltage and also sets the OVP
thresholds. Table 1 specifies DACOUT for the 8 combinations of DAC inputs.
Connect LGATE to the lower MOSFET gate. This pin
enables the gate drive signal to drive the lower
MOSFET.
VCC (pin 15)
Connect VCC to 12V voltage supply. This pin supplies the bias for the chip.
COMP (pin 7) and FB (pin 8)
COMP and FB are the accessiable pins of the error
amplifier. FB pin is the inverting input of the error
amplifier and COMP pin is output of the error amplifier.
These pins provide the compensation for the voltage-control feedback loop of the converter.
RT (pin 16)
RT pin provides oscillator switching frequency
adujstment. By connecting a resistor (RT) from this
pin to GND, the nominal 200kHz switching frequency
is increased. Conversely. connecting a pull-up resistor (RT) from this pin to VCC reduces the switching
frequency.
GND (Pin 9)
GND is signal ground of the IC. All voltage levels are
measured with respect to this pin.
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2002
4
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APW7016
Table 1 Output Voltage Program
Pin Name
VID2
VID1
VID0
Nominal Output
Voltage Dacout
1
1
1
1.3
1
1
1
0
0
1
1.35
1.4
1
0
0
1.45
0
0
1
1
1
0
1.5
1.55
0
0
1
1.6
0
0
0
1.65
Typical Performance Curve
RT(KΩ) vs. Switching frequency
10000
RT(KΩ)
1000
100
RT Pull up to 12V
10
RT Pull down to GND
1
0
100
200
300
400
500
600
700
800
900
Switching frequency
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2002
5
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APW7016
Application Schematic
C6
220PF
12V
C5
0.1uF
R1
10R
L1
1uH
5V
R4
1.2KJ
Q1
1 VSEN
2
OCSET
3 SS
4 VID0
5 VID1
C7
0.1uF
6 VID2
7 COMP
C9
2700PF
R5
150KJ
8 FB
C8
10PF
R2
5.1R
RT 16
VCC 15
C2
330uF
Q2A
APM7313
C1
10uF
L2
4.7uH
LGATE 14
PGND 13
R3
5.1R
BOOT 12
UGATE 11
Vout
Q2B
APM7313
C3
330uF
C4
330uF
PHASE 10
GND 9
APW7016
R7
3KJ
R6
0R
R8
NC
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2002
6
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APW7016
Package Information
SO – 300mil ( Reference JEDEC Registration MS-013)
D
N
H
GAUGE
PLANE
E
1 2 3
A
B
e
Millimeters
Dim
Min.
Max.
A
2.35
2.65
A1
0.10
0.30
B
0.33
0.51
D
See variations
E
7.40
e
7.60
1.27BSC
L
Variations- D
Inches
Variations- D
Variations
Min.
Max.
Dim
SO-16
10.10
10.50
A
0.093
0.1043
SO-16
0.398
0.413
SO-18
11.35
11.76
A1
0.004
0.0120
SO-18
0.447
0.463
SO-20
12.60
13
B
0.013
0.020
SO-20
0.496
0.512
SO-24
15.20
15.60
D
See variations
SO-24
0.599
0.614
SO-28
17.70
18.11
E
SO-28
0.697
0.713
SO-14
8.80
9.20
e
SO-14
0.347
0.362
Min.
Max.
Variations
Min.
Max.
0.2914
0.2992
0.050BSC
H
10
10.65
H
0.394
0.419
L
0.40
1.27
L
0.016
0.050
N
See variations
N
See variations
0°
φ1
φ1
1
A1
8°
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2002
7
0°
8°
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APW7016
Package Information
SSOP-16
D
N
H
GAUGE
PLANE
E
1 2 3
A
Millimeters
1
A1
B
e
L
Variations- D
Inches
Variations- D
Dim
Min.
Max.
Variations
Min.
Max.
Dim
Min.
Max. Variations
Min.
Max.
A
1.350
1.75
SSOP-16
4.75
5.05
A
0.053
0.069
0.187
0.199
A1
0.10
0.25
A1
0.004
0.010
B
0.20
0.30
B
0.008
0.012
D
See variations
D
See variations
E
3.75
E
0.147
e
4.05
0.625 TYP.
e
0.160
0.025 TYP.
H
5.75
6.25
H
0.226
0.246
L
0.4
1.27
L
0.016
0.050
See variations
N
See variations
N
φ1
0°
φ1
8°
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2002
8
SSOP-16
0°
8°
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APW7016
Physical Specifications
Terminal Material
Lead Solderability
Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb)
Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3.
Reflow Condition
(IR/Convection or VPR Reflow)
temperature
Reference JEDEC Standard J-STD-020A APRIL 1999
Peak temperature
183°C
Pre-heat temperature
Time
Classification Reflow Profiles
Convection or IR/
Convection
Average ramp-up rate(183°C to Peak)
3°C/second max.
120 seconds max
Preheat temperature 125 ± 25°C)
60 – 150 seconds
Temperature maintained above 183°C
Time within 5°C of actual peak temperature 10 –20 seconds
Peak temperature range
220 +5/-0°C or 235 +5/-0°C
Ramp-down rate
6 °C /second max.
6 minutes max.
Time 25°C to peak temperature
VPR
10 °C /second max.
60 seconds
215-219°C or 235 +5/-0°C
10 °C /second max.
Package Reflow Conditions
pkg. thickness ≥ 2.5mm
and all bgas
Convection 220 +5/-0 °C
VPR 215-219 °C
IR/Convection 220 +5/-0 °C
pkg. thickness < 2.5mm and
pkg. volume ≥ 350 mm³
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2002
9
pkg. thickness < 2.5mm and pkg.
volume < 350mm³
Convection 235 +5/-0 °C
VPR 235 +5/-0 °C
IR/Convection 235 +5/-0 °C
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APW7016
Reliability test program
Test item
SOLDERABILITY
HOLT
PCT
TST
ESD
Latch-Up
Method
MIL-STD-883D-2003
MIL-STD-883D-1005.7
JESD-22-B, A102
MIL-STD-883D-1011.9
MIL-STD-883D-3015.7
JESD 78
Description
245°C , 5 SEC
1000 Hrs Bias @ 125 °C
168 Hrs, 100 % RH , 121°C
-65°C ~ 150°C, 200 Cycles
VHBM > 2KV, VMM > 200V
10ms , Itr > 100mA
Carrier Tape & Reel Dimensions
D
P
Po
t
E
P1
Bo
F
W
Ko
Ao
D1
T2
J
C
A
B
T1
Application
SOP- 16
Application
SSOP-16
A
B
C
J
W
P
E
100 +2
13+ 0.5
2 ± 0.5
T1
16.4 +0.3
-0.2
T2
330 ± 1
2.5 ± 0.5
16± 0.2
12± 0.1
1.75±0.1
F
D
D1
Po
P1
Ao
Bo
Ko
t
7.5± 0.1
1.5 +0.1
1.5+ 0.25
4.0 ± 0.1
2.0 ± 0.1
3.0± 0.1
0.3±0.013
A
B
D0
D1
E
F
P0
P1
P2
6.95
5.4
1.55±0.05
1.55±0.1
1.75±0.1
5.5±0.05
4.0±0.1
8.0±0.1
2.0±0.05
T
T2
W
W1
C1
C2
T1
T2
C
0.3±0.05
2.2
12.0±0.3
9.5
13±0.3
21±0.8
13.5±0.5
2.0±0.2
80±1
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2002
10
10.9 ± 0.1 10.8± 0. 1
(mm)
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APW7016
Cover Tape Dimensions
Application
SOP- 16
Carrier Width
24
Cover Tape Width
21.3
Devices Per Reel
1000
Customer Service
Anpec Electronics Corp.
Head Office :
5F, No. 2 Li-Hsin Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
7F, No. 137, Lane 235, Pac Chiao Rd.,
Hsin Tien City, Taipei Hsien, Taiwan, R. O. C.
Tel : 886-2-89191368
Fax : 886-2-89191369
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2002
11
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