ASTEC ALQ50Y48

50 Amps
ALQ50
Total Power:
Input Voltages:
No. of Outputs:
132W
48V
Single
High Efficiency Quarter Brick
Electrical Specs
Input
Input Range
Input Surge
Efficiency
36 to 75 VDC
100V /100ms
3.3V @ 91% (typical)
Output
Line / Load
Regulation
Output Current
Noise/Ripple1
Remote sense
Transient Response
Special Features
• Industry standard Quarter Brick package
1.48" x 2.30" x 0.38"
• Openfrmae low profile construction
• High capacitive load start-up
• Regulation to zero load
• Fixed frequency switching for EMI predictability
• Industry Standard Features: Input UVLO with
hysteresis, Enable, OCP, OCP, OTP, Output
Voltage Trim, Differential Remote Sense
• Meets Basic Insulation
Overvoltage Protection
Over Current Protection
Over Temperature
Protection
Switching Frequency
Isolation Voltage
< 0.3% Vo (typical)
up to 50A max
(3.3V at 40A max)
40mVPK-PK (typical)
Up to 10% of Vo
100mV (typ) deviation
50% to 75% Load change
250µs (typ) recovery
130% typ for Vo < 3.3V
125% typ for 3.3V
120% Iout typ (autorecovery)
115C average PCB temperature
(autorecovery)
480kHz
540kHz (2.5V output)
1500Vdc
Control
Environmental
Voltage Voltage Trim
±10% VO,NOM
Enable
Postive or Negative Logic options
Operating Ambient Temperature: -40°C to +85°C
Storage Temperature: -40°C to +125°C
MTBF: > 1 million hours
Safety
UL, cUL 60950
TUV
1
EN60950
North America (USA): 1-888-41-ASTEC
Europe (UK): 44 (1384) 842-211Asia (HK): 852-2437-9662
AMERICAS
EUROPE
ASIA
5810 Van Allen Way
Carlsbad, CA 92008
Telephone: 760-930-4600
Facsimile: 760-930-0698
Astec House, Waterfront Business Park
Merry Hill, Dudley
West Midlands, DY5 1LX, UK
Telephone: 44 (1384) 842-211
Facsimile: 44 (1384) 843-355
Units 2111-2116, Level 21
Tower1, Metroplaza
223, Hing Fong Road
Fwai Fong, New Territories
Hong Kong
Telephone: 852-2437-9662
Facsimile: 852-2402-4426
Ordering Information
Input
Voltage
Output
Voltage
Output
Current
Efficiency2
Model Number
36V
36V
36V
36V
3.3V
2.5V
1.8V
1.2V
40A
50A
50A
50A
91% Typ
90% Typ
89% Typ
86% Typ
ALQ40F48 (N)
ALQ50G48(N)
ALQ50Y48 (N)
ALQ50K48 (N)
to
to
to
to
75V
75V
75V
75V
OPTIONS:
(N) : "N" = designates Negative Logic Enable (default is Positive Enable with no suffix “N” required)
Pin Assignments
Single Output
1.
2.
3.
4.
5.
6.
7.
8.
+Vin
Enable (On/Off)
-Vin
-Vout
-Sense
Trim
+Sense
+Vout
2.30
[58.4]
0.36
[9.1]
0.20 [5.0] MIN
0.24 [6.0] MAX
0.06Ø[1.5Ø] 2 PLACES
1
1.48
[37.6]
8
7
6
5
4
2
3
0.04Ø [1.0Ø] 6 PLACES
Notes:
1. 20 MHz bandwidth. External 10 uF tant. capacitor in
parallel with 1 uF ceramic capacitor placed across
the output and secondary return ground.
2. Efficiency measurements are typical values taken at
full load, nominal line and TA = 25°C.
3. All specifications are typical at nominal line, full load
and TA = 25°C unless otherwise noted.
4. All specifications subject to change without notice.
5. Mechanical drawings are for reference only.
Dimensions are in inches [millimeters]. Pin
placement tolerance ± 0.005 [0.127]. Mechanical
Tolerance ± 0.02 [0.5]. ∅ = 0.060” for Pins 4&8, the
rest are ∅ = 0.40”.
6. Technical Reference Notes should be consulted for
detailed information when available.
7. Warranty 1yr.
SIDE VIEW
PIN SIDE DOWN
PIN SIDE DOWN
2.00
[50.8]
0.15
[3.8]
0.44
0.74 [11.2]
1.04
[18.8]
[26.4]
0.44
0.59
[11.2]
[15.0]
C
L
0.74 0.89
[18.9] [22.7] 1.04
[26.5]
PIN SIDE UP
Astec reserves the right to make changes to the information
contained herein without notice and assumes no liability as a
result of its use and application. (REV 07: OCTOBER 19, 2004)
www.astecpower.com
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