@vic AV3842B / 3843B LINEAR INTEGRATED CIRCUIT HIGH PERFORMANCE CURRENT MODE CONTROLLERS DESCRIPTION The @vic AV3842B/3843B are specifically designed for Off-Line and dc-to-dc converter applications offering the designer a cost-effective solution with minimal external components. The AV3842B has UVLO thresholds 16V (on) and 10V(off), ideally suited for off-line converters. The AV3843B is tailored for lower voltage applications having UVLO thresholds of 8.5V(on) and 7.6V(off). SOP-8 FEATURES *Trimmed Oscillator for Precise Frequency Control *Oscillator Frequency Guaranteed at 250kHz *Current Mode Operation to 500kHz *Automatic Feed Forward Compensation *Latching PWM for Cycle-By-Cycle Current Limiting *Internally Trimmed Reference with Undervoltage Lockout *High Current Totem Pole Output *Undervoltage Lockout with Hysteresis *Low Startup and Operating Current DIP-8 BLOCK DIAGRAM QW-R103-012,A @vic AV3842B / 3843B LINEAR INTEGRATED CIRCUIT ABSOLUTE MAXIMUM RATINGS(Ta=25°C) PARAMETER SYMBOL VALUE UNIT Total power supply and Zener current Output current, source or sink (note1) Output energy (capacitive load per cycle) Current sense and voltage feedback inputs Error Amp. Output sink current Power dissipation and thermal characteristics Operating junction temperature Operating ambient temperature Storage temperature range (ICC + Iz) Io W Vin 30 1.0 5.0 -0.3 ~ +5.5 mA A µJ V Io PD PθJA Tj TA Tstg DIP:1250 DIP: 100 10 SOP: 702 SOP: 178 +150 0 ~ +70 -65 ~ +150 mA mW °C/W °C °C °C ELECTRICAL CHARACTERISTICS (0°C <=TA<=70°C,VCC=15V[note 2],RT=10k,CT=3.3nF,unless otherwise specified) PARAMETER Reference Section Output Voltage Line Regulation Load Regulation Temperature Stability Total Output Variation Output Noise Voltage Long Term Stability Output Short Circuit Current SYMBOL TEST CONDITIONS MIN TYP MAX UNIT VREF Regline Regload Ts Vref Vn S ISC Io=1.0mA,Tj=25°C Vcc=12V to 25V Io=1.0mA to 20mA 4.9 5.0 2.0 3.0 0.2 5.1 20 25 Line, Load, Temperature F=10kHz to 10Hz,Tj=25°C TA=125°C,1000Hrs 4.82 V mV mV mV/°C V uV mV mA -30 5.18 50 5 -85 -180 Oscillator Section Frequency Frequency Change with Voltage ∆fOSC/∆V Frequency Change with ∆fOSC/∆T Temperature Oscillator Voltage Swing(Peak to VOSC Peak) Discharge Current Idischg Tj=25°C TA=0°C to 70°C Tj=25°C (RT=6.2k,CT=1.0nF) 12<=Vcc<=25V 0°C <=TA<=70°C 49 48 225 52 250 0.2 0.5 55 56 275 1.0 1.6 kHz % % V Tj=25°C 0°C <=TA<=70°C 7.8 7.6 8.3 8.8 8.8 mA VFB IIB AVOL BW PSRR Isink Isource VOH VOL Vo=2.5V VFB=5.0V 2 <=Vo<=4V Tj=25°C I2V<=Vcc<=25V Vo=1.1V,VFB =2.7V Vo=5.0V,VFB=2.3V VFB=2.3V, RL=15k to GND VFB=2.7V, RL=15k to Vref 2.42 2.50 -0.1 90 1.0 70 12 -1.0 6.2 0.8 2.58 -2.0 1.1 V µA dB MHz dB mA mA V V Av (note 3,4) 2.85 3.0 3.15 V/V Error Amplifier Section Voltage Feedback Input Input Bias Current Open Loop Voltage Gain Unity Gain Bandwidth Power Supply Rejection Ratio Output Sink Current Output Source Current Output Voltage Swing High State Output Voltage Swing Low State 65 0.7 60 2.0 -0.5 5.0 Current Sense section Current Sense Input Voltage Gain QW-R103-012,A @vic AV3842B / 3843B LINEAR INTEGRATED CIRCUIT PARAMETER Maximum Current Sense Input Threshold Power Supply Rejection Ratio Input Bias Current Propagation Delay SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Vth (note 3) 0.9 1.0 1.1 V PSRR IIB tPLH(In/O ut) 12<=Vcc<=25V (note 3) Current Sense Input to Output 70 -2 150 -10 300 dB µA ns Isink=20mA Isink=200mA Isource=20mA Isource=200mA Vcc=6.0V,Isink=1.0mA 0.1 1.6 13.5 13.4 0.1 0.4 2.2 1.1 V V V V V 50 50 150 150 ns ns Output Section Output Low Voltage VOL Output High Level VOH Output Voltage with UVLO Activated Output Voltage Rise Time Output Voltage Fall Time VOL (UVLO) 13 12 tr tf Tj=25°C,CL=1nF Tj=25°C,CL=1nF Vth UTC UC3842B UTC UC3843B UTC3842B 14.5 7.8 8.5 16 8.4 10 17.5 9 11.5 V V V UTC3843B 7.0 7.6 8.2 V 94 96 0 % % 0.3 0.5 mA 12 36 17 mA V Under-Voltage Lockout Section Startup Threshold Min. Operating Voltage After Turn-on(Vcc) VCC(min) PWM Section Maximum Duty Cycle Minimum Duty Cycle DC(MAX) DC(MIN) Total Device Power Startup Supply Current Icc+Ic Vcc=6.5V for UC3843B Vcc=14V for UC3842B Power Operating Supply Current Icc+Ic Note2 Power Supply Zener Voltage Vz Icc=25mA Note 1:Maximum Package power dissipation limits must be observed. Note 2:Adject Vcc above the Startup threshold before setting to 15V. Note 3:This parameter is measured at the latch trip point with VFB=0V. Note 4:Comparator gain is defined as : ∆V Output Compensation AV ∆V Current Sense Input 30 QW-R103-012,A @vic AV3842B / 3843B LINEAR INTEGRATED CIRCUIT TYPICAL PERFORMANCE CHARACTERISTICS QW-R103-012,A @vic AV3842B / 3843B LINEAR INTEGRATED CIRCUIT QW-R103-012,A @vic AV3842B / 3843B LINEAR INTEGRATED CIRCUIT QW-R103-012,A