DCR DCR01 Series 01 DCR 01 SBVS013C – OCTOBER 2001 – REVISED MAY 2003 Miniature, 1W Isolated REGULATED DC/DC CONVERTERS FEATURES APPLICATIONS ● UL1950 RECOGNIZED ● ● ● ● ● DIP-18, SO-28 ● 53W/in3 (3.3W/cm3) POWER DENSITY ● DEVICE-TO-DEVICE SYNCHRONIZATION POINT-OF-USE POWER CONVERSION DIGITAL INTERFACE POWER GROUND LOOP ELIMINATION POWER-SUPPLY NOISE REDUCTION ● THERMAL PROTECTION ● 1000Vrms ISOLATION DESCRIPTION ● 400kHz SWITCHING The DCR01 family is a series of high-efficiency, inputisolated, output-regulated DC/DC converters. In addition to 1W nominal, galvanically-isolated output power capability, this range of DC/DCs offer very low output noise, thermal protection, and high accuracy. The DCR01 family is implemented in standard molded IC packaging, giving standard JEDEC outlines suitable for high-volume assembly. The DCR01 is manufactured using the same technology as standard IC packages, thereby achieving very high reliability. ● 125 FITS AT 55°C ● ±10% INPUT RANGE ● SHORT-CIRCUIT PROTECTED ● 5V, 12V, 24V INPUTS ● 3.3V, 5V OUTPUTS ● HIGH EFFICIENCY VREC SYNC ENABLE VS Input Controller LDO Regulator ERROR VOUT 0VIN 0VOUT Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright © 2000-2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. www.ti.com ELECTROSTATIC DISCHARGE SENSITIVITY ABSOLUTE MAXIMUM RATINGS Input Voltage: DCR0105 ............................................................................................ 7V DCR0112 .......................................................................................... 15V DCR0124 .......................................................................................... 29V Storage Temperature ...................................................... –60°C to +125°C Lead Temperature (soldering, 10s) ................................................. 270°C This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ORDERING INFORMATION DCR01 05 05 ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. (P) Basic Model Number: 1W Product Voltage Input: 5V In Voltage Output: 5V Out Package Code: P = 18-Pin Plastic DIP, U = 28-Pin SO PACKAGE/ORDERING INFORMATION PRODUCT DCR010503P DCR010503U DCR010505P DCR010505U DCR011203P DCR011203U DCR011205P DCR011205U DCR012403P DCR012403U DCR012405P DCR012405U 2 PACKAGE-LEAD PACKAGE DESIGNATOR DIP-18 SO-28 DIP-18 SO-28 DIP18 SO-28 DIP-18 SO-28 DIP-18 SO-28 DIP-18 SO-28 NVE DVB NVE DVB NVE DVB NVE DVB NVE DVB NVE DVB SPECIFIED TEMPERATURE RANGE –40°C –40°C –40°C –40°C –40°C –40°C –40°C –40°C –40°C –40°C –40°C –40°C to to to to to to to to to to to to +85°C +85°C +85°C +85°C +85°C +85°C +85°C +85°C +85°C +85°C +85°C +85°C PACKAGE MARKING ORDERING NUMBER DCR010503P DCR010503U DCR010505P DCR010505U DCR011203P DCR011203U DCR011205P DCR011205U DCR012403P DCR012403U DCR012405P DCR012405U DCR010503P DCR010503U/1K DCR010505P DCR010505U/1K DCR011203P DCR011203U/1K DCR011205P DCR011205U/1K DCR012403P DCR012403U/1K DCR012405P DCR012405U/1K TRANSPORT MEDIA, QUANTITY Rails, 20 Tape and Reel, Rails, 20 Tape and Reel, Rails, 20 Tape and Reel, Rails, 20 Tape and Reel, Rails, 20 Tape and Reel, Rails, 20 Tape and Reel, 1000 1000 1000 1000 1000 1000 DCR01 Series SBVS013C ELECTRICAL CHARACTERISTICS At TA = +25°C, VS = nominal, IO = 10mA, CO = 0.1µF, unless otherwise specified. DCR01 SERIES PARAMETER CONDITIONS OUTPUT Setpoint DCR010503 DCR010505 DCR011203 DCR011205 DCR012403 DCR012405 Setpoint Accuracy Maximum Output Current DCR010503P DCR010503U DCR010505P DCR010505U DCR011203P DCR011203U DCR011205P DCR011205U DCR012403P DCR012403U DCR012405P DCR012405U Output Short-Circuit Protected Line Regulation DCR010503 DCR010505 DCR011203 DCR011205 DCR012403 DCR012405 Over Line and Load DCR010503 DCR010505 DCR011203P DCR011203U DCR011205 DCR012403P DCR012403U DCR012405 Versus Temperature Ripple and Noise MIN TYP 3.3 5 3.3 5 3.3 5 0.5 MAX UNITS 2.0 V V V V V V % 300 300 200 200 390 300 200 200 390 300 200 200 Duration mA mA mA mA mA mA mA mA mA mA mA mA Infinite 1 1 1 1 1 1 10mA to 300mA Load, 4.5V to 10mA to 200mA Load, 4.5V to 10mA to 390mA Load, 10.8V to 10mA to 300mA Load, 10.8V to 10mA to 200mA Load, 10.8V to 10mA to 390mA Load, 21.6V to 10mA to 300mA Load, 21.6V to 10mA to 200mA Load, 21.6V to –40°C to +85°C 5.5V Line 5.5V Line 13.2V Line 13.2V Line 13.2V Line 26.4V Line 26.4V Line 26.4V Line 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 mV/V mV/V mV/V mV/V mV/V mV/V 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 % % % % % % % % % DCR010503P DCR010503P DCR010503U DCR010503U Ripple Noise Ripple Noise 20MHz Bandwidth, 50% Load(1) 100MHz Bandwidth, 50% Load(1) 20MHz Bandwidth, 50% Load(1) 100MHz Bandwidth, 50% Load(1) 5 35 8 23 mVp-p mVp-p mVp-p mVp-p DCR010505P DCR010505P DCR010505U DCR010505U Ripple Noise Ripple Noise 20MHz Bandwidth, 50% Load(1) 100MHz Bandwidth, 50% Load(1) 20MHz Bandwidth, 50% Load(1) 100MHz Bandwidth, 50% Load(1) 6 20 9 20 mVp-p mVp-p mVp-p mVp-p DCR011203P DCR011203P DCR011203U DCR011203U Ripple Noise Ripple Noise 20MHz Bandwidth, 50% Load(1) 100MHz Bandwidth, 50% Load(1) 20MHz Bandwidth, 50% Load(1) 100MHz Bandwidth, 50% Load(1) 10 54 8 22 mVp-p mVp-p mVp-p mVp-p DCR011205P DCR011205P DCR011205U DCR011205U Ripple Noise Ripple Noise 20MHz Bandwidth, 50% Load(1) 100MHz Bandwidth, 50% Load(1) 20MHz Bandwidth, 50% Load(1) 100MHz Bandwidth, 50% Load(1) 6 45 6 21 mVp-p mVp-p mVp-p mVp-p DCR012403P DCR012403P DCR012403U DCR012403U Ripple Noise Ripple Noise 20MHz Bandwidth, 50% Load(1) 100MHz Bandwidth, 50% Load(1) 20MHz Bandwidth, 50% Load(1) 100MHz Bandwidth, 50% Load(1) 10 22 8 22 mVp-p mVp-p mVp-p mVp-p DCR012405P DCR012405P DCR012405U DCR012405U Ripple Noise Ripple Noise 20MHz Bandwidth, 50% Load(1) 100MHz Bandwidth, 50% Load(1) 20MHz Bandwidth, 50% Load(1) 100MHz Bandwidth, 50% Load(1) 10 22 13 32 mVp-p mVp-p mVp-p mVp-p DCR0105xx DCR0112xx DCR0124xx 5 12 24 V V V % INPUT Nominal Voltage (VS) Voltage Range DCR01 Series SBVS013C –10 +10 3 ELECTRICAL CHARACTERISTICS (Cont.) At TA = +25°C, VS = nominal, IO = 10mA, CO = 0.1µF, unless otherwise specified. DCR01 SERIES PARAMETER Supply Current DCR010503P DCR010503U DCR010505P DCR010505U DCR011203P DCR011203U DCR011205P DCR011205U DCR012403P DCR012403U DCR012405P DCR012405U Reflected Ripple Current ISOLATION Voltage CONDITIONS MIN ERROR FLAG Logic High Open Collector Leakage Logic Low Output Voltage MAX UNITS IO = 0mA IO = 10mA IO = 300mA IO = 0mA IO = 10mA IO = 300mA 18 28 335 24 33 339 mA mA mA mA mA mA IO = 0mA IO = 10mA IO = 200mA IO = 0mA IO = 10mA IO = 200mA 25 40 306 25 40 306 mA mA mA mA mA mA IO = 0mA IO = 10mA IO = 390mA IO = 0mA IO = 10mA IO = 390mA 13 17 173 13 17 136 mA mA mA mA mA mA IO = 0mA IO = 10mA IO = 200mA IO = 0mA IO = 10mA IO = 200mA 13 18 125 14 19 123 mA mA mA mA mA mA IO = 0mA IO = 10mA IO = 390mA IO = 0mA IO = 10mA IO = 390mA 17 18 97 15 17 75 mA mA mA mA mA mA IO = 0mA IO = 10mA IO = 200mA IO = 0mA IO = 10mA IO = 200mA 20MHz Bandwidth, 100% Load CIN = 2.2µF, CFILTER = 1µF 15 18 69 15 18 67 8 mA mA mA mA mA mA mAp-p 25 kVrms kVrms pF 1s Flash Test 60s Test, UL1950(2) 1 1 Input/Output Capacitance OUTPUT ENABLE CONTROL Logic High Input Voltage Logic High Input Current Logic Low Input Voltage Logic Low Input Current VREC VREC TYP 2.0 2.0 < VENABLE < VREC VREC 100 –0.2 0 < VENABLE < 0.5 All 3.3V Outputs All 5V Outputs 0.5 100 3.3 5 VERROR = 5V Sinking 2mA 10 0.4 THERMAL SHUTDOWN Junction Temperature Temperature Activated Temperature Deactivated 720 720 2.5 0 TEMPERATURE RANGE Operating –40 800 2.5 µA V °C °C 150 130 SYNCHRONIZATION PIN Max External Capacitance on SYNC Pin Internal Oscillator Frequency External Synchronization Frequency External Synchronization Signal High External Synchronization Signal Low V nA V nA V V 3 880 880 5.0 0.4 pF kHz kHz V V +85 °C NOTES: (1) CIN = 2.2µF, CFILTER = 1µF, COUT = 0.1µF. (2) During UL approval only. 4 DCR01 Series SBVS013C PIN CONFIGURATIONS Top View SO DIP VS 1 18 SYNC VS 1 28 SYNC NC 2 17 0VIN VS 2 27 0VIN NC 3 26 0VIN DCR01 DCR01U VREC 7 12 ERROR VREC 12 17 ERROR 0VOUT 8 11 ENABLE 0VOUT 13 16 ENABLE VO 9 10 DNC PIN DEFINITION (DIP) PIN DEFINITION (SO) PIN # PIN NAME PIN # PIN NAME 1 VS Voltage Input 1 VS 2 NC No Connection 2 VS Voltage Input 7 VREC Rectified Output 3 NC No Connection 8 0VOUT Output Ground 12 VREC Rectified Output 9 VO Voltage Output 13 VOUT Output Ground 10 DNC Do Not Connect 14 VO Voltage Output 11 ENABLE Output Voltage Enable 15 DNC Do Not Connect 12 ERROR 17 0VIN 18 SYNC DCR01 Series SBVS013C DESCRIPTION 15 DNC VO 14 Error Flag Active Low 16 ENABLE Input Ground 17 ERROR Synchronization Input 26 0VIN 27 0VIN 28 SYNC DESCRIPTION Voltage Input Output Voltage Enable Error Flag Active Low Input Ground Input Ground Synchronization Input 5 TYPICAL CHARACTERISTICS At TA = +25°C, VS = 5V, IO = 10mA, CFILTER = 1µF, CO = 0.1µF, unless otherwise specified. DCR0105 OUTPUT NOISE (100MHz Bandwidth) 18 80 16 70 14 60 12 Noise (mVp-p) Ripple Voltage (mVp-p) OUTPUT VOLTAGE RIPPLE (all “U”, all 5V Output “P” Devices, and DCR010503P) 10 8 6 40 30 20 4 10 2 0 0 0 20 40 60 80 0 100 20 40 60 80 Load (%) Load (%) DCR011203P AND DCR012403P OUTPUT VOLTAGE RIPPLE 3V OUTPUT EFFICIENCY (5V and 12V Input Devices) 30.0 70 25.0 60 100 85°C 50 20.0 Efficiency (%) Ripple Voltage (mVp-p) 50 15.0 10.0 –40°C 40 25°C 30 20 5.0 10 0 0 0 20 40 60 80 100 0 10 20 30 40 50 60 70 Load (%) Load (%) DCR012403P AND U OUTPUT EFFICIENCY 5V OUTPUT EFFICIENCY (5V and 12V Input Devices. 80 90 100 80 90 100 80 60 +85°C 70 50 +25°C 40 Effeciency (%) Efficiency (%) 60 30 20 50 40 –40°C 30 20 10 10 0 0 0 10 20 30 40 50 Load% 6 60 70 80 90 100 0 10 20 30 40 50 60 70 Load (%) DCR01 Series SBVS013C TYPICAL CHARACTERISTICS (Cont.) At TA = +25°C, VS = 5V, IO = 10mA, CFILTER = 1µF, CO = 0.1µF, unless otherwise specified. EFFICIENCY vs LOAD DCR0112405 “P” and “U” DEVICES 70 70 60 60 50 50 Efficiency (%) Efficiency (%) EFFICIENCY FOR 5V AND 12V INPUT “U” DEVICES, 5V OUTPUT 40 30 30 20 20 10 10 0 0 0 10 20 30 40 50 60 70 80 90 100 0 10 20 30 40 50 60 70 80 Load (%) Load (%) DCR011203P OUTPUT NOISE (100MHz Bandwidth) DCR011205P OUTPUT NOISE (100MHz Bandwidth) 120.0 60.0 100.0 50.0 80.0 40.0 Noise (mVp-p) Noise (mVp-p) 40 60.0 40.0 90 100 30.0 20.0 10.0 20.0 0 0 0 20 40 60 80 40% 20% 0% 100 80% 60% Load (%) Load% DCR010503P VOUT vs LOAD 3V OUTPUT vs LOAD (all devices except DCR010503P) 3.305 100% 3.325 85°C 3.3 3.325 3.305 3.29 VOUT (V) VOUT (V) 3.295 3.285 25°C 3.28 3.295 3.285 3.275 3.275 3.27 –40°C 3.265 3.265 0 10 20 30 40 50 Load (%) DCR01 Series SBVS013C 60 70 80 90 100 0 10 20 30 40 50 60 70 80 90 100 Load (%) 7 TYPICAL CHARACTERISTICS (Cont.) At TA = +25°C, VS = 5V, IO = 10mA, CFILTER = 1µF, CO = 0.1µF, unless otherwise specified. DCR0105 SERIES INPUT CURRENT REFLECTED NOISE (100MHz Bandwidth) LOAD vs VOUT (for all 5V Output Devices) 5.04 5.02 40mA/div VOUT (V) 5.00 4.98 4.96 4.94 4.94 0 10 20 30 40 50 60 70 80 90 100 500ns/div Load (%) DCR01 SERIES INPUT CURRENT REFLECTED RIPPLE 30mA Changing to 325mA 20mA/div 200mV/div 500ns/div 10µs/div DCR010503P LOAD TRANSIENT RESPONSE DCR010503P OUTPUT VOLTAGE NOISE AT 100% LOAD (100MHz Bandwidth) Load Current Load Current 20mV/div 200mV/div 150mA Changing to 300mA Load Current Output Voltage Output Voltage 10µs/div 8 DCR010503P LOAD TRANSIENT RESPONSE Output Voltage 200ns/div DCR01 Series SBVS013C TYPICAL CHARACTERISTICS (Cont.) At TA = +25°C, VS = 5V, IO = 10mA, CFILTER = 1µF, CO = 0.1µF, unless otherwise specified. DCR010503P OUTPUT VOLTAGE RIPPLE AT 100% LOAD (20MHz Bandwidth) 200mV/div 5mV/div 20mA Changing to 200mA DCR010505P LOAD TRANSIENT RESPONSE Load Current Output Voltage 200ns/div 10µs/div DCR010505P LOAD TRANSIENT RESPONSE DCR010505P OUTPUT VOLTAGE NOISE AT 100% LOAD (100MHz Bandwidth) 200mV/div 20mV/div 100mA Changing to 200mA Load Current Output Voltage 10µs/div 200ns/div 5mV/div DCR010505P OUTPUT VOLTAGE RIPPLE AT 100% LOAD (20MHz Bandwidth) 200ns/div DCR01 Series SBVS013C 9 FUNCTIONAL DESCRIPTION If devices are synchronized, it should be noted that all devices will draw maximum current simultaneously at start up. This can cause the input voltage to dip. Should it fall below the minimum input voltage, the devices may not start up. A 2.2µF capacitor (low ESR) should be connected as close to the device input pins as possible for the 5V input devices, and a 0.47µF capacitor for the 12V and 24V devices. If more than eight devices are required to be synchronized, it is recommended that external synchronization be used. Details are contained in Texas Instruments Application Report literature number SBAA035 (AB-153) available at www.ti.com. OVERVIEW The DCR01 series offers isolation from an unregulated power supply operating from a choice of input voltages. The DCR01s provide a variety of regulated output voltages at a nominal output power of 1W or above. POWER STAGE The input supply is chopped at a frequency of 400kHz (internal oscillator divided by 2), which is used to drive the center-tapped toroidal transformer. CONSTRUCTION The DCR01 is manufactured using the same technology as standard IC packages. There is no substrate within the package. The DCR01 is constructed using a driver IC, lowdropout voltage regulator, rectifier diodes, and a wound magnetic toroid, all mounted on a leadframe. The DCR01 requires no special PCB assembly processing, as there is no solder within the package. The result is an isolated DC/DC converter with inherently high reliability. RECTIFICATION The transformer’s output is full wave rectified and smoothed by the external capacitor connected to VREC. REGULATOR The internal low drop-out regulator provides a well-regulated output voltage, throughout the operating range of the device. ADDITIONAL FUNCTIONS OSCILLATOR AND WATCHDOG The DCR01 uses an internal saw-tooth generator to provide the 800kHz on-board oscillator that is used to drive the power switching circuit. The operation of the oscillator is monitored by the watchdog, which will tri-state the output driver circuit if the oscillator fails, or if the SYNC pin is taken LOW, (shutdown mode). When the SYNC pin is returned HIGH, normal operation resumes. DISABLE/ENABLE The DCR01 can be disabled or enabled by driving the SYNC pin using an open drain CMOS gate. If the SYNC pin is pulled LOW, the DCR01 will be disabled. The disable time depends upon the external loading. The internal disable function is implemented in 2µs. Removal of the pull down will enable the DCR01. Capacitance loading on the SYNC pin should be minimized in order to prevent a reduction in the internal oscillator‘s frequency. See Application Report (SBAA035) “External Synchronization of the DCP01/02 Series of DC/DC Converters”. This document contains information on how to null the effects of additional capacitance on the SYNC pin. The oscillator’s frequency can be measured at VREC, as this is the fundamental frequency of the ripple component. SYNCHRONIZATION If more than one DCR01 is being used, beat frequencies and other electrical interference can be generated. This is due to the small variations in switching frequencies between the converters. The DCR01 overcomes this by allowing devices to be synchronized to one another. Up to eight devices can be synchronized by connecting the SYNC pins together, with care being taken to minimize the capacitance of tracking. Significant stray capacitance on the SYNC pin will have the effect of reducing the frequency of the internal oscillator. If this is large, the DCR01 may be taken outside its optimized operating parameters, and saturation of the magnetics may result, damaging the device. OUTPUT ENABLE/DISABLE The regulated output of the DCR01 can be disabled by pulling the ENABLE pin LOW (connect ENABLE to 0VOUT). Holding the ENABLE pin HIGH (connect ENABLE to VREC) enables the regulated output voltage, thus allowing the output to be controlled from the isolated side, see Figure 1. U1 VIN VS VO1 VOUT RERR = 10kΩ CIN DCR SYNC 0V 01 ERROR VREC ERROR REN = 10kΩ ENABLE 0V SW1 see text CFILTER = 1µF COUT = 0.1µF 0VOUT NOTE: (1) 2.2µF capacitor with low ESR for 5V devices and 0.47µF for 12V and 24V devices. FIGURE 1. DCR01 with a Single Output. 10 DCR01 Series SBVS013C APPLICATION NOTES ERROR FLAG The DCR01 has an ERROR pin which provides a “power good” flag, as long as the internal regulator is in regulation. DCR01 SINGLE VOLTAGE OUTPUT The DCR01 can be used to provide a single voltage output by connecting, see Figure 1. The ERROR output signal will be pulled up to the value of VOUT for the particular DCR01 being used. The value of RERR will depend on the loading on the ERROR line however, the total load on the ERROR line must not exceed the value given in the specification. The output may be permanently enabled by connecting the ENABLE pin to the VREC pin. The DCR01 may be enabled remotely by connecting the ENABLE pin to VREC via a pullup resistor (REN ), the value of this resistor is not critical for the DCR01 as only a small current flows. The switch SW1 can be used to pull the ENABLE pin LOW, thus disabling the output. The switching devices can be a bipolar transistor, FET or a mechanical device, the main load that it will see is REN. DECOUPLING Ripple Reduction Due to the very low forward resistance of the DMOS switching transistors, high current demands are placed upon the input supply for a short time. By using a good quality low Equivalent Series Resistance (ESR) capacitor of 2.2µF (minimum) for the 5V input devices and a 0.47µF capacitor for the 12V and 24V devices, placed close to the IC supply input pins, the effects on the power supply can be minimized. The high switching frequency of 400kHz allows relatively small values of capacitors to be used for filtering the rectified output voltage. A good quality low ESR capacitor of 1µF placed close to the VREC pin and output ground will reduce the ripple. It is not recommended that the DCR01 be fitted using an IC socket as this will degrade performance. The output at VREC is full wave rectified and produces a ripple of 800kHz. It is recommended that a 0.1µF low ESR capacitor is connected close to the output pin and ground to reduce noise on the output. The capacitor values listed are minimum values. If lower ripple is required then the filter capacitor should be increased in value to 2.2µF. NOTE: As with all switching power supplies the best performance is only obtained with low ESR capacitors connected close to the switcher. If low ESR capacitors are not used, the ESR will generate a voltage drop when the capacitor is supplying the load power. Often a larger capacitor is chosen for this purpose when a low ESR smaller capacitance would perform as well. GENERATING TWO POSITIVE OUTPUT VOLTAGES Two DCR01s can be used to create output voltages of +3.3V and +5V, as shown in Figure 2. The two DCR01s are connected in self-synchronization, thus locking the oscillators of both devices to a single frequency. The ERROR and ENABLE facilities may be used in a similar configuration for a single DCR01. The filter capacitors connected to the VREC pins (CFILTER), should be kept separate from each other and connected in close proximity to their respective DCR01. If similar output voltages are being used, it is not recommended that a single filter capacitor (with an increased capacitance) be used with both VREC pins connected together, as this could result is the overloading of one of the devices. U1 VIN VS VO1 VOUT RERR = 10kΩ ERROR CIN(1) DCR 01 ERROR VREC COUT = 0.1µF ENABLE SYNC 0V 0V CFILTER = 1µF 0VOUT U2 VIN VS VO2 VOUT RERR = 10kΩ ERROR CIN(1) DCR 01 SYNC 0V ERROR VREC COUT = 0.1µF ENABLE 0V CFILTER = 1µF NOTE: (1) 2.2µF capacitor with low ESR for 5V devices and 0.47µF for 12V and 24V devices. FIGURE 2. Generating Two Positive Voltages from Self-Synchronized DCR01s. DCR01 Series SBVS013C 11 If the SYNC pin is being used, the tracking between device SYNC pins should be short to avoid stray capacitance. If the SYNC pin is not being used it is advisable to place a guard ring (connected to input ground) around this pin to avoid any noise pick up. The output should be taken from the device using ground and power planes. This will ensure minimum losses. A good quality low ESR capacitor placed as close as practicable across the input will reduce reflected ripple and ensure a smooth start up. A good quality low ESR capacitor placed as close as practicable across the rectifier output terminal and output ground will give the best ripple and noise performance. GENERATION OF DUAL POLARITY VOLTAGES FROM TWO SELF-SYNCHRONIZED DCR01s Two DCR01s can be configured to produce a dual polarity supply (i.e., ±5V); the circuit must be connected as shown in Figure 3. It must be observed that both devices are producing a positive regulated output, therefore the ERROR, ENABLE, and VREC are all relative to that particular devices 0V and must not be directly connected together, or in the case of the negative output device connected to the common 0V output. PCB LAYOUT RIPPLE AND NOISE Careful consideration should be given to the layout of the PCB in order for the best results to be obtained. The DCR01 is a switching power supply and as such can place high peak current demands on the input supply. In order to avoid the supply falling momentarily during the fast switching pulses, ground and power planes should be used to track the power to the input of DCR01 (this will also serve to reduce noise on the circuit). If this is not possible, the supplies must be connected in a star formation, with the tracks made as wide as possible. THERMAL MANAGEMENT Due to the high power density of this device, it is advisable to provide a ground plane on the output. The output regulator is mounted on a copper leadframe, and a ground plane will serve as an efficient heatsink. U1 VIN VS VPOS O/P VOUT ERROR DCR CIN(1) 01 VREC COUT = 0.1µF ENABLE SYNC 0V 0V CFILTER = 1µF 0V U2 VIN VS VOUT ERROR DCR CIN(1) 01 SYNC 0V VREC COUT = 0.1µF ENABLE VNEG O/P 0V CFILTER = 1µF NOTE: (1) 2.2µF capacitor with low ESR for 5V devices and 0.47µF for 12V and 24V devices. FIGURE 3. Dual Polarity Voltage Generation from Two Self-Synchronized DCR01’s. 12 DCR01 Series SBVS013C PACKAGE DRAWINGS MPDI055 – APRIL 2001 NVE (R-PDIP-T10/18) PLASTIC DUAL-IN-LINE 0.920 (23,37) 0.880 (22,35) D 18 10 0.280 (7,11) 0.240 (6,10) D 1 9 Index Area E 0.070 (1,78) 0.045 (1,14) 0.195 (4,95) 0.115 (2,92) Base Plane –C– Seating Plane 0.325 (8,26) 0.300 (7,62) 0.210 (5,33) MAX E 0.005 (0,13) MIN 4 PL Full Lead D 0.100 (2,54) 0.022 (0,56) 0.014 (0,36) 0.010 (0,25) M C 0.150 (3,81) 0.115 (2,92) 0.300 (7,63) 0.014 (0,36) 0.008 (0,20) 0.015 (0,38) MIN 0.060 (1,52) 0.000 (0,00) 0.430 (10,92) MAX F F 4202497/A 03/01 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001-AC with the exception of lead count. D. Dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 (0,25). E. Dimensions measured with the leads constrained to be perpendicular to Datum C. F. Dimensions are measured at the lead tips with the leads unconstrained. G. A visual index feature must be located within the cross-hatched area. DCR01 Series SBVS013C 13 PACKAGE DRAWINGS (Cont.) MPDS106 – AUGUST 2001 DVB(R-PDSO-G12/28) PLASTIC SMALL-OUTLINE C A 18,10 17,70 11,20 10,82 28 0,25 M B M 15 B 7,60 7,40 10,65 10,01 D Index Area 1 1 4 2,65 2,35 C 0,75 0,25 x 45° Seating Plane 1,27 G 0,51 0,33 0,30 0,10 0,10 0,32 0,23 0,25 M C A M B S 0°–8° F 1,27 0,40 4202104/A 08/01 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body length dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, and gate burrs shall not exceed 0,15 mm per side. D. Body width dimension does not include inter-lead flash or portrusions. Inter-lead flash and protrusions shall not exceed 0,25 mm per side. E. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the cross-hatched area. G. Lead width, as measured 0,36 mm or greater above the seating plane, shall not exceed a maximum value of 0,61 mm. H. Lead-to-lead coplanarity shall be less than 0,10 mm from seating plane. I. Falls within JEDEC MS-013-AE with the exception of the number of leads. F. Lead dimension is the length of terminal for soldering to a substrate. 14 DCR01 Series SBVS013C PACKAGE OPTION ADDENDUM www.ti.com 3-Oct-2003 PACKAGING INFORMATION ORDERABLE DEVICE STATUS(1) PACKAGE TYPE PACKAGE DRAWING PINS PACKAGE QTY DCR010503P ACTIVE PDIP NVE 10 20 DCR010503U ACTIVE SOP DVB 12 28 DCR010503U/1K ACTIVE SOP DVB 12 1000 DCR010505P ACTIVE PDIP NVE 10 20 DCR010505U ACTIVE SOP DVB 12 28 DCR010505U/1K ACTIVE SOP DVB 12 1000 DCR011203P ACTIVE PDIP NVE 10 20 DCR011203U ACTIVE SOP DVB 12 28 DCR011203U/1K ACTIVE SOP DVB 12 1000 DCR011205P ACTIVE PDIP NVE 10 20 DCR011205U ACTIVE SOP DVB 12 28 DCR011205U/1K ACTIVE SOP DVB 12 1000 DCR012403P ACTIVE PDIP NVE 10 20 DCR012403U ACTIVE SOP DVB 12 28 DCR012403U/1K ACTIVE SOP DVB 12 1000 DCR012405P ACTIVE PDIP NVE 10 20 DCR012405U ACTIVE SOP DVB 12 28 DCR012405U/1K ACTIVE SOP DVB 12 1000 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. MECHANICAL DATA MPDI055 – APRIL 2001 NVE (R-PDIP-T10/18) PLASTIC DUAL-IN-LINE 0.920 (23,37) 0.880 (22,35) D 18 10 0.280 (7,11) 0.240 (6,10) D 1 9 Index Area E 0.070 (1,78) 0.045 (1,14) 0.195 (4,95) 0.115 (2,92) Base Plane –C– Seating Plane 0.325 (8,26) 0.300 (7,62) 0.210 (5,33) MAX E 0.005 (0,13) MIN 4 PL Full Lead D 0.100 (2,54) 0.022 (0,56) 0.014 (0,36) 0.010 (0,25) M C 0.150 (3,81) 0.115 (2,92) 0.300 (7,63) 0.014 (0,36) 0.008 (0,20) 0.015 (0,38) MIN 0.060 (1,52) 0.000 (0,00) 0.430 (10,92) MAX F F 4202497/A 03/01 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001-AC with the exception of lead count. D. Dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 (0,25). E. Dimensions measured with the leads constrained to be perpendicular to Datum C. F. Dimensions are measured at the lead tips with the leads unconstrained. G. A visual index feature must be located within the cross-hatched area. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 MECHANICAL DATA MPDS106A – AUGUST 2001 – REVISED NOVEMBER 2001 DVB(R-PDSO-G12/28) –A– 28 PLASTIC SMALL-OUTLINE 18,10 17,70 11,20 10,82 C 0°–8° 15 1,27 0,40 F 7,60 7,40 –B– D 10,65 10,01 0,25 M B M Index Area 1 14 0,30 0,10 2,65 2,35 0,75 0,25 x 45° Base Plane –C– Seating Plane 1,27 G 0,32 0,23 0,51 0,33 0,10 0,25 M C A M B S 4202104/B 11/01 G. Lead width, as measured 0,36 mm or greater above the seating plane, shall not exceed a maximum value of 0,61 mm. H. Lead-to-lead coplanarity shall be less than 0,10 mm from seating plane. I. Falls within JEDEC MS-013-AE with the exception of the number of leads. NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body length dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, and gate burrs shall not exceed 0,15 mm per side. D. Body width dimension does not include inter-lead flash or portrusions. Inter-lead flash and protrusions shall not exceed 0,25 mm per side. E. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the cross-hatched area. F. Lead dimension is the length of terminal for soldering to a substrate. • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443 • 1 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. 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