ETC ASC7511M8

aSC7511
LOW-VOLTAGE 2-WIRE DIGITAL TEMPERATURE SENSOR
WITH THERMAL ALARM
PRODUCT SPECIFICATION
Fully Released Specification
Product Description
Pin Configuration
The aSC7511 is a high-precision CMOS temperature
sensor with SMBus compatible serial digital interface,
intended for use in PC thermal management applications.
The aSC7511 can measure temperature of a remote
thermal diode to an accuracy of ±1°C. Internal temperature
can be measured to ±3°C.
SOP-8 and MSOP-8
VDD
1
8
SCL
Communication of configuration, temperature and alarm
status takes place over the PC standard System
Management Bus (SMBus).
D+
2
7
SDA
The aSC7511 features thermal alarm functions with a user-
D-
3
programmable trip and turn-off temperatures. The THERM
output comparator can be set to control a fan while
THERM
aSC7511
6
ALERT /
THERM2
4
5
GND
ALERT signals that the remote or local temperature is
outside of a range of temperatures. ALERT pin may be
optionally configured as a second
THERM
output,
THERM2 , controlling a second fan.
The aSC7511 is available in SOP-8 and MSOP-8 surface
mount packages.
Application Diagram
Features
•
•
•
•
•
•
•
•
•
Local and remote temperature sensors
0.25°C resolution, ±1°C accuracy on remote diode
1°C resolution, ±3°C accuracy on local sensor
Extended temperature measurement range 0°C to
+127°C (default) or –55°C to +150°C
2-wire SMBus serial interface with SMBus alert
Programmable over / under temperature limits
Offset registers for system calibration
One or two over-temperature fail-safe THERM
outputs
8-lead, Pb-free, SOIC (SOP) or MSOP package
3.3V
1
2
3
CPU
aSC7511
SMBus
Interface
SDA
SCL
4
THERM
7
8
6
ALERT /
THERM2
Applications
Desktop Computers – Motherboards and Graphics Cards
Laptop Computers
Ordering Information
Part Number
Package
Temperature Range
and Operating Voltage
Marking
How Supplied
aSC7511D8
8-Lead SOP
-40°C to +125°C, 3.3V
aSC7511
Ayww
2500 units Tape & Reel
aSC7511M8
8-Lead MSOP
-40°C to +125°C, 3.3V
7511
Ayww
2500 units Tape & Reel
Ayww – Assembly site, year, workweek
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aSC7511
Absolute Maximum Ratings1
Parameter
Rating
Supply Voltage, VD D , 3.3V nom.
-0.3, +3.6V
Output Voltage
VD D + 0.5V
Notes:
-0.3V to VD D +
0.5V
D+
D- to GND
-0.3V to 0.6V
SDA, SCL, ALERT , THERM
-0.3V to 5.5V
I/O Current, SCL, SDA,
-1mA
ALERT , THERM
Input Current, D-
±1mA
Continuous Current,
any other terminal
10mA
Storage Temperature Range
-60°C to +150°C
IR Reflow Peak Temperature
260°C
Lead Soldering
Temperature (10 sec.)
300°C
ESD2
Human Body Model
> 2000 V
Machine Model
> 250 V
Charged Device Model
> 2000 V
1. Absolute maximum ratings are limits beyond which
operation may cause permanent damage to the device.
These are stress ratings only; functional operation at or
above these limits is not implied.
2. Human Body Model: 100pF capacitor discharged through
a 1.5kΩ resistor into each pin. Machine Model: 200pF
capacitor discharged directly into each pin. Charged
Device Model is per JESD22-C101C.
3. These specifications are guaranteed only for the test
conditions listed.
4. Accuracy (expressed in °C) = Difference between the
aSC7511 reported output temperature and the
temperature being measured.
5. Guaranteed by characterization but not production tested.
6. The accuracy of the aSC7511 is guaranteed when using
the thermal diode of a processor or any thermal diode with
a non-ideality of 1.008 and internal series resistance of
3.52Ω. When using a 2N3904 type transistor as a thermal
diode the error band will be typically shifted depending on
transistor characteristics.
7. The aSC7511 can be read at any time without interrupting
the temperature conversion process.
Electrical Characteristics3
(-40°C ≤ T A ≤ +125°C, V D D = 3 . 3 V unless otherwise noted. Specifications subject to change without notice)
Parameter
Conditions
Supply Voltage
VDD
3.0
Local Sensor Accuracy4
IDD
Typ
Max
3.3
3.6
V
215
µA
6
10
µA
Standby Mode, +85°C ≤ T A ≤ +120°C
6
20
µA
-40°C ≤ T A ≤ +100°C, 3V≤ V D D ≤ 3.6V
±1
±3
°C
Standby Mode, -40°C ≤ T A < +85°C
Local Sensor Resolution
1
4,5,6
Remote Sensor Accuracy
Units
170
0.0625 Conversions-per-second rate
Operating Supply Current
Min
+60°C ≤ T A ≤ +100°C,
-55°C≤TD ≤+150°C, 3V≤VDD≤3.6V
±1
-40°C ≤ T A ≤ +120°C,
-55°C≤TD ≤+150°C, 3V≤VDD≤3.6V
Remote Sensor Resolution
°C
±2
°C
±3
°C
0.25
°C
Temperature Conversion Time7
From Stop Bit to Conversion
Complete, One-Shot Mode, 2
Sensors, Averaging On
115
ms
Temperature Conversion Time7
One-Shot Mode, Averaging Off
30
ms
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aSC7511
Logic Electrical Characteristics
(TA = 25 °C, VDD = 3.3V unless otherwise noted)
Parameter
Symbol
Conditions
Min
Input Voltage Logic High
VIH
3V≤ V D D ≤ 3.6V
2.1
Input Voltage Logic Low
VIL
3V≤ V D D ≤ 3.6V
0.8
V
VOL
VDD=3.6V, IOL= -6mA
0.4
V
IOL
ALERT or THERM
forced to 0.4V
IIN
VIN = 0V or 5.5V,
-40°C ≤ T A ≤ +125°C
SMBus Output Sink Current
IOL
TA = 25 °C, VOL = 0.6V
SMBus Logic Input Current
IIH, IIL
Output Voltage Logic Low
( ALERT and THERM )
Output Low Sink Current
( ALERT and THERM )
Input Leakage Current
Output Leakage Current
Max
Units
V
1
mA
±1.0
µA
6
mA
-1
0.1
+1
µA
1
µA
IOH
VOH = VDD = 3.6V
tF
CL= 400pF, IOL = -3mA
250
ns
CIN
All Digital Inputs
5
pF
Output Transition Time
Input Capacitance
Typ
Serial Port Timing
(TA = 25 °C, VDD = 3.3V unless otherwise noted, Guaranteed by design, not production tested)
Parameter
Symbol
Min
Typ
Max
Units
SCL Operating Frequency
fSCL
400
kHz
SCL Clock Transition Time
tT:LH , tT:HL
300
ns
μs
SCL Clock Low Period
tLOW
1.3
SCL Clock High Period
tHIGH
0.6
Bus free time between a Stop and a new Start Condition
tBUF
1.3
μs
Data in Set-Up to SCL High
tSU:DAT
100
ns
Data Out Stable after SCL Low
tHD:DAT
300
ns
SCL Low Set-up to SDA Low (Repeated Start Condition)
tSU:STA
600
ns
SCL High Hold after SDA Low (Start Condition)
tHD:STA
600
ns
SDA High after SCL High (Stop Condition)
tSU:STO
600
Time in which aSC7511 must be operational after a power-on reset
tPOR
SCL
tHD:STA
tBUF
tSU:DAT
tLOW
tHIGH
μs
ns
500
ms
tSU:STA
tSU:STO
tT:HL
tT:LH
90
10
SCL
50
90
10
SDA
Data Out
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aSC7511
Pin Descriptions
Pin #
Name
Direction
1
VDD
2
D+
3
D-
Supply
Current
Source
Current Sink
4
THERM
Output
5
GND
Supply
6
ALERT / THERM2
Output
7
8
Description
Supply Voltage
Remote Diode Anode or Positive Lead
Remote Diode Cathode or Negative Lead
Open-drain logic output that may be used to control a fan or throttle CPU
when programmed temperature limit is exceeded.
Ground
Open-drain logic output used as a mask-able interrupt or SMBus alert.
Configurable as second THERM output.
SDA
Input/Output
Serial Data—Open drain I/0-data pin for two-wire serial interface.
SCL
Input
Serial Clock—Clock for two-wire serial interface.
Note: Open-drain pins require a pull-up resistor.
Conversion Rate
Local
Sensor
Address Pointer
Remote Low Limit
Local Temp.
D+
D-
Remote High Limit
Remote THERM Limit
Comparator
ADC
2
3
Local Low Limit
Remote Temp.
Local High Limit
Local THERM Limit
Busy
Remote Offset
Remote Diode Open
Status
Configuration
SMBus Interface
Mask
1
5
VDD VSS
7
SDA
8
SCL
4
THERM
6
ALERT /
THERM2
Figure 1. Block Diagram
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aSC7511
Basic Operation Overview
The aSC7511 temperature sensing circuitry continuously
monitors two thermal diode base-emitter voltages, one onchip, called “local” and one remotely located, connected to
the D+ and D- pins. At regular intervals the aSC7511
converts both analog voltages to digital values, which are
placed into the temperature registers.
The aSC7511 has an SMBus-compatible serial interface
that allows the user to access the data in the temperature
registers at any time. In addition, the serial interface gives
the user easy access to all other aSC7511 registers to
customize operation of the device.
Digital Output (Offset Binary)
Temperature
The aSC7511 has a Shutdown Mode that reduces the
operating current to < 20µA. This mode is controlled by
RUN / STOP, bit 6 in the configuration register.
Comparisons to limits and diode open test are suspended
until the next measurement has taken place.
Low Byte
Always Zero
Local Sensor
Remote Sensor
The aSC7511 temperature-to-digital converter has two
temperature formats, 0°C to +127°C binary and extendedrange, -55°C to +150°C, offset-binary. The local sensor
resolution is 8-bits, with an LSB of 1°C. The remote or
remote diode sensor resolution is 10-bits with an LSB of
0.25°C. The temperature range of the local and remote
sensors are controlled by bit 2 of the configuration register,
default value is 0, 0°C to 127°C.
Table 1 gives examples of the relationship between the
output digital data and the measured temperature for the
default range. Table 2 gives examples for the extended
range. All output values are offset by +64°C when in this
mode.
High Byte
8-Bit Resolution
00
10-Bit Resolution
00
0000
00
0000
+150°C
1101
0110
00
00
0000
+127°C
1011
1111
00
00
0000
+125°C
1011
1101
00
00
0000
+100°C
1010
0100
00
00
0000
+50°C
0111
0010
00
00
0000
+25°C
0101
1001
00
00
0000
+10°C
0100
1010
00
00
0000
+1.75°C
0100
0001
11
00
0000
+0.25°C
0100
0000
01
00
0000
0°C
0100
0000
00
00
0000
-55°C
0000
1001
00
00
0000
Table 2. Relationship Between Temperature and Digital
Output, Extended Range, -55°C to +150°C
Power-Up Default Conditions
The aSC7511 always powers-up in the following default
state:
• Configuration Register: 00h (i.e., ALERT enabled, Run
Mode, ALERT pin selected, normal range)
Digital Output (Binary)
Temperature
High Byte
Low Byte
Always Zero
Local Sensor
Remote Sensor
8-Bit Resolution
00
10-Bit Resolution
00
0000
00
0000
• Conversion Rate: 16 per second, 08h
• All Temperature and Offset Registers: 00h
• Consecutive ALERT : 1 fault (i.e., 01h in the register)
>127°C
0111
1111
00
00
0000
+127°C
0111
1111
00
00
0000
+125°C
0111
1101
00
00
0000
+100°C
0110
0100
00
00
0000
+50°C
0011
0010
00
00
0000
• THERM Hysteresis: 10°C
+25°C
0001
1001
00
00
0000
+10°C
0000
1010
00
00
0000
• Register Address Pointer: Undefined, must be set by
first write sequence.
+1.75°C
0000
0001
11
00
0000
+0.25°C
• Normal / Extended Range: Normal
0000
0000
01
00
0000
0°C
0000
0000
00
00
0000
< 0°C
0000
0000
00
00
0000
• Local and Remote Low Limit: 0°C
• Local and Remote THERM Limit: 85°C
After power-up, these conditions can be reprogrammed via
the serial interface. Refer to the Serial Data Bus Operation
section to for aSC7511 programming instructions.
Table 1. Relationship Between Temperature and Digital
Output, Default Range, 0°C to +127°C
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aSC7511
Temperature Measurement
The aSC7511 measures temperature by calculating the
change in sensing a diode-connected transistor’s baseemitter voltage (ΔVBE) when two different currents are
applied sequentially. This difference has a linear positive
slope with temperature, unlike the non-linear VBE under a
constant current.
The ΔVBE is amplified and scaled depending on the type of
transistor being measured. The typical case for the remote
measurement is to connect to the substrate thermal diode
of a CPU or ASIC. This will provide the die temperature of
that device to a high level of accuracy for the purpose of
controlling system cooling or reporting routine or overtemperature conditions.
For each measurement cycle, an internal 2:1 multiplexer
alternates between the local and remote sensor diodes and
provides the input to a filter and amplifier. An analog-todigital converter takes this signal, converts it to a digital
value and stores the alternating values in the appropriate
temperature register of the aSC7511. These stored values
are continuously compared to several user-selected limit
values for sending alarm conditions or turning on an
external fan driver.
Conversions for both sensors will proceed automatically at
the default rate of 16 conversions per second until a
different rate is selected or one-shot or stand-by mode are
selected. The conversion rate is user-selected by writing to
the conversion rate register. Table 3 provides a list of
conversion rates ranging from 0.0625 to 64 conversions
per second. Sensor power consumption is directly
proportional to the conversion rate and should be taken into
account in power-limited applications as well as the impact
that power dissipation has in self-heating of the local
sensor. More details are provided in the Operation section.
Note that limit comparisons are triggered only by a
measurement action, not by a change in limits. An actual
alarm condition may exist but will not be reported until a
measurement takes place. This should be taken into
account when using slow conversion rates.
The ALERT pin may also be configured as a second
THERM pin, THERM2 . This will behave in the same way
as the THERM pin, but will be controlled by the high limit
used for the ALERT pin, although it will not need to be
reset by the master and does not use the hysteresis value.
A more detailed discussion and examples is provided in the
Operation section.
Fault Tolerance
The number of out of limit readings required before the
ALERT is asserted may be set by writing to the
Consecutive ALERT register. The default value is 1 and
the user may select requiring 2, 3, or 4 consecutive out of
limit readings before is ALERT asserted.
Registers
The ASC7511 contains 22 8-bit registers. All of these
registers may be accessed by the user via the digital serial
interface at any time. A detailed description of these
registers and their functions is provided in the following
paragraphs. Reading and writing to registers is covered in
the SMBus Operation section. Use of the register set to
control and interrogate the aSC7511 is covered in the
Operation section. A table of the registers is provided in
Table 4.
Address Pointer Register
Thermal Alarm and Alert Functions
The Address Pointer Register is a write-only register that is
The aSC7511 thermal alarm function, THERM , provides
user programmable thermostat capability and allows the
aSC7511 to function as a standalone thermostat without
constant attention over the serial interface. This signal is an
open drain output. When either the remote or local
temperature reading exceeds the selected limits it goes low
and will remain low until the measured temperature falls
automatically written by the first byte that follows the R/ W
bit of a write transaction. If R/ W is low, It will then contain
the address to which the following byte is written, when
R/ W bit is high it will be the read address. Details of the
reading and writing sequence are covered in the Serial
Interface Operation section.
below the alarm limit by the amount set into the THERM
hysteresis register (default value is 10°C).
Measured Temperature Value Registers
The aSC7511 thermal alert function, ALERT , provides
another open-drain pin that is driven low when either the
internal or remote temperature is greater than the high limit
or less than or equal to the low limit selected by the user. In
addition, an SMBus Alert is generated, requiring the bus
master to inquire on the SMBus which client has
The aSC7511 has two sensors whose measured values
are stored in registers. Remote temperature is two bytes, at
register addresses 01h and 10h. Local temperature is at
00h. The power-on default values are zero and the
aSC7511 will automatically begin filling these registers with
values after the power on reset sequence is complete.
These are read-only registers.
interrupted in order to re-set the alert. The ALERT pin may
be masked by the user with bit 7 of the configuration
register.
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aSC7511
Status Register
The status register is a read-only register for reporting the
state of the aSC7511’s alarms. It is a read-only register
located at 02h.
When any high or low local limits or high or low remote
limits are exceeded, bits 3 through 6 are set accordingly
Bit
Name
Function
0
LTHERM
Local sensor > THERM limit
1
RTHERM
Remote sensor > THERM limit
2
ROPEN
Remote sensor open-circuit
3
RLOW
Remote sensor ≤ low limit
the ALERT pin will remain asserted until the master has
serviced the SMBus alert.
4
RHIGH
Remote sensor > high limit
5
LLOW
Local sensor ≤ low limit
The local and remote THERM limit trip are reported in bits 0
and 1 respectively. These two bits are reset only by the
6
LHIGH
Local sensor > high limit
7
BUSY
Converter in process of conversion
and the ALERT pin 6 will be driven low. If the remote
sensor is open-circuit, bit 2 will be set and the ALERT will
be asserted. Reading the status register will re-set these
flags if the alerted condition has been removed, however,
temperature falling below the THERM limit by the amount
set into the hysteresis register.
Table 3. Status Register Bit Assignments
Bit 7 will be high when the converter is busy. The list of
status register bit assignments is in Table 3. Each condition
is asserted when the bit is high. Default is 0.
Read
Write
Address Address
n/a
n/a
Default
Value
Description
Address Pointer
Default
Value
Description
n/a
00h / 0°C
2
00h
n/a
Local Temperature (high-byte)
01h
n/a
Remote Temperature (high-byte)
02h
n/a
Status
n/a
03h
09h
Configuration
00h
04h
0Ah
Conversion rate
08h
05h
0Bh
Local High Limit
55h / 85°C
06h
0Ch
Local Low Limit
07h
Read
Write
Address Address
2
00h
2
10h
n/a
Remote Temperature (low-byte)
13h
13h
Remote High Limit (low-byte)
14h
14h
Remote Low Limit (low-byte)
2
12h
12h
Remote Temp. Offset (low-byte)
00h / 0°C
00h / 0°C
55h / 85°C
2
0Dh
Remote High Limit (high-byte)
08h
0Eh
Remote Low Limit (high-byte)
2
00h / 0°C
n/a
0Fh
One-Shot Measurement
11h
11h
Remote Temp. Offset (high-byte)
19h
19h
Remote THERM Limit
55h / 85°C
20h
20h
Local THERM Limit
21h
21h
THERM Hysteresis
55h / 85°C
0Ah /
10°C
22h
22h
Consecutive ALERT
01h
FEh
n/a
Manufacturer ID
61h
00h / 0°C
2
00h / 0°C
n/a
2
00h / 0°C
2
00h / 0°C
FFh
n/a
Die Revision Code
00h
Notes:
1. Low-byte values are fractional degrees, MSB of lower byte is 0.5°C
2. Changing to extended range adds 64°C to values reported, but limit settings are not changed and must be corrected by the user.
Table 4. aSC7511 Registers
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aSC7511
Configuration Register
16
0.0625
The configuration register is a read-write register that
32
0.03125
09h
stores the controls for masking the ALERT signal, RUN /
STOP control, extended temperature range select and the
64
0.015625
0Ah
Reserved
Reserved
0Bh to FFh
pin 6 function select for ALERT or THERM2 . It is located at
address 03h for read and 09h for writing.
Power on default is for all bits reset: no ALERT mask, RUN,
pin 6 is ALERT and normal range, 0°C to 127°C. Table 5
lists the bits of the configuration register.
The mask bit is only functional when pin 6 is configured as
the ALERT pin. When selecting extended range, note that
the values reported will be offset by 64°C and any limits will
have to be adjusted accordingly to match this offset-binary
coding. It is recommended that this configuration not be
changed again, once selected, to avoid confusion.
08h
Table 6. Conversion Rate Register Bit
Assignments
The conversion rate register may be written-to at address
04h. The value stored may be read back at any time from
address 0Ah. The lower four bits define the rate from
0.0625 to 64 conversions per second. The default rate is 16
conversions per second designated by a code of 08h. The
rates are described in Table 6.
A single measurement is controlled separately by the oneshot register, 0Fh, that is described below.
ALERT Limit Registers
Bit
0, 1
2
3, 4
5
Name
Function
There are four limit registers for the ALERT function using
six register locations:
Reserved
0 = 0°C to +127°C
Range Select
• ALERT Remote High Limit (high and low bytes)
1 = -55°C to +150°C
Reserved
• ALERT Remote Low Limit (high and low bytes)
ALERT / THERM2
6
RUN / STOP
7
MASK
0 = pin 6 is ALERT
• ALERT Local High Limit
1 = pin 6 is THERM2
• ALERT Local Low Limit
0 = RUN
1 = STOP
These registers may be written or read-back at any time at
the addresses in shown in Table 2. Each limit has a default
value at power-up of 85°C for the high limit and 0°C for the
0 = ALERT Enabled
1 = ALERT Masked
Table 5. Configuration Register Bit Assignments
Conversion Rate Register
The sensor conversion rate register sets the rate of
conversions. Both local and remote sensors are measured
during a measurement cycle.
Conversions per
Second
Seconds per
Conversion
Code
low limit. The ALERT high limits have a dual purpose in that
they may be used to control the alternate function of pin 6,
the ALERT / THERM2 output when that mode is selected.
Note that the values in the alarm registers must match the
data format selected by bit 2, the normal / extended range
selector in the configuration register. The user should
choose either normal or extended range on power-up and
not change this setting otherwise all limits will be invalid
and have to be adjusted accordingly.
Operation of these registers in thermal management
applications is described in the Operation Section.
0.0625
16
00h
0.125
8
01h
One-Shot Register
While the aSC7511 is in standby mode with configuration
register bit 6 high, a single measurement cycle may be
initiated by a write to the one-shot register at address 0Fh.
Any data written is ignored. After the conversion is
completed a set of readings is written to the temperature
registers, comparisons made and alerts generated. The
aSC7511 will then return to standby mode, awaiting the
0.25
4
02h
0.5
2
03h
1
1
04h
2
0.5
05h
4
0.25
06h
8
0.125
07h
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aSC7511
next one-shot reading or full activation. Standby mode is
discussed further in the Operation section.
Table 7. Offset Register Sample Codes
Consecutive ALERT Register
THERM Limit Registers
This register will set the number of out of limit value
There are two limit registers for the THERM function:
readings it will require before ALERT is asserted. It is
stored at register address 22h. The default value is for a
single out of limit reading to assert ALERT . The register
values for up to 4 out-of-limit readings are found in Table 8.
• THERM Remote High Limit
• THERM Local High Limit
These registers may be written or read-back at any time at
the addresses in shown in Table 2. Both limits has a default
value at power-up of 85°C.
Number of Out-of-Limit
Measurements Required
Register Value
1
yxxx 000x
2
yxxx 001x
3
yxxx 011x
4
yxxx 111x
The THERM alarm will be set when this limit is exceeded
and will reset when the temperature falls below that limit.
However, there is also a THERM hysteresis register that
may be used to set the temperature difference below
x = Don’t Care
y = SMBus Timeout Enable
the THERM limit setting where the THERM alarm will be
reset once it has been triggered. This value is defaulted to
10°C and may be set to any value after power-on.
Operation of these registers in thermal management
applications is described in the Applications Section.
This register is also used to control activation of the SMBus
timeout feature. It is disabled by default and enabled by
writing a 1 to the MSB, bit 7.
Remote Sensor Offset Register
Manufacturer’s Registers
Offset errors may be encountered on the remote sensor
readings caused by factors such as system clock noise
induced into the sensor interconnect or by a difference
between the measured temperature and the actual
temperature of interest in the system. A correction offset
value may be provided by the user to add or subtract from
the measured value resulting in a corrected value being
stored in the remote temperature registers. The limit values
will then be compared to these corrected values.
Manufacturer’s identification is stored in the register at
address FEh and set to the value 61h. Register FFh
contains the die revision code.
The offset register coding is two’s complement and it is
allocated two bytes at addresses 11h and 12h. Table 7
describes some examples of values in the range from 128°C to +127.75°C that may be applied.
Offset Value
Offset Register
High Byte (11h)
Offset Register
Low Byte (11h)
+127.75°C
0111 1111
11 00 0000
+4°C
0000 0100
00 00 0000
+1°C
0000 0001
00 00 0000
+0.5°C
0000 0000
10 00 0000
0°C
0000 0000
00 00 0000
-0.5°C
1111 1111
10 00 0000
-1°C
1111 1111
00 00 0000
-4°C
1111 1100
00 00 0000
-128°C
1000 0000
00 00 0000
© Andigilog, Inc. 2006
Table 8. Consecutive Alert Register
Serial Data Bus Operation
General Operation
Writing to and reading from the aSC7511 registers is
accomplished via the SMBus-compatible two-wire serial
interface. SMBus protocol requires that one device on the
bus initiate and control all read and write operations. This
device is called the “master” device. The master device
also generates the SCL signal that is the clock signal for all
other devices on the bus. All other devices on the bus are
called “slave” devices. The aSC7511 is a slave device.
Both the master and slave devices can send and receive
data on the bus.
During SMBus operations, one data bit is transmitted per
clock cycle. All SMBus operations follow a repeating nine
clock-cycle pattern that consists of eight bits (one byte) of
transmitted data followed by an acknowledge (ACK) or not
acknowledge (NACK) from the receiving device. Note that
there are no unused clock cycles during any operation—
therefore there must be no breaks in the stream of data
and ACKs / NACKs during data transfers.
For most operations, SMBus protocol requires the SDA line
to remain stable (unmoving) whenever SCL is high — i.e.
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August 2006 - 70A04010
aSC7511
any transitions on the SDA line can only occur when SCL is
low. The exceptions to this rule are when the master device
issues a start or stop condition. Note that the slave device
cannot issue a start or stop condition.
register’s content is automatically set to the value of the
The aSC7511 supports packet error checking (PEC) per
the SMBus protocol. It will interpret the PEC byte when
provide and respond with a PEC byte when expected by
the master. The PEC byte is calculated using CRC-8 and
conforms to the frame check sequence with the polynomial:
the address and R/ W bit, the master device must transmit
an appropriate 8-bit address pointer value as explained in
the Registers section of this data sheet. The aSC7511 will
send an ACK after receiving the new pointer data.
first byte following the R/ W bit being set to 0.
After the aSC7511 sends an ACK in response to receiving
SMBus Definitions
The register address pointer set operation is illustrated in
Figure 2. If the address pointer is not a valid address the
aSC7511 will internally terminate the operation. Also recall
that the address register retains the current address pointer
value between operations. Therefore, once a register is
being pointed to, subsequent read operations do not
require another Address Pointer set cycle.
The following are definitions for some general SMBus
terms:
Writing to Registers
C(x) = x8 + x2 + x1 + 1
Refer to SMBus specification 2.0 for more details.
Start Condition: This condition occurs when the SDA line
transitions from high to low while SCL is high. The master
device uses this condition to indicate that a data transfer is
about to begin.
All writes must start with a pointer set as described
previously, even if the pointer is already pointing to the
desired register. The sequence is described in Figure 3.
Stop Condition: This condition occurs when the SDA line
transitions from low to high while SCL is high. The master
device uses this condition to signal the end of a data
transfer.
Immediately following the pointer set, the master must
begin transmitting the data to be written. After transmitting
each byte of data, the master must release the SDA line for
one clock to allow the aSC7511 to acknowledge receiving
the byte. The write operation should be terminated by a
stop condition from the master.
Acknowledge and Not Acknowledge: When data are
transferred to the slave device it sends an “acknowledge”
(ACK) after receiving each byte. The receiving device
sends an ACK by pulling SDA low for one clock. Following
the last byte, a master device sends a "not acknowledge"
(NACK) followed by a stop condition. A NACK is indicated
by forcing SDA high during the clock after the last byte.
Slave Address
Each slave device on the bus has a unique 7-bit SMBus
slave address. The aSC7511’s slave address is 4C hex.
Writing to and Reading from the aSC7511
All read and write operations must begin with a start
condition generated by the master device. After the start
condition, the master device must immediately send a
slave address (7-bits) followed by a R/ W bit. If the slave
address matches the address of the aSC7511, it sends an
ACK by pulling the SDA line low for one clock. Read or
write operations may contain one- or two-bytes. See
Figures 2 through 6 for timing diagrams for all aSC7511
operations.
Setting the Register Address Pointer
For all operations, the address pointer stored in the
address pointer register must be pointing to the register
address that is going to be written to or read from. This
© Andigilog, Inc. 2006
Reading from Registers
To read from a register other than the one currently being
pointed to by the address pointer register, a pointer set
sequence to the desired register must be done as
described previously. Immediately following the pointer
set, the master must perform a repeat start condition that
indicates to the aSC7511 that a read is about to occur. It is
important to note that if the repeat start condition does not
occur, the aSC7511 will assume that a write is taking place,
and the selected register will be overwritten by the
upcoming data on the data bus. The read sequence is
described in Figure 4. After the start condition, the master
must again send the device address and read/write bit.
This time the R/ W bit must be set to 1 to indicate a read.
The rest of the read cycle is the same as described in the
previous paragraph for reading from a preset pointer
location.
If the pointer is already pointing to the desired register, the
master can read from that register by setting the R/ W bit
(following the slave address) to a 1. After sending an ACK,
the aSC7511 will begin transmitting data during the
following clock cycle. After receiving the 8 data bits, the
master device should respond with a NACK followed by a
stop condition.
If the master is reset while the aSC7511 is in the process of
being read, the master should perform an SMBus reset.
This is done by holding the data or clock low for more than
- 10 www.andigilog.com
August 2006 - 70A04010
aSC7511
35ms, allowing all SMBus devices to be reset. This follows
the SMBus 2.0 specification of 25-35ms.
1
9
1
A
A7
When the aSC7511 detects an SMBus reset, it will prepare
to accept a new start sequence and resume
communication from a known state
9
SCL
SDA
S
1
0
0
1
1
0
R/W
0
Start
A6
ACK
from
aSC7511
SMBus Device Address Byte (4Ch)
A5
A4
A3
A2
A1
A0
A
ACK
from
aSC7511
Register Address Byte
Stop
By
Master
Figure 2. Register Address Pointer Set
1
9
1
A
A7
9
1
A
D7
9
SCL
SDA
S
1
0
0
1
1
0
0
R/W
Start
SMBus Device Address Byte (4Ch)
A6
ACK
from
aSC7511
A5
A4
A3
A2
A1
A0
D6
ACK
from
aSC7511
Register Address Byte
D5
D4
D3
D2
D1
Register Data Byte
D0
A
ACK
from
aSC7511
Stop
by
Master
Figure 3. Register Write
1
Register Address
Pointer Set
+
(Figure 2.)
without stop by Master
S
1
0
0
1
1
0
0 R/W
Re-start
9
1
A
D7
9
D6
D5
D4
D3
D2
ACK
from
SMBus Device Address Byte (4Ch) aSC7511
Register Data Byte
D1
D0
N
NACK
from
Master
Stop
by
Master
Figure 4. Register Read
1
9
1
A
D7
9
SCL
SDA
S
1
0
0
1
1
0
0 R/W
Start
SMBus Device Address Byte (4Ch)
D6
ACK
from
aSC7511
D5
D4
D3
D2
D1
D0
N
NACK
from
Master
Register Data Byte
Stop
by
Master
Figure 5. Register Read When Read Address Already Set
1
9
1
A
1
9
SCL
SDA
S
0
0
0
1
1
0
0 R/W
Start
SMBus Alert Response Address Byte (0Ch)
ACK
from
aSC7511
0
0
1
1
0
0
aSC7511 SMBus Address
1
N
NACK
from
Master
Stop
by
Master
Figure 6. SMBus Alert Response
© Andigilog, Inc. 2006
- 11 www.andigilog.com
August 2006 - 70A04010
aSC7511
Operation
Alarm Outputs
The aSC7511 has two alarm functions, ALERT and
THERM . THERM has a high temperature limit and
ALERT has both high and low limits and will also respond
to a remote diode open circuit failure. These limits are
settable separately for the local and remote sensors. Any
alarm condition is reported individually in the status
register and may be read at any time on the SMBus.
Alarm conditions are logically combined and used to drive
two open-drain outputs, the ALERT output, (pin 6) and
THERM output, (pin 4).
Output pins may be used as an interrupt signal the CPU
or to turn on remote drivers for fans or indicators. The
ALERT pin will remain asserted until it has been reset by
the host via the SMBus. The THERM pin will remain
asserted until the temperature falls below the alarm level
by the amount set into the THERM hysteresis register.
ALERT Limits
Figure 7 shows use of the ALERT high and low limits.
The user sets up the alarm by writing the upper and lower
limit temperatures into the limit registers over the SMBus.
After each measurement, the comparator tests the
readings against the programmed limits and if the
measurement exceeds the high limit is or is equal to or
less-than the low limit, it will assert the particular alarm
bits will be reset, otherwise they will remain high until the
conditions are no longer met and the register is read
again. The same sequence applies to the local readings
and limits.
The ALERT pin will remain low until the status bits have
been reset and an Alert Response has been issued by
the master and responded by the aSC7511. This flow is
described below.
The user may mask-out or disable the ALERT signal pin
should it be necessary to prevent a processor interrupt.
This is controlled by setting bit 7 of the configuration
register.
SMBus Alert Output
The ALERT pin may be used to signal an SMBus Alert to
the host processor. This is a special mode of the SMBus
interface that requires the SMBus host to send an Alert
Response Address (ARA) to all slaves sharing the
ALERT pin in order to isolate clear and service the
alerting device. This sequence is described below and in
Figure 6.
The sequence of servicing this interrupt is as follows:
1.
SMBALERT is asserted by the aSC7511 driving
pin 6 low.
2.
The SMBus master begins a read operation with
a start followed by the ARA response address,
0001 100. This is an SMBus General Call
Address to be used only for requesting an alert
response. The
3.
The device providing the SMBALERT signal
responds to this by providing an ACK followed
by its own bus address, an aSC7511 will
provide, 100 1100, with the LSB of the data byte
set to 1. A NACK response is expected from all
bits in the status register and cause the ALERT pin to go
low.
Conversion
Ext. High ALERT Limit
Temperature
devices not giving an SMBALERT .
Ext. Low ALERT Limit
Status Bit-4, EXHIGH
4.
If more than one device responds, the device
with the lowest device address will have priority
and will be serviced first by the master.
5.
When the aSC7511 has responded with its own
Status Bit-3, EXLOW
Status Register Read
address, it will de-assert the ALERT pin and the
status register bit that caused it, if that condition
ALERT Pin 6
and no other ALERT condition no longer exist.
ARA Response
THERM Limits
Figure 7. ALERT Limits and Responses
The status bits will remain high until the status register is
read and then, if the condition is no longer present those
© Andigilog, Inc. 2006
The THERM alarms operate differently from the alert
alarms. THERM alarm status bits for remote and local
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August 2006 - 70A04010
aSC7511
limits, RTHERM and LTHERM, will change as soon as a
reading is greater than the limit and will reset as soon as
a reading goes below the limit minus the programmable
hysteresis value.
This hysteresis value applies to both remote and local
sensors. The scenario is described in Figure 8.
Standby Mode
The aSC7511 may be placed in a minimum-power
standby mode by writing a 1 to bit 6 of the configuration
register. No measurements are made but the SMBus
interface will respond when addressed.
Any measurement in progress when standby is selected
will be terminated and no new values will be written into
the temperature registers.
Conversion
Ext. THERM Limit
While in this mode, a one-shot measurement of both
channels may be commanded by the user by writing any
data value to the one-shot register, 0Fh. All alarm
comparisons will continue to be made and reported. The
alarm values may be changed while in standby and
current measured temperatures will be compared and
alarms generated if an out-of-limit condition exists.
Temperature
THERM Hysteresis
Status Bit-1, EXTHERM
THERM Pin 4
Operating current will be 10 μA or less when there is no
activity on the SMBus and 100 μA or less when clock and
data are active.
Figure 8. THERM Limits and Responses
The THERM limits default to 85ºC with 10ºC hysteresis.
The hysteresis value may be set from 0ºC to any positive
value up to 127ºC.
All limit values must take into account whether
measurements are being made in normal or extended
range. In extended range, there is a 64ºC offset in
reported values and limits must be adjusted accordingly.
THERM2 Option
The ALERT pin and associated alarm bits may be reassigned as a second THERM alarm. This alarm will
work exactly like THERM . The ALERT mask will have no
effect and there is only a high limit. The THERM
hysteresis value is applied to this alarm.
Applications Information
Remote Diodes
The aSC7511 is designed to work with a variety of
remote sensors in the form of the substrate thermal diode
of a CPU or graphics controller or a diode-connected
transistor. Actual diodes are not suited for these
measurements.
There is some variation in the performance of these
diodes, described in terms of its departure from the ideal
diode equation. This factor is called diode nonideality, nf .
The equation relating diode temperature to a change in
thermal diode voltage with two driving currents is:
Sensor Open Detect
ΔVBE = (nf )
A protective circuit monitors the D+ pin for a voltage level
that would indicate the path to the remote diode is open.
If the voltage exceeds a typical value of VDD-1V, bit 2 of
the status register and the ALERT flag are set and
the ALERT pin is driven low.
This will require the master to service the ALERT in order
to reset the condition. If the remote diode is not being
used, it is recommended that D+ and D- be shorted to
prevent setting the open alarm.
In the event that a remote diode open-circuit has caused
an ALERT condition to occur and that condition is
restored to normal, when the host sends an Alert
Response and reads the Status Register the alert pin
may not clear. To ensure that the ALERT pin clears,
perform a read to internal register 42h.
© Andigilog, Inc. 2006
KT
ln(N )
q
where:
nf = diode non-ideality factor, (nominal 1.008).
K = Boltzman’s constant, (1.38 x 10-23).
T = diode junction temperature in Kelvins.
q = electron charge (1.6 x 10-19 Coulombs).
N = ratio of the two driving currents (16).
The aSC7511 is designed and trimmed for an expected
nf value of 1.008, based on the typical value for the Intel
Pentium™ III and AMD Athlon™. There is also a
tolerance on the value provided. The values for other
CPUs and the 2N3904 may have different nominal values
and tolerances. Consult the CPU or GPU manufacturer’s
data sheet for the nf factor. Table 8 gives a
representative sample of what one may expect in the
- 13 www.andigilog.com
August 2006 - 70A04010
aSC7511
range of non-ideality. The trend with CPUs is for a lower
value with a larger spread.
When thermal diode has a non-ideality factor other than
1.008 the difference in temperature reading at a particular
temperature may be interpreted with the following
equation:
⎛ 1.008
Tactual = Treported ⎜⎜
⎝ nactual
the CPU socket. The temperature indicated will need to
be compensated for the departure from a non-ideality of
1.008.
D+
CPU
⎞
⎟
⎟
⎠
D-
aSC7511
Substrate
where:
Figure 9. CPU Remote Diode Connection
Treported = reported temperature in temperature register.
Tactual = actual remote diode temperature.
Series Resistance
nactual = selected diode’s non-ideality factor, nf .
Temperatures are in Kelvins or °C + 273.15.
The temperature error caused by non-ideality difference
is directly proportional to the difference from 1.008, but a
small difference in non-ideality results in a relatively large
difference in temperature reading. For example, if there
were a ±1% tolerance in the non-Ideality of a diode it
would result in a ±2.7 degree difference (at 0°C) in the
result (0.01 x 273.15).
This difference varies with temperature such that a fixed
offset value may only be used over a very narrow range.
Typical correction method required when measuring a
wide range of temperature values is to scale the
temperature reading in the host firmware.
Any resistance in the connections from the aSC7511 to
the CPU pins should be accounted for in interpreting the
results of a measurement.
The impact of series resistance on the measured
temperature is a result of measurement currents
developing offset voltages that add to the diode voltage.
This is relatively constant with temperature and may be
corrected with a fixed value in the offset register. To
determine the temperature impact of resistance is as
follows:
ΔTR = RS × TV × ΔI D
or,
ΔTR = RS ×
90 μ A
= RS × 0.391°C / Ω
230 μV / °C
where:
Part
nf Min
Pentium™ III (CPUID 68h)
1.0057
1.008
1.0125
Pentium 4, 130nM
1.001
1.002
1.003
Intel Pentium M
1.0015
1.0022
1.0029
AMD Athlon™
Model 6
1.002
1.008
1.016
AMD Duron™
Models 7 and 8
1.002
1.008
1.016
AMD Athlon
Models 8 and 10
1.0000
1.0037
1.0090
2N3904
1.003
1.0043
1.005
Pentium 4, 90nM
nf Nom nf Max
1.011
Table 8. Representative CPU Thermal Diode
and Transistor Non-Ideality Factors
CPU or ASIC Substrate Remote Diodes
A substrate diode is a parasitic PNP transistor that has its
collector tied to ground through the substrate and the
base (D-) and emitter (D+) brought out to pins.
Connection to these pins is shown in Figure 13. The nonideality figures in Table 8 include the effects of any
package resistance and represent the value seen from
© Andigilog, Inc. 2006
ΔTR = difference in the temperature reading from actual.
RS = total series resistance of interconnect (both leads).
Δ I D = difference in the two diode current levels (90µA).
TV = scale of temperature vs. VBE (230µV/°C).
For example, a total series resistance of 10Ω would give
an offset of +3.9°C.
Discrete Remote Diodes
When sensing temperatures other than the CPU or GPU
substrate, an NPN or PNP transistor may be used. Most
commonly used are the 2N3904 and 2N3906. These
have characteristics similar to the CPU substrate diode
with non-ideality around 1.003. They are connected with
base to collector shorted as shown in Figure 14.
While it is important to minimize the distance to the
remote diode to reduce high-frequency noise pickup, they
may be located many feet away with proper shielding.
Shielded, twisted-pair cable is recommended, with the
shield connected only at the aSC7511 end as close as
possible to the ground pin of the device.
As with the CPU substrate diode, the temperature
reported will be subject to the same errors due to non-
- 14 www.andigilog.com
August 2006 - 70A04010
aSC7511
ideality variation and series resistance. However, the
transistor’s die temperature is usually not the temperature
of interest and care must be taken to minimize the
thermal resistance and physical distance between that
temperature and the remote diode. The offset and
response time will need to be characterized by the user.
Use ground runs along side the pair to minimize
differential coupling as in Figure 14.
3.
Place the aSC7511 as close to the CPU or GPU
remote diode leads as possible to minimize noise
and series resistance.
4.
Avoid running diode connections close to or in
parallel with high-speed busses, staying at least
2cm away.
D-
5.
Avoid running diode connections close to on-board
switching power supply inductors.
D+
6.
PC board leakage should be minimized by
maintaining minimum trace spacing and covering
traces over their full length with solder mask.
D+
aSC7511
2N3906
2N3904
aSC7511
D-
Figure 10. Discrete Remote Diode Connection
Board Layout Considerations
The distance between the remote sensor and the
aSC7511 should be minimized. All wiring should be
defended from high frequency noise sources and a
balanced differential layout maintained on D+ and D-.
Any noise, both common-mode and differential, induced
in the remote diode interconnect may result in an offset in
the temperature reported. Circuit board layout should
follow the recommendation of Figure 15. Basically, use
10-mil lines and spaces with grounds on each side of the
differential pair. Choose the ground plane closest to the
CPU when using the CPU’s remote diode.
10 mils
The temperature of the aSC7511 will be close to that of
the PC board on which it is mounted. Conduction through
the leads is the primary path for heat flow. The reported
local sensor is very close to the circuit board temperature
and typically between the board and ambient.
In order to measure ambient air temperature, a remote
diode-connected transistor should be used. A surfacemount SOT-23 or SOT-223 is recommended. The small
size is advantageous in minimizing response time
because of its low thermal mass, but at the same time it
has low surface area and a high thermal resistance to
ambient air. A compromise must be achieved between
minimizing thermal mass and increasing the surface area
to lower the junction-to-ambient thermal resistance.
The power consumption of the aSC7511 is relatively low
and should have little self-heating effect on the local
sensor reading. At the highest measurement rate the
dissipation is less than 2mW, resulting in only a few
tenths of a degree rise.
GND
D+
10 mils
Thermal Considerations
DGND
Application Circuit
Figure 11. Recommended Remote Diode Circuit
Board Interconnect
The aSC7511 may be used to turn a fan on and off in
response to the internal or remote sensor. The active-low
THERM pin offers a programmable turn-on temperature
and the THERM hysteresis setting will turn the fan off.
Noise filtering is accomplished by using a bypass
capacitor placed as close as possible to the aSC7511 D+
and D- pins. A 2.2nF ceramic capacitor is recommended,
but up to 3.3nF may be used. Additional filtering takes
place within the aSC7511.
An SMBus host is used to provide the settings
It is recommended that the following guidelines be used
to minimize noise and achieve highest accuracy:
falls below THERM temperature by the amount set into
1.
Place a 0.1µF bypass capacitor to digital ground
as close as possible to the power pin of the
aSC7511.
2.
Match the trace routing of the D+ and D- leads and
use a 2.2nF filter capacitor close to the aSC7511.
© Andigilog, Inc. 2006
for THERM and THERM hysteresis. The fan will come on
when the THERM limit is reached and will turn off when it
the THERM hysteresis register. Figure 16 provides a
circuit diagram.
- 15 www.andigilog.com
August 2006 - 70A04010
aSC7511
3.3V
5 V or 12V
0.1µF
2.2nF
1
2
CPU
SMBus
Host
Interface
10kΩ
3
SDA
SCL
ALERT
7
8
4
aSC7511
THERM
Fan Drive
Circuit
6
5
Figure 12. Simple Fan Control
Evaluation Board
The aSC7511EVB provides a platform for evaluation of
the operational characteristics of the aSC7511. The
board features a graphical user interface (GUI) to control
and monitor all activities and readings of the aSC7511.
The provided software will run on a Windows™-based
desktop or laptop PC with a DB-25 parallel printer port.
Features:
•
Interactive GUI for setting limits and operational
configuration
•
Powered and operated from PC parallel port
•
•
•
•
•
•
•
LEDs for THERM and ALERT signals
Graphical readout of temperature and alarms
Selectable NPN or PNP sensor transistors
Selectable remote diode connector
Log file of readings
Saving of setting configurations
Optional use of external power and SMBus
© Andigilog, Inc. 2006
- 16 www.andigilog.com
August 2006 - 70A04010
aSC7511
D8 Package – 8-Lead SOP Package Dimensions
Pb-Free Package
7°
1.27mm BSC
β
0.53mm
5.80mm (min)
6.20mm (max)
0.19mm (min)
0.25mm (max)
3.81mm (min)
3.99mm (max)
0.41mm (min)
1.27mm (max)
4.80mm (min)
4.98mm (max)
1.37mm (min)
1.57mm
(max)
1.52mm (min)
1.72mm (max)
0.10mm (min)
0.25mm (max)
Detail A
0.25mm (min)
0.50mm (max)
x 45°
0.36mm (min)
0.46mm (max)
α
0° (min)
8° (max)
© Andigilog, Inc. 2006
- 17 www.andigilog.com
August 2006 - 70A04010
Preliminary Specification – Subject to change without notice
Preliminary Specification – Subject to change without notice
Detail
A
aSC7511
M8 Package – 8-Lead MSOP Package Dimensions
Pb-Free Package
9° (min)
15°
(max)
β
0.65mm BSC
0.525mm
BSC
Detail
B
4.75mm (min)
5.05mm (max)
2.90mm (min)
3.10mm (max)
α 0° (min)
6° (max)
γ
0.25mm (min)
0.40mm (max)
Section A
0° (min)
6° (max)
0.40mm (min)
0.70mm (max)
0.95mm BSC
0.13mm (min)
0.23mm (max)
0.13mm (min)
0.18mm (max)
Detail
B
2.85mm (min)
3.05mm (max)
0.25mm (min)
0.35mm (max)
0.78mm (min)
0.94mm (max)
1.10mm (max)
2.85mm (min)
3.05mm (max)
A
A
0.10m
m
0.25mm (min)
0.40mm (max)
0.05mm (min)
0.15mm (max)
2.90mm (min)
3.10mm (max)
© Andigilog, Inc. 2006
- 18 www.andigilog.com
2.90mm (min)
3.10mm (max)
4.75mm (min)
5.05mm (max)
August 2006 - 70A04010
aSC7511
Data Sheet Classifications
Preliminary Specification
This classification is shown on the heading of each page of a specification for products that are either under
development (design and qualification), or in the formative planning stages. Andigilog reserves the right to
change or discontinue these products without notice.
New Release Specification
This classification is shown on the heading of the first page only of a specification for products that are either
under the later stages of development (characterization and qualification), or in the early weeks of release to
production. Andigilog reserves the right to change the specification and information for these products without
notice.
Fully Released Specification
Fully released datasheets do not contain any classification in the first page header. These documents contain
specification on products that are in full production. Andigilog will not change any guaranteed limits without
written notice to the customers. Obsolete datasheets that were written prior to January 1, 2001 without any
header classification information should be considered as obsolete and non-active specifications, or in the best
case as Preliminary Specifications.
®
Andigilog is a Registered Trademark of Andigilog, Inc.
Pentium™ is a trademark of Intel Corporation
Athlon™ and Duron™ are trademarks of AMD Corporation
LIFE SUPPORT POLICY
ANDIGILOG'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF
ANDIGILOG, INC. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b)
support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in
the labeling, can be reasonably expected to result in a significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
Andigilog, Inc.
8380 S. Kyrene Rd., Suite 101
Tempe, Arizona 85284
Tel: (480) 940-6200
Fax: (480) 940-4255
© Andigilog, Inc. 2006
- 19 www.andigilog.com
August 2006 - 70A04010