Agilent HMMC-3104 DC-16 GHz Packaged Divide-by-4 Prescaler HMMC-3104-TR1 - 7” diameter reel/500 each HMMC-3104-BLK - Bubble strip/10 each Data Sheet Description The HMMC-3104 is a packaged GaAs HBT MMIC prescaler which offers dc to 16 GHz frequency translation for use in communications and EW systems incorporating high– frequency PLL oscillator circuits and signal–path down conversion applications. The prescaler provides a large input power sensitivity window and low phase noise. Features • Wide Frequency Range: 0.2–16 GHz • High Input Power Sensitivity: On–chip pre– and post–amps -20 to +10 dBm (1–10 GHz) -15 to +10 dBm (10–12 GHz) -10 to +5 dBm (12–15 GHz) • Pout: +6 dBm (0.99 Vp-p) will drive ECL • Low Phase Noise: -153 dBc/Hz @ 100 kHz Offset • (+) or (-) Single Supply Bias with wide range: 4.5 to 6.5 V • Differential I/0 with on–chip W matching 50W Package Type: SOIC-8 Plastic Package Dimensions: 4.9 x 3.9 mm typ Package Thickness: 1.55 mm typ Lead Pitch: 1.25 mm nom Lead Width: 0.42 mm nom Absolute Maximum Ratings1 (@ T = +25 °C, unless otherwise stated) A Symbol Parameters/Conditions VCC Bias Supply Voltage VEE Bias Supply Voltage |VCC - VEE| Bias Supply Delta VLogic Logic Threshold Voltage Pin(CW) Min Max Units +7 volts -7 volts +7 volts VCC -1.2 volts CW RF Input Power +10 dBm VRFin DC Input Voltage (@ RFin or RFin Ports) VCC ±0.5 volts TBS2 Backside Operating Temperature -40 +85 °C Tst Storage Temperature -65 +165 °C Tmax Maximum Assembly Temperature (60 seconds max) 310 °C VCC - 1.5 Notes: 1. Operation in excess of any parameter limit (except T BS) may cause permanent damage to the device. 2. MTTF >1 x 10 6 hours @ T BS <85°C. Operation in excess of maximum operating temperature (T BS ) will degrade MTTF. DC Specifications/Physical Properties (TA= +25 °C, VCC - VEE = 5.0 volts, unless otherwise listed) Symbol Parameters/Conditions Min Typ Max Units VCC - VEE Operating bias supply difference1 4.5 5.0 6.5 volts |ICC| or |IEE| Bias supply current 68 80 92 mA VRFin(q) VRFout(q) Quiescent dc voltage appearing at all RF ports VLogic Nominal ECL Logic Level (VLogic contact self-bias voltage, generated on-chip) VCC VCC -1.45 VCC -1.35 volts VCC -1.25 volts Notes: 1. Prescaler will operate over full specified supply voltage range. VCC or VEE not to exceed limits specified in Absolute Maximum Ratings section. 2 RF Specifications (TA= +25 °C, Z0 = 50 W, VCC - VEE = 5.0 volts) Symbol Parameters/Conditions Min Typ Max Units ƒin(max) Maximum input frequency of operation 16 18 ƒin(min) Minimum input frequency of operation1 (Pin = -10 dBm) 0.2 ƒSel-Osc. Output Self-Oscillation Frequency2 3.4 Pin @ dc, (Square-wave input) -15 >-25 +10 dBm @ ƒin = 500 MHz, (Sine-wave input) -15 >-20 +10 dBm ƒin = 1 to 8 GHz -15 >-25 +10 dBm ƒin = 8 to 10 GHz -10 >-15 +10 dBm ƒin = 10 to 12 GHz -4 >-10 +4 dBm GHz 0.5 GHz GHz RL Small-Signal Input/Output Return Loss (@ ƒin <10 GHz) 15 dB S12 Small-Signal Reverse Isolation (@ ƒin <10 GHz) 30 dB jN SSB Phase noise (@ Pin = 0 dBm, 100 KHz offset from a ƒout = 1.2 GHz Carrier) -153 dBc/Hz Jitter Input signal time variation @ zero-crossing (ƒin = 10 GHz, Pin = -10 dBm) 1 ps Tr or Tf Output transition time (10% to 90% rise/fall time) 70 ps Pout3 @ ƒout < 1 GHz 4 6 dBm @ ƒout = 2.5 GHz 3.5 5.5 dBm @ ƒout = 3.0 GHz 0 2.0 dBm @ ƒout < 1 GHz 0.99 volts @ ƒout = 2.5 GHz 0.94 volts @ ƒout = 3.0 GHz 0.63 volts ƒout power level appearing at RFin or RFout (@ ƒin 10 GHz, Unused RFout or RFout unterminated) -40 dBm ƒout power level appearing at RFin or RFout (@ ƒin 10 GHz, Both RFout or RFout unterminated) -47 dBm Pfeedthru Power level of ƒin appearing at RFout or RFout (@ ƒin = 12 GHz, Pin = 0 dBm, Referred to Pin (ƒin)) -23 dBc H2 Second harmonic distortion output level (@ ƒout = 3.0 GHz, Referred to Pout (ƒout)) -25 dBc |Vout(p-p)|4 PSpitback Notes: 1. For sine–wave input signal. Prescaler will operate down to dc for square–wave input signal. Min. divide frequency limited by input slew rate. 2. Prescaler can exhibit this output signal under bias in the absence of an RF input signal. This condition can be eliminated by use of the Input dc offset technique described on page 4. 3. Fundamental of output square wave’s Fourier Series. 4. Square wave amplitude calculated from Pout. 3 Applications The HMMC-3104 is designed for use in high frequency communications, microwave instrumentation, and EW radar systems where low phase–noise PLL control circuitry or broad– band frequency translation is required. For positive supply operation, VCC pins are nominally biased at any voltage in the +4.5 to +6.5 volt range with pin 8 (VEE) grounded. For negative bias operation VCC pins are typically grounded and a negative voltage between - 4.5 to - 6.5 volts is applied to pin 8 (VEE). Operation The device is designed to operate when driven with either a single–ended or differential sinusoidal input signal over a 200 MHz to 16 GHz bandwidth. Below 200 MHz the prescaler input is “slew–rate” limited, requiring fast rising and falling edge speeds to properly divide. The device will operate at frequencies down to dc when driven with a square–wave. ac–Coupling and dc–Blocking All RF ports are dc connected on–chip to the VCC contact through on–chip 50W resistors. Under any bias conditions where VC C is not dc grounded the RF ports should be ac coupled via series capacitors mounted on the PC– board at each RF port. Only under bias conditions where VCC is dc grounded (as is typical for negative bias supply operation) may the RF ports be direct coupled to adjacent circuitry or in some cases, such as level shifting to subsequent stages. In the latter case the package heat sink may be “floated” and bias applied as the difference between VCC and VEE. Due to the presence of an off– chip RF–bypass capacitor inside the package (connected to the VCC contact on the device), and the unique design of the device itself, the component may be biased from either a single positive or single negative supply bias. The backside of the package is not dc connected to any dc bias point on the device. VCC VCC 6 Input dc Offset If an RF signal with sufficient signal to noise ratio is present at the RF input lead, the prescaler will operate and provide a divided output equal the input frequency divided by the divide modulus. Under certain “ideal” conditions where the input is well matched at the right input frequency, the component may “self–oscillate”, especially under small signal input powers or with only noise present at the input. This “self–oscillation” will produce an undesired output signal also known as a false trigger. To prevent false triggers or self– oscillation conditions, apply a 20 to 100 mV dc offset voltage between the RFi n and RFi n ports. This prevents noise or spurious low level signals from triggering the divider. Adding a 10KW resistor between the unused RF input to a contact point at the VEE potential will result in an offset of » 25mV between the RF inputs. Note, however, that the input sensitivity will be reduced slightly due to the presence of this offset. VCC 4 2 Vcc Vcc 150p Vcc By poss 50 IN IN 5 7 50 IN OUT ÷ IN OUT 3 OUT OUT Pin 1 Vee SOIC8 w/Backside GND 8 VEE Figure 1. Simplified Schematic 4 50 50 Vpwr sel Assembly Notes Independent of the bias applied to the package, the backside of the package should always be connected to both a good RF ground plane and a good thermal heat sinking region on the PC–board to optimize performance. For single–ended output operation the unused RF output lead should be terminated into 50W to a contact point at the VCC potential or to RF ground through a dc blocking capacitor. A minimum RF and thermal PC board contact area equal to or greater than 2.67 x 1.65 mm (0.105" x 0.065") with eight 0.020" diameter plated–wall thermal vias is recommended. MMIC ESD precautions, handling considerations, die attach and bonding methods are critical factors in successful GaAs MMIC performance and reliability. Agilent application note #54, “GaAs MMIC ESD, Die Attach and Bonding Guidelines” provides basic information on these subjects. Moisture Sensitivity Classification: Class 1, per JESD22-A112-A. Additional References: PN #18, “HBT Prescaler Evaluation Board.” Notes: - All dimensions in millimeters. - Refer to JEDEC Outline MS-012 for additional tolerances. Symbol Min Max A 1.35 1.75 A1 0.0 .25 B 0.33 0.51 C 0.19 .025 D 4.80 5.00 E 3.80 4.00 e Figure 2. Package & Dimensions V CC (+4 .5 to +6 .5 vo lts) 1.27 BSC H 5.80 6.20 L 0.40 1.27 a 0° 8° VCC RFin VEE 9618 HMMC-3104 Exposed heat slug area on pkg bottom = 2.67 x 1.65 ~ 1 µ f Mon o b lock - Exposed heat sink on package bottom must C apacito r be soldered to PCB RF ground plane. To operate component from a negative supply, ground each VCCconnection and supply VEE with a negative voltage (- 4.5 to - 6.5v) bypassed to ground with ~ 1 mf capacitor. RFin VCC RFout VCC RFout Exposed heat sink on package bottom must be soldered to PCB RF ground. Figure 3. Assembly Diagram (Single-supply, Positive-bias Configuration shown) 5 - RFout should be terminated in 50Ω to ground. (dc blocking capacitor required for positive bias configuration.) Supplemental Data 20 VCC - VEE = +5 V, TA = 25 C INPUT POWER, Pin (dBm) 10 0 -10 -20 -30 -40 0 2 4 6 8 10 12 14 16 18 20 INPUT FREQUENCY, Äin (GHz) Figure 4. Typical Input Sensitivity Window Figure 5. Typical Supply Current & VLogic vs. Supply Voltage Figure 6. Typical Output Voltage Waveform Figure 7. HMMC-3104 Output Power vs. Output Frequency ƒ out (GHz) Figure 8. TypicalPhase Noise Performance Figure 9. Typical “Spitback” Power P(ƒ out) appearing at RF Input Port 6 Device Orientation Reel Tape User Feed Direction Cover Tape Tape Dimensions and Product Orientation 2.0 0.05 See Note 6 1.5+0.1/-0.0 4.0 See Note 1 A 0.30 0.05 1.75 R0.3 MAX. 5.5 0.05 See Note 6 Bo Ko Ao R0.5 Typical 1.5 MIN SECTION A-A A Ao = 6.4mm 8.0 Bo = 5.2 mm Ko =2.1 mm Notes: 1. 10 sprocket hole pitch cumulative tolerance: 0.2mm. 2. Camber not to exceed 1mm in 100mm. 3. Material: Black Conductive Advantek Polystyrene. 4. Ao and Bo measured on a plane 0.3mm above the bottom of the pocket. 5. Ko measured from a plane on the inside bottom of the pocket to the top surface of the carrier. 6. Pocket position relative to sprocket hole measured as true position of pocket, not pocket hole. 7 12.0 0.3 www.agilent.com/ semiconductors For product information and a complete list of distributors, please go to our web site. For technical assistance call: Americas/Canada: +1 (800) 235-0312 or (916) 788-6763 Europe: +49 (0) 6441 92460 China: 10800 650 0017 Hong Kong: (+65) 6756 2394 India, Australia, New Zealand: (+65) 6755 1939 Japan: (+81 3) 3335-8152(Domestic/International), or 0120-61-1280(Domestic Only) Korea: (+65) 6755 1989 Singapore, Malaysia, Vietnam, Thailand, Philippines, Indonesia: (+65) 6755 2044 Taiwan: (+65) 6755 1843 Data subject to change. Copyright © 2003 Agilent Technologies, Inc. Obsoletes: 5988-6162EN November 9, 2004 5989-0198EN