LINEAR LTC2902-2IGN

LTC2902
Programmable Quad Supply
Monitor with Adjustable Reset Timer
and Supply Tolerance
DESCRIPTIO
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FEATURES
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Simultaneously Monitors Four Supplies
16 User Selectable Combinations of 5V, 3.3V, 3V,
2.5V, 1.8V, 1.5V and/or ±Adjustable Voltage
Thresholds
Guaranteed Threshold Accuracy: ±1.5% of Monitored
Voltage Over Temperature
Selectable Supply Tolerance: 5%, 7.5%,
10%, 12.5% Below Monitored Voltage
Low Supply Current: 43µA Typ
Adjustable Reset Time
RESET Disable Pin for Margining Applications
Open-Drain RST Output (LTC2902-1)
Push-Pull RST Output (LTC2902-2)
Individual Nondelayed Monitor Outputs for Each Supply
Power Supply Glitch Immunity
Guaranteed RESET for VCC ≥ 1V
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APPLICATIO S
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The reset delay time is adjustable using an external
capacitor. Tight voltage threshold accuracy and glitch
immunity ensure reliable reset operation without false
triggering. The RST output is guaranteed to be in the
correct state for VCC down to 1V and may be disabled
during supply margin testing. The LTC2902-1 features
an open-drain RST output, while the LTC2902-2 has a
push-pull RST output.
The 43µA supply current makes the LTC2902 ideal for power
conscious systems and the part may be configured to
monitor less than four inputs. The LTC2902-1/LTC2902-2
are available in the 16-lead narrow SSOP package.
Desktop and Notebook Computers
Multivoltage Systems
Telecom Equipment
Portable Battery-Powered Equipment
Network Servers
, LTC and LT are registered trademarks of Linear Technology Corporation.
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The LTC®2902 is a programmable supply monitor for systems with up to four supply voltages. One of 16 preset or
adjustable voltage monitor combinations can be selected
using an external resistor divider connected to the program pin. The preset voltage thresholds are digitally programmable to 5%, 7.5%, 10% or 12.5% below the nominal operating voltage, and are accurate to 1.5% over temperature. All four voltage comparator outputs are connected to separate pins for individual supply monitoring.
TYPICAL APPLICATIO
Quad Supply Monitor with Adjustable Tolerance (5V, 3.3V, 2.5V, 1.8V)
5V
3.3V
DC/DC
CONVERTER
SYSTEM
LOGIC
2.5V
1.8V
3
13
R3
POWER
10k
V4
GOOD
2
V1
COMP1
16
COMP2
14
1
V2
COMP3
15
LTC2902-2 COMP4
6
12
VREF
RST
8
RDIS
MARGIN
7
T0
TOLERANCE = 5%
11
9
VPG
T1
GND
CRT
tRST = 216ms
10
5
CRT
47nF
2902 TA01
4
C1
0.1µF
C2
0.1µF
R1
59k
1%
R2
40.2k
1%
V3
2902f
1
LTC2902
W W
W
AXI U
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ABSOLUTE
RATI GS
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PACKAGE/ORDER I FOR ATIO
(Notes 1, 2, 3)
V1, V2, V3, V4, VPG ..................................... – 0.3V to 7V
RST (LTC2902-1)........................................ – 0.3V to 7V
RST (LTC2902-2).......................... – 0.3V to (V2 + 0.3V)
COMPX, RDIS ............................................. – 0.3V to 7V
T0, T1 .......................................... – 0.3V to (VCC + 0.3V)
CRT ............................................. – 0.3V to (VCC + 0.3V)
VREF ............................................. – 0.3V to (VCC + 0.3V)
Reference Load Current (IVREF) ............................ ±1mA
V4 Input Current (– ADJ Mode) ............................ –1mA
Operating Temperature Range
LTC2902-1C/LTC2902-2C ....................... 0°C to 70°C
LTC2902-1I/LTC2902-2I .................... –40°C to 85°C
Storage Temperature Range .................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................... 300°C
ORDER PART
NUMBER
TOP VIEW
COMP3
1
16 COMP2
COMP1
2
15 COMP4
V3
3
14 V2
V1
4
13 V4
CRT
5
12 VREF
RST
6
11 VPG
T0
7
10 GND
RDIS
8
9
LTC2902-1CGN
LTC2902-2CGN
LTC2902-1IGN
LTC2902-2IGN
GN16 PART MARKING
T1
29021
29022
29021I
29022I
GN PACKAGE
16-LEAD PLASTIC SSOP
TJMAX = 125°C, θJA = 130°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, unless otherwise noted. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VRT50
5V, 5% Reset Threshold
5V, 7.5% Reset Threshold
5V, 10% Reset Threshold
5V, 12.5% Reset Threshold
V1 Input Threshold
●
●
●
●
4.600
4.475
4.350
4.225
4.675
4.550
4.425
4.300
4.750
4.625
4.500
4.375
V
V
V
V
VRT33
3.3V, 5% Reset Threshold
3.3V, 7.5% Reset Threshold
3.3V, 10% Reset Threshold
3.3V, 12.5% Reset Threshold
V1, V2 Input Threshold
●
●
●
●
3.036
2.954
2.871
2.789
3.086
3.003
2.921
2.838
3.135
3.053
2.970
2.888
V
V
V
V
VRT30
3V, 5% Reset Threshold
3V, 7.5% Reset Threshold
3V, 10% Reset Threshold
3V, 12.5% Reset Threshold
V2 Input Threshold
●
●
●
●
2.760
2.685
2.610
2.535
2.805
2.730
2.655
2.580
2.850
2.775
2.700
2.625
V
V
V
V
VRT25
2.5V, 5% Reset Threshold
2.5V, 7.5% Reset Threshold
2.5V, 10% Reset Threshold
2.5V, 12.5% Reset Threshold
V2, V3 Input Threshold
●
●
●
●
2.300
2.238
2.175
2.113
2.338
2.275
2.213
2.150
2.375
2.313
2.250
2.188
V
V
V
V
VRT18
1.8V, 5% Reset Threshold
1.8V, 7.5% Reset Threshold
1.8V, 10% Reset Threshold
1.8V, 12.5% Reset Threshold
V3, V4 Input Threshold
●
●
●
●
1.656
1.611
1.566
1.521
1.683
1.638
1.593
1.548
1.710
1.665
1.620
1.575
V
V
V
V
VRT15
1.5V, 5% Reset Threshold
1.5V, 7.5% Reset Threshold
1.5V, 10% Reset Threshold
1.5V, 12.5% Reset Threshold
V3, V4 Input Threshold
●
●
●
●
1.380
1.343
1.305
1.268
1.403
1.365
1.328
1.290
1.425
1.388
1.350
1.313
V
V
V
V
VRTA
ADJ, 5% Reset Threshold
ADJ, 7.5% Reset Threshold
ADJ, 10% Reset Threshold
ADJ, 12.5% Reset Threshold
V3, V4 Input Threshold
●
●
●
●
0.492
0.479
0.466
0.453
0.500
0.487
0.473
0.460
0.508
0.494
0.481
0.467
V
V
V
V
2902f
2
LTC2902
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, unless otherwise noted. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
VRTAN
– ADJ Reset Threshold
V4 Input Threshold
●
VCC
Minimum Internal Operating Voltage
RST, COMPX in Correct Logic State;
VCC Rising Prior to Program
VCCMINP
Minimum Required for Programming
VCCMINC
Minimum Required for Comparators
VREF
Reference Voltage
– 18
0
18
mV
●
1
V
VCC Rising
●
2.42
V
VCC Falling
●
2.32
V
VCC ≥ 2.3V, IVREF = ±1mA, CREF ≤ 1000pF
T0 Low, T1 Low
T0 Low, T1 High
T0 High, T1 Low
T0 High, T1 High
●
●
●
●
1.192
1.160
1.128
1.096
1.228
1.195
1.163
1.130
V
V
V
V
VCC ≥ VCCMINP
●
0
VREF
V
1.210
1.178
1.146
1.113
UNITS
VPG
Programming Voltage Range
IVPG
VPG Input Current
VPG = VREF
●
±20
nA
IV1
V1 Input Current
V1 = 5V, IVREF = 12µA, (Note 4)
●
43
75
µA
IV2
V2 Input Current
V2 = 3.3V
●
0.8
2
µA
IV3
V3 Input Current
V3 = 2.5V
V3 = 0.55V (ADJ Mode)
●
0.52
1.2
15
µA
nA
V4 = 1.8V
V4 = 0.55V (ADJ Mode)
V4 = –0.05V (–ADJ Mode)
●
●
●
0.34
–15
–15
0.8
15
15
µA
nA
nA
IV4
V4 Input Current
–15
ICRT(UP)
CRT Pull-Up Current
VCRT = 0V
●
–1.4
–2
–2.6
µA
ICRT(DN)
CRT Pull-Down Current
VCRT = 1.3V
●
10
20
30
µA
tRST
Reset Time-Out Period
CRT = 1500pF
●
5
7
9
ms
tUV
VX Undervoltage Detect to RST or COMPX
VX Less Than Reset Threshold VRTX
by More Than 1%
VOL
Output Voltage Low RST, COMPX
ISINK = 2.5mA; V1 = 3V, V2 = 3V;
V3, V4 = 0V; VPG = 0V
●
0.15
0.4
V
ISINK = 100µA; V2 = 1V; V1, V3, V4 = 0V
ISINK = 100µA; V1 = 1V; V2, V3, V4 = 0V
●
●
0.05
0.05
0.3
0.3
V
V
µs
150
VOH
Output Voltage High RST, COMPX (Note 5)
ISOURCE = 1µA
●
V2 – 1
V
VOH
Output Voltage High RST (LTC2902-2)
(Note 6)
ISOURCE = 200µA
●
0.8 • V2
V
VCC = 3.3V to 5.5V
●
Digital Inputs T0, T1, RDIS
VIL
T0, T1 Low Level Input Voltage
VIH
T0, T1 High Level Input Voltage
VCC = 3.3V to 5.5V
●
IINTOL
T0, T1 Input Current
T0 = 0V, T1 = VCC
●
VIL
RDIS Input Threshold Low
VCC = 3.3V to 5.5V
●
VIH
RDIS Input Threshold High
VCC = 3.3V to 5.5V
●
IRDIS
RDIS Pull-Up Current
VRDIS = 0V
Note 1: Absolute Maximum Ratings are those values beyond which the life of
a device may be impaired.
Note 2: All voltage values are with respect to GND.
Note 3: The greater of V1, V2 is the internal supply voltage (VCC).
Note 4: Under static no-fault conditions, V1 will necessarily supply quiescent
current. If at any time V2 is larger than V1, V2 must be capable of supplying
the quiescent current, programming (transient) current and reference load
current.
0.3VCC
V
±1
µA
1.6
V
0.7VCC
V
±0.1
0.4
V
–10
µA
Note 5: The output pins RST and COMPX have internal pull-ups to V2 of
typically 6µA. However, external pull-up resistors may be used when faster
rise times are required or for VOH voltages greater than V2.
Note 6: The push-pull RST output pin on the LTC2902-2 is actively pulled up
to V2.
2902f
3
LTC2902
TEST CIRCUITS
V1
V2
V3
V4
RST
LTC2902-1 OR COMPX
LTC2902-1
V1
V2
V3
V4
ISOURCE
1µA
V1
V2
V3
V4
ISINK
2.5mA,
100µA
RST
OR COMPX
2902 F02
2902 F01
Figure 1. RST, COMPX VOH Test
LTC2902-2 RST
ISOURCE
200µA
2902 F03
Figure 2. RST, COMPX VOL Test
Figure 3. Active Pull-Up RST VOH Test
WU
W
TI I G DIAGRA
VX Monitor Timing
VRTX
VX
tRST
tUV
1.5V
RST
2902 TD
COMPX
U W
TYPICAL PERFOR A CE CHARACTERISTICS
3.3V Threshold Voltage
vs Temperature
5V Threshold Voltage
vs Temperature
3.135
THRESHOLD VOLTAGE, VRT33 (V)
THRESHOLD VOLTAGE, VRT50 (V)
3.100
5%
4.65
4.60
4.55
7.5%
4.50
4.45
10%
4.40
4.35
12.5%
3.065
3.030
7.5%
2.995
2.960
2.925
10%
2.890
2.855
12.5%
80
100
2902 G01
2.785
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
2.815
5%
2.780
2.745
7.5%
2.710
2.675
10%
2.640
2.605
12.5%
2.570
2.820
4.30
4.25
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
2.850
5%
THRESHOLD VOLTAGE, VRT30 (V)
4.75
4.70
3V Threshold Voltage
vs Temperature
80
100
2902 G02
2.535
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
80
100
2902 G03
2902f
4
LTC2902
U W
TYPICAL PERFOR A CE CHARACTERISTICS
2.5V Threshold Voltage
vs Temperature
1.8V Threshold Voltage
vs Temperature
1.710
THRESHOLD VOLTAGE, VRT25 (V)
2.350
THRESHOLD VOLTAGE, VRT18 (V)
5%
2.325
2.300
7.5%
2.275
2.250
10%
2.225
2.200
2.175
12.5%
2.150
2.125
2.100
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
80
1.425
5%
1.685
1.660
7.5%
1.635
1.610
10%
1.585
1.560
12.5%
1.535
1.510
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
100
2902 G04
80
1.305
12.5%
1.285
10%
0.473
0.468
12.5%
80
100
VREF vs Temperature
1.228
0.012
5%
1.204
1.192
0.006
7.5%
1.180
VREF (V)
THRESHOLD VOLTAGE, VRTAN (V)
7.5%
0.483
0
1.168
1.156
10%
1.144
–0.006
1.132
1.112
–0.012
0.458
12.5%
1.108
0.453
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
80
100
–0.018
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
2902 G07
80
100
1.096
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
2902 G08
IV1 vs Temperature
V1 = 5V
1.0 V2 = 3.3V
V3 = 2.5V
0.9
V4 = 1.8V
0.8
60
1.1
0.7
IV3 (µA)
V1 = 5V
1.4 V2 = 3.3V
V3 = 2.5V
1.3
V4 = 1.8V
1.2
IV2 (µA)
V1 = 5V
90 V2 = 3.3V
V3 = 2.5V
80
V4 = 1.8V
70
1.1
40
1.0
0.9
0.6
0.5
30
0.8
0.4
20
0.7
0.3
10
0.6
0.2
0.5
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
0.1
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
0
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
80
100
2902 G10
100
IV3 vs Temperature
1.5
50
80
2902 G09
IV2 vs Temperature
100
IV1 (µA)
10%
1.325
1.216
0.493
0.463
1.345
2902 G06
5%
0.498
0.478
7.5%
1.365
1.265
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
100
0.018
0.488
1.385
– ADJ Threshold Voltage
vs Temperature
0.508
0.503
5%
1.405
2902 G05
ADJ Threshold Voltage
vs Temperature
THRESHOLD VOLTAGE, VRTA (V)
THRESHOLD VOLTAGE, VRT15 (V)
2.375
1.5V Threshold Voltage
vs Temperature
80
100
2902 G11
80
100
2902 G12
2902f
5
LTC2902
U W
TYPICAL PERFOR A CE CHARACTERISTICS
0.6
0.5
0.4
0.3
0.2
0.1
0
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
80
100
TA = 25°C
400
350
RESET OCCURS
ABOVE CURVE
300
250
200
150
100
50
0
0.1
1
10
100
RESET COMPARATOR OVERDRIVE VOLTAGE (% OF VRTX)
3
2
1
0
120
100
80
60
40
20
0
1
10
100
0.1
RESET COMPARATOR OVERDRIVE VOLTAGE (% OF VRTX)
2902 G25
Reset Time-Out Period
vs Capacitance
10
CRT = 1500pF
8.4 (SILVER MICA)
7.9
7.4
6.4
5.9
5.4
4.9
–60 –40 –20 0 20 40 60
TEMPERATURE (°C)
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
V1 (V)
1
80
100
10m
1m
100µ
10p
3.5
V2 = 3V
V1 = 5V
3.0
2.5
85°C
– 40°C
2.5
VOL (V)
VOL = 0.2V
3
VOH (V)
2.0
4
1µ
V1 = 5V
V2 = 3V
V3 = 2.5V
V4 = 1V
25°C
VOL = 0.4V
5
100n
RST High Level Output Voltage
vs Output Source Current
(LTC2902-2)
3.0
6
10n
1n
CRT (FARAD)
2902 G17
RST, COMPX Voltage Output Low
vs Output Sink Current
TA = 25°C
7
100p
2902 G16
RST, COMPX ISINK
vs Supply Voltage
8
TA = 25°C
100m
6.9
2902 G15
ISINK (mA)
140
RESET TIME-OUT PERIOD, tRST (sec)
RESET TIME-OUT PERIOD, tRST (ms)
V1 = V2 = V3 = V4
10k PULL-UP FROM RST TO V1
TA = 25°C
0
RESET OCCURS
ABOVE CURVE
160
8.9
5
9
180
Reset Time-Out Period
vs Temperature
RST Output Voltage
vs V1, VPG = 0V
4
TA = 25°C
200
2902 G14
2902 G13
RST OUTPUT VOLTAGE (V)
TYPICAL TRANSIENT DURATION (µs)
TYPICAL TRANSIENT DURATION (µs)
IV4 (µA)
220
450
1.0
V1 = 5V
0.9 V2 = 3.3V
V3 = 2.5V
0.8
V4 = 1.8V
0.7
10
Typical Transient Duration
vs Comparator Overdrive (V3, V4)
Typical Transient Duration
vs Comparator Overdrive (V1, V2)
IV4 vs Temperature
1.5
1.0
2.0
– 40°C
1.5
25°C
1.0
85°C
2
0.5
0.5
1
0
0
1
2
3
4
V1 OR V2 (V)
5
6
2902 G18
0
0
0
10
20
30
50 60
ISINK (mA)
40
70
80
90
2902 G19
0
0.5
1
1.5
ISOURCE (mA)
2
2.5
2902 G20
2902f
6
LTC2902
U W
TYPICAL PERFOR A CE CHARACTERISTICS
COMPX Propagation Delay vs
Input Overdrive Above Threshold
COMPX Pull-Up Current
vs V2 (COMPX Held at 0V)
20
250
TA = 25°C
COMPX PROPAGATION DELAY (µs)
18
PULL-UP CURRENT (µA)
16
14
12
10
8
6
4
2
0
1
1.5
2
2.5
4
3
3.5
V2 (V)
4.5
200
150
100
V1, V2
50
V3, V4
0
5
TA = 25°C
1000
10
100
INPUT OVERDRIVE ABOVE THRESHOLD (mV)
2902 G22
2902 G21
RST Pull-Up Current vs V2
(LTC2902-1)
20
RST Pull-Up Current vs V2
(LTC2902-2)
6
TA = 25°C
TA = 25°C
18
5
PULL-UP CURRENT (mA)
PULL-UP CURRENT (µA)
16
14
12
10
8
VRT33
6
VRT30
VRT25
4
4
3
VRT33
VRT30
2
VRT25
1
2
0
0
2
2.5
3
3.5
V2 (V)
4
4.5
5
2902 G23
2
2.5
3
3.5
V2 (V)
4
4.5
5
2902 G24
U
U
U
PI FU CTIO S
COMP3 (Pin 1): Comparator Output 3. Nondelayed, active
high logic output with weak pull-up to V2. Pulls high when
V3 is above reset threshold. May be pulled greater than V2
using external pull-up.
V1 (Pin 4): Voltage Input 1. Select from 5V or 3.3V. See
Table 1 for details. The greater of (V1, V2) is also VCC for
the chip. Bypass this pin to ground with a 0.1µF (or
greater) capacitor.
COMP1 (Pin 2): Comparator Output 1. Nondelayed, active
high logic output with weak pull-up to V2. Pulls high when
V1 is above reset threshold. May be pulled greater than V2
using external pull-up.
CRT (Pin 5): Reset Delay Time Programming Pin. Attach
an external capacitor (CRT) to GND to set a reset delay time
of 4.6ms/nF. Leaving the pin open generates a minimum
delay of approximately 50µs. A 47nF capacitor will generate a 216ms reset delay time.
V3 (Pin 3): Voltage Input 3. Select from 2.5V, 1.8V, 1.5V
or ADJ. See Table 1 for details.
2902f
7
LTC2902
U
U
U
PI FU CTIO S
RST (Pin 6): Reset Logic Output. Active low with weak
pull-up to V2 (LTC2902-1) or active pull-up to V2
(LTC2902-2). Pulls low when any voltage input is below
the reset threshold and held low for programmed delay
time after all voltage inputs are above threshold. May be
pulled above V2 using an external pull-up (LTC2902-1
only).
T0 (Pin 7): Digital Input for Supply Tolerance Selection
(5%, 7.5%, 10% or 12.5%). Used in conjunction with T1
(Pin 9). See Applications Information for tolerance selection chart (Table 4).
RDIS (Pin 8): Digital Input for RST Disable. A low input on
this pin forces the RST output to V2 (or pull-up voltage).
Useful for determining supply margins without issuing
reset command to processor. A weak internal pull-up
allows pin to be left floating for normal monitor operation.
T1 (Pin 9): Digital Input for Supply Tolerance Selection
(5%, 7.5%, 10% or 12.5%). Used in conjunction with T0
(Pin 7). See Applications Information for tolerance selection chart (Table 4).
GND (Pin 10): Ground.
VPG (Pin 11): Voltage Threshold Combination Select
Input. Connect to an external 1% resistive divider between VREF and GND to select 1 of 16 combinations of
preset and/or ±adjustable voltage thresholds (see Table␣ 1).
Do not add capacitance on the VPG pin.
VREF (Pin 12): Buffered Reference Voltage. A 1.210V
nominal reference used for programming voltage (VPG)
and for the offset of negative adjustable applications. The
buffered reference can source and sink up to 1mA. The
reference can drive a bypass capacitor of up to 1000pF
without oscillation.
V4 (Pin 13): Voltage Input 4. Select from 1.8V, 1.5V, ADJ
or – ADJ. See Table 1 for details.
V2 (Pin 14): Voltage Input 2. Select from 3.3V, 3V or 2.5V.
See Table 1 for details. The greater of (V1, V2) is also VCC
for chip. Bypass this pin to ground with a 0.1µF (or greater)
capacitor. All logic outputs (COMP1, COMP2, COMP3,
COMP4) are weakly pulled up to V2. RST is weakly pulled
up to V2 in the LTC2902-1 and RST is actively pulled up to
V2 in the LTC2902-2.
COMP4 (Pin 15): Comparator Output 4. Nondelayed,
active high logic output with weak pull-up to V2. Pulls high
when V4 is above reset threshold. May be pulled greater
than V2 using external pull-up.
COMP2 (Pin 16): Comparator Output 2. Nondelayed,
active high logic output with weak pull-up to V2. Pulls high
when V2 is above reset threshold. May be pulled greater
than V2 using external pull-up.
2902f
8
LTC2902
W
BLOCK DIAGRA
V1
V2
POWER
DETECT
VCC
6µA
COMP1
–
V2
2
+
V2
–
V1
4
V2
14
V3
6µA
+
COMP2
16
RESISTIVE
DIVIDER
MATRIX
3
–
V4
13
+
V2
6µA
GND
10
COMP3
–
+
VPG
11
1
A/D
V2
BUFFER
6µA
VREF
BANDGAP
REFERENCE
12
COMP4
15
BUFFER
GAIN
ADJUST
ADJUSTABLE
RESET PULSE
GENERATOR
VCC
V2 LTC2902-1
2µA
6µA
22µA
RST
10µA
6
VCC
7 T0
9 T1
5 CRT
8 RDIS
CRT
LTC2902-2
V2
RST
6
2902 DB-1
2902f
9
LTC2902
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APPLICATIO S I FOR ATIO
Power-Up
On power-up, the larger of V1 or V2 will power the drive
circuits for the RST and the COMPX pins. This ensures
that the RST and COMPX outputs will be low as soon as
V1 or V2 reaches 1V. The RST and COMPX outputs will
remain low until the part is programmed. After programming, if any one of the VX inputs is below its programmed
threshold, RST will be a logic low. Once all the VX inputs
rise above their thresholds, an internal timer is started
and RST is released after the programmed delay time. If
VCC < (V3 – 1) and VCC < 2.4V, the V3 input impedance
will be low (1kΩ typ).
Monitor Programming
The LTC2902 input voltage combination is selected by
placing the recommended resistor divider from VREF to
GND and connecting the tap point to VPG, as shown in
Figure 4. Table 1 offers recommended 1% resistor values
for the various modes. The last column in Table 1 specifies optimum VPG/VREF ratios (±0.01) to be used when
programming with a ratiometric DAC.
During power-up, once V1 or V2 reaches 2.4V (max), the
monitor enters a programming period of approximately
150µs during which the voltage on the VPG pin is sampled
and the monitor is configured to the desired input combination. Do not add capacitance to the VPG pin. Immediately
after programming, the comparators are enabled and
supply monitoring will begin.
Supply Monitoring
The LTC2902 is a low power, high accuracy programmable quad supply monitoring circuit with four nondelayed
monitor outputs, a common reset output and selectable
supply thresholds. Reset timing is adjustable using an
external capacitor. Single pin programming selects 1 of 16
input voltage monitor combinations. Two digital inputs
select one of four supply tolerances (5%, 7.5%, 10% or
12.5%). All four voltage inputs must be above predetermined thresholds for the reset not to be invoked. The
LTC2902 will assert the reset and comparator outputs
during power-up, power-down and brownout conditions
on any one of the voltage inputs.
LTC2902
12
VREF
11
VPG
10
GND
R1
1%
R2
1%
2902 F04
Figure 4. Monitor Programming
Table 1. Voltage Threshold Programming
MODE
V1 (V) V2 (V) V3 (V) V4 (V) R1 (kΩ) R2 (kΩ)
VPG
VREF
0
5.0
3.3
ADJ
ADJ
Open
Short
0.000
1
5.0
3.3
ADJ
–ADJ
93.1
9.53
0.094
2
3.3
2.5
ADJ
ADJ
86.6
16.2
0.156
3
3.3
2.5
ADJ
–ADJ
78.7
22.1
0.219
4
3.3
2.5
1.5
ADJ
71.5
28.0
0.281
5
5.0
3.3
2.5
ADJ
66.5
34.8
0.344
6
5.0
3.3
2.5
1.8
59.0
40.2
0.406
7
5.0
3.3
2.5
1.5
53.6
47.5
0.469
8
5.0
3.0
2.5
ADJ
47.5
53.6
0.531
9
5.0
3.0
ADJ
ADJ
40.2
59.0
0.594
10
3.3
2.5
1.8
1.5
34.8
66.5
0.656
11
3.3
2.5
1.8
ADJ
28.0
71.5
0.719
12
3.3
2.5
1.8
–ADJ
22.1
78.7
0.781
13
5.0
3.3
1.8
–ADJ
16.2
86.6
0.844
14
5.0
3.3
1.8
ADJ
9.53
93.1
0.906
15
5.0
3.0
1.8
ADJ
Short
Open
1.000
The inverting inputs on the V3 and/or V4 comparators are
set to 0.5V when the positive adjustable modes are selected
and with T0 and T1 low (5% tolerance) (Figure 5). The tap
point on an external resistive divider, connected between
the positive voltage being sensed and ground, is connected
to the high impedance noninverting inputs (V3, V4). The
trip voltage is calculated from:
 R3 
VTRIP = 0.5V 1 + 
 R4 
Once the resistor divider is set in the 5% tolerance mode,
there is no need to change the divider for the other
tolerance modes (7.5%, 10%, 12.5%) because the internal reference is scaled accordingly, moving the trip point
in – 2.5% increments.
2902f
10
LTC2902
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APPLICATIO S I FOR ATIO
Table 2. Suggested 1% Resistor Values for the ADJ Inputs
VTRIP
LTC2902
R3
1%
+
V3 OR V4
R4
1%
–
+
–
0.5V
5% TOLERANCE MODE
2902 F05
Figure 5. Setting the Positive Adjustable Trip Point
12
R4
1%
VREF
13 V4
R3
1%
LTC2902
–
+
VSUPPLY (V)
VTRIP (V)
R3 (kΩ)
R4 (kΩ)
12
11.25
2150
100
10
9.4
1780
100
8
7.5
1400
100
7.5
7
1300
100
6
5.6
1020
100
5
4.725
845
100
3.3
3.055
511
100
3
2.82
464
100
2.5
2.325
365
100
1.8
1.685
237
100
1.5
1.410
182
100
1.2
1.120
124
100
1
0.933
86.6
100
0.9
0.840
68.1
100
VTRIP
Table 3. Suggested 1% Resistor Values for the –ADJ Input
2902 F06
Figure 6. Setting the Negative Adjustable Trip Point
In the negative adjustable mode, the noninverting input on
the V4 comparator is connected to ground (Figure 6). The
tap point on an external resistive divider, connected between the negative voltage being sensed and the VREF pin,
is connected to the high impedance inverting input (V4).
VREF provides the necessary level shift required to operate
at ground. The trip voltage is calculated from:
 R3 
VTRIP = – VREF   ; VREF = 1.210 V
 R4 
T0,T1 Low (5% Tolerance Mode)
Once the resistor divider is set in the 5% tolerance mode,
there is no need to change the divider for the other
tolerance modes (7.5%, 10%, 12.5%) because VREF is
scaled accordingly, moving the trip point in – 2.5%
increments.
In a negative adjustable application, the minimum value
for R4 is limited by the sourcing capability of VREF (±1mA).
With no other load on VREF, R4 (minimum) is:
1.21V ÷ 1mA = 1.21kΩ
VSUPPLY (V)
VTRIP (V)
R3 (kΩ)
R4 (kΩ)
–2
–1.87
187
121
–5
–4.64
464
121
–5.2
–4.87
487
121
–10
–9.31
931
121
–12
–11.30
1130
121
Although all four supply monitor comparators have built-in
glitch immunity, bypass capacitors on V1 and V2 are
recommended because the greater of V1 or V2 is also the
VCC for the chip. Filter capacitors on the V3 and V4 inputs
are allowed.
Power-Down
On power-down, once any of the VX inputs drop below
their threshold, RST and COMPX are held at a logic low.
A logic low of 0.4V is guaranteed until both V1 and V2
drop below 1V. If the bandgap reference becomes invalid
(VCC < 2V typ), the part will reprogram once VCC rises
above 2.4V (max).
Monitor Output Rise and Fall Time Estimation
All of the outputs (RST, COMPX) have strong pull-down
capability. If the external load capacitance (CLOAD) for a
Tables 2 and 3 offer suggested 1% resistor values for
various adjustable applications.
2902f
11
LTC2902
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APPLICATIO S I FOR ATIO
particular output is known, output fall time (10% to 90%)
is estimated using:
tFALL ≈ 2.2 • RPD • CLOAD
where RPD is the on-resistance of the internal pull-down
transistor. The typical performance curve (VOL vs ISINK)
demonstrates that the pull-down current is somewhat
linear versus output voltage. Using the 25°C curve, RPD is
estimated to be approximately 40Ω. Assuming a 150pF
load capacitance, the fall time is about 13.2ns.
Although the outputs are considered to be “open-drain,”
they do have a weak pull-up capability (see COMPX or RST
Pull-Up Current vs V2 curve). Output rise time (10% to
90%) is estimated using:
tRISE ≈ 2.2 • RPU • CLOAD
where RPU is the on-resistance of the pull-up transistor.
The on-resistance as a function of the V2 voltage at room
temperature is estimated using:
RPU =
6 • 105
Ω
V2 – 1
with V2 = 3.3V, RPU is about 260k. Using 150pF for load
capacitance, the rise time is 86µs. If the output needs to
pull up faster and/or to a higher voltage, a smaller
external pull-up resistor may be used. Using a 10k pullup resistor, the rise time is reduced to 3.3µs for a 150pF
load capacitance.
The LTC2902-2 has an active pull-up to V2 on the RST
output. The typical performance curve (RST Pull-Up Current vs V2 curve) demonstrates that the pull-up current is
somewhat linear versus the V2 voltage and RPU is estimated to be approximately 625Ω. A 150pF load capacitance makes the rise time about 206ns.
Selecting the Reset Timing Capacitor
The reset time-out period is adjustable in order to accommodate a variety of microprocessor applications. The
reset time-out period, tRST, is adjusted by connecting a
capacitor, CRT, between the CRT pin and ground. The value
of this capacitor is determined by:
CRT = tRST • 217 • 10 –9
with CRT in Farads and tRST in seconds. The CRT value per
millisecond of delay can also be expressed as CRT/ms =
217 (pF/ms).
Leaving the CRT pin unconnected will generate a minimum reset time-out of approximately 50µs. Maximum
reset time-out is limited by the largest available low
leakage capacitor. The accuracy of the time-out period will
be affected by capacitor leakage (the nominal charging
current is 2µA) and capacitor tolerance. A low leakage
ceramic capacitor is recommended.
Tolerance Programming and the RESET Disable
Using the two digital inputs T0 and T1, the user can
program the global supply tolerance for the LTC2902 (5%,
7.5%, 10%, 12.5%). The larger tolerances provide more
headroom by lowering the trip thresholds.
Table 4. Tolerance Programming
T0
T1
TOLERANCE (%)
VREF (V)
Low
Low
5
1.210
Low
High
7.5
1.178
High
Low
10
1.146
High
High
12.5
1.113
Under conventional operation, RST and COMPX will go
low when VX is below its threshold. At any time, the RDIS
pin can be pulled low, overriding the reset operation and
forcing the RST pin high. This feature is useful when
determining supply margins under processor control since
the reset command will not be invoked. The RDIS pin is
connected to a weak internal pull-up to VCC (10µA typ),
allowing the pin to be left floating if unused.
Ensuring RST Valid for VCC Down to 0V (LTC2902-2)
When VCC is below 1V the RST pull-down capability is
drastically reduced. The RST pin may float to undetermined voltages when connected to high impedance (such
as CMOS logic inputs). The addition of a pull-down resistor from RST to ground will provide a path for stray charge
and/or leakage currents. The resistor value should be
small enough to provide effective pull-down without excessively loading the pull-up circuitry. Too large a value
may not pull down well enough. A 100k resistor from RST
to ground is satisfactory for most applications.
2902f
12
LTC2902
U
TYPICAL APPLICATIO S
Quad Supply Monitor, 5% Tolerance
5V, 3V, 1.8V, 12V (ADJ)
1
2
1.8V
5V
3
4
5
SYSTEM
RESET
CRT
6
7
8
COMP3
COMP2
COMP1
COMP4
V3
V2
V1 LTC2902 V4
CRT
VREF
RST
VPG
T0
GND
RDIS
T1
16
15
14
3V
13
R3
2.15M
1%
12V
VTRIP = 11.25V
12
11
R4
100k
1%
10
9
2902 TA02
5V, –5V Monitor with Unused V2, V3 Inputs Pulled
Above Trip Thresholds (5% Tolerance)
1
2
3
5V
4
5
SYSTEM
RESET
CRT
6
7
8
COMP3
COMP2
COMP1
COMP4
V3
V2
V1 LTC2902 V4
CRT
VREF
RST
VPG
T0
RDIS
GND
T1
16
15
R3
464k
1%
14
13
–5V
VTRIP = –4.64V
12
R1
R4
16.2k 121k
1%
1%
11
10
9
R2
86.6k
1%
2902 TA03
2902f
13
LTC2902
U
TYPICAL APPLICATIO S
Quad Supply Monitor with LED Undervoltage Indicators,
12.5% Tolerance, Reset Disabled
5V, 3.3V, 2.5V, 1.5V
RL1
1k
LED
RL3
1k
LED
1
2
2.5V
3
4
5V
5
6
7
CRT
RL2
1k
8
LED
COMP3
COMP2
COMP1
COMP4
V3
V2
V1 LTC2902 V4
CRT
VREF
RST
VPG
T0
GND
RDIS
T1
RL4
1k
LED
16
15
14
3.3V
13
1.5V
12
R1
53.6k
1%
11
10
9
R2
47.5k
1%
2902 TA04
2902f
14
LTC2902
U
PACKAGE DESCRIPTIO
GN Package
16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.189 – .196*
(4.801 – 4.978)
.045 ±.005
16 15 14 13 12 11 10 9
.254 MIN
.009
(0.229)
REF
.150 – .165
.229 – .244
(5.817 – 6.198)
.0165 ± .0015
.150 – .157**
(3.810 – 3.988)
.0250 TYP
RECOMMENDED SOLDER PAD LAYOUT
1
.015 ± .004
× 45°
(0.38 ± 0.10)
.007 – .0098
(0.178 – 0.249)
2 3
4
5 6
7
.053 – .068
(1.351 – 1.727)
8
.004 – .0098
(0.102 – 0.249)
0° – 8° TYP
.016 – .050
(0.406 – 1.270)
NOTE:
1. CONTROLLING DIMENSION: INCHES
INCHES
2. DIMENSIONS ARE IN
(MILLIMETERS)
.008 – .012
(0.203 – 0.305)
.0250
(0.635)
BSC
3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
GN16 (SSOP) 0502
2902f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC2902
U
TYPICAL APPLICATIO
Quad Supply Monitor with Hysteresis
5% Tolerance (Supplies Rising)
12.5% Tolerance (After RST Goes High)
5V
4
3.3V
14
3
2.5V
1.8V
13
8
12
R1
59k
1%
R2
40.2k
1%
11
10
LTC2902-1
2
COMP1
16
V2
COMP2
1
V3
COMP3
15
V4
COMP4
6
RDIS
RST
7
VREF
T0
9
T1
VPG
5
CRT
GND
V1
10k
CRT
2902 TA05
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2902f
16
Linear Technology Corporation
LT/TP 1002 2K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
 LINEAR TECHNOLOGY CORPORATION 2002