LINER LTC2939CMS

LTC2938/LTC2939
Configurable 4- and 6-Supply
Monitors with Watchdog Timer
FEATURES
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DESCRIPTION
Simultaneously Monitors Four (LTC2938) or Six
Supplies (LTC2939)
Sixteen User-Selectable Combinations of 5V, 3.3V,
2.5V, 1.8V, 1.5V, 1.2V and/or ± Adjustable Voltage
Thresholds
Guaranteed Threshold Accuracy: ±1.5%
Adjustable Reset and Watchdog Timeout
Low Supply Current: 80μA Typical
Power Supply Glitch Immunity
Guaranteed RST for VCC > 1V
High Temperature Operation to 125°C
12-Pin 4mm × 3mm DFN or 12-Lead MSOP
(LTC2938) and 16-Lead MSOP Package (LTC2939)
APPLICATIONS
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Desktop and Notebook Computers
Multivoltage Systems
Telecom Equipment
Network Servers
Automotive Control Systems
The LTC®2938/LTC2939 are configurable supply monitors
for systems with up to four or six supply voltages that need
watchdog supervision. One of sixteen preset or adjustable
voltage monitor combinations can be selected using an
external resistive divider connected to the program input.
The preset voltage thresholds are accurate to ±1.5% over
temperature. The LTC2938 and LTC2939 also feature adjustable inputs with a 0.5V nominal threshold.
The reset and watchdog timeout periods are adjustable
using external capacitors. Tight voltage threshold accuracy
and glitch immunity ensure reliable reset operation without
false triggering. The RST output is guaranteed to be in the
correct state for VCC down to 1V. Each status output has
a weak internal pull-up and may be externally pulled up
to a user-defined voltage.
The 80μA supply current makes the LTC2938 and LTC2939
ideal for power conscious systems. The LTC2939 monitors up to six supplies and the LTC2938 monitors up to
four supplies.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 6967591, 7239251, 7119714.
TYPICAL APPLICATION
6-Supply Monitor 12V (ADJ), 5V, 3.3V, 2.5V, 1.8V, 1.2V (ADJ)
12V
5V
3.3V
2.5V
SYSTEM
LOGIC
1.8V
1.2V
2150k
1%
124k
1%
0.1μF
0.1μF
100k
1%
100k
1%
R1
59k
1%
R2
40.2k
1%
V1
V2
V3
V4
V5
V6
VREF
VPG
GND
WDI
LTC2939
WDO
RST
CWT
CRT
CWT
47nF
tRST = 94ms
tWD = 940ms
CRT
47nF
293839 TA01
Voltage Configuration Table
V1 (V)
V2 (V)
V3 (V)
V4 (V)
V5 (V)
V6 (V)
5
5
5
5
5
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
2.5
2.5
1.8
1.8
1.8
2.5
2.5
1.8
1.8
1.5
1.2
2.5
2.5
1.8
ADJ
ADJ
1.8
1.8
1.5
1.5
1.2
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
1.8
ADJ
ADJ
ADJ
–ADJ
1.5
ADJ
1.2
ADJ
ADJ
ADJ
–ADJ
ADJ
–ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
293839ff
1
LTC2938/LTC2939
ABSOLUTE MAXIMUM RATINGS
(Notes 1, 2, 3)
V1, V2, V3, V4, V5, V6, VPG ......................... –0.3V to 7V
RST .............................................................. –0.3V to 7V
CWT, WDO .................................................... –0.3V to 7V
CRT, VREF, WDI ..............................–0.3V to (VCC + 0.3V)
Reference Load Current (IVREF) ..............................±1mA
V4 Input Current (–ADJ Mode) ..............................–1mA
RST, WDO Currents ............................................±10mA
Operating Temperature Range
LTC2939C..................................................... 0°C to 70°C
LTC2939I .................................................. –40°C to 85°C
LTC2939H .............................................. –40°C to 125°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering 10 sec)
MS Package Only .............................................. 300°C
PIN CONFIGURATION
LTC2938
LTC2938
TOP VIEW
V3
1
12 V2
V1
2
11 V4
CRT
3
10 VREF
RST
4
9
VPG
WDO
5
8
GND
WDI
6
7
CWT
13
LTC2939
TOP VIEW
V3
V1
CRT
RST
WDO
WDI
DE PACKAGE
12-LEAD (4mm s 3mm) PLASTIC DFN
1
2
3
4
5
6
TOP VIEW
12
11
10
9
8
7
V2
V4
VREF
VPG
GND
CWT
V5
V3
V1
NC
CRT
RST
WDO
WDI
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
MS PACKAGE
12-LEAD PLASTIC MSOP
MS PACKAGE
16-LEAD PLASTIC MSOP
TJMAX = 125°C, θJA = 130°C/W
TJMAX = 125°C, θJA = 110°C/W
V6
V2
V4
NC
VREF
VPG
GND
CWT
TJMAX = 125°C, θJA = 43°C/W
EXPOSED PAD (PIN 13) PCB GND CONNECTION OPTIONAL
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC2938CDE#PBF
LTC2938CDE#TRPBF
2938
12-Lead (4mm × 3mm) Plastic DFN
0°C to 70°C
LTC2938IDE#PBF
LTC2938IDE#TRPBF
2938
12-Lead (4mm × 3mm) Plastic DFN
–40°C to 85°C
LTC2938HDE#PBF
LTC2938HDE#TRPBF
2938
12-Lead (4mm × 3mm) Plastic DFN
–40°C to 125°C
LTC2938CMS#PBF
LTC2938CMS#TRPBF
2938
12-Lead Plastic MSOP
0°C to 70°C
LTC2938IMS#PBF
LTC2938IMS#TRPBF
2938
12-Lead Plastic MSOP
–40°C to 85°C
LTC2938HMS#PBF
LTC2938HMS#TRPBF
2938
12-Lead Plastic MSOP
–40°C to 125°C
LTC2939CMS#PBF
LTC2939CMS#TRPBF
2939
16-Lead Plastic MSOP
0°C to 70°C
LTC2939IMS#PBF
LTC2939IMS#TRPBF
2939
16-Lead Plastic MSOP
–40°C to 85°C
LTC2939HMS#PBF
LTC2939HMS#TRPBF
2939
16-Lead Plastic MSOP
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
293839ff
2
LTC2938/LTC2939
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VCC = 5V unless otherwise specified. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VCC
Minimum Internal Operating Voltage
RST in Correct Logic State
l
VCCMINP
Minimum Required for Configuration
VCC Rising
l
VRT50
5V, 5% Reset Threshold
V1 Input Threshold
l
4.600
4.675
4.750
V
VRT33
3.3V, 5% Reset Threshold
V1, V2 Input Threshold
l
3.036
3.086
3.135
V
VRT25
2.5V, 5% Reset Threshold
V2, V3 Input Threshold
l
2.300
2.338
2.375
V
1
V
2.6
V
VRT18
1.8V, 5% Reset Threshold
V2, V3, V4 Input Threshold
l
1.656
1.683
1.710
V
VRT15
1.5V, 5% Reset Threshold
V2, V3, V4 Input Threshold
l
1.380
1.403
1.425
V
VRT12
1.2V, 5% Reset Threshold
V2, V3, V4 Input Threshold
l
1.104
1.122
1.140
V
VRTA
ADJ Reset Threshold
V3, V4, V5, V6 Input Threshold
l
492.5
500
507.5
mV
VRTAN
–ADJ Reset Threshold
V4 Input Threshold
l
–18
0
18
mV
VCC > 2.3V, IVREF = ±1mA,
CREF < 1000pF
l
1.192
1.210
1.228
0
VREF
Reference Voltage
VPG
Configuration Voltage Range
VCC > VCCMINP
l
IVPG
VPG Input Current
VPG = VREF
l
IV1
V1 Input Current
V1 = 5V, IVREF = 12μA, (Note 4)
l
IV2
V2 Input Current
V2 = 3.3V
IV3
V3 Input Current
IV4
V
VREF
V
±20
nA
80
125
μA
l
0.8
2
μA
V3 = 2.5V
V3 = 0.55V (ADJ Mode)
l
l
0.52
1.2
±15
μA
nA
V4 Input Current
V4 = 1.8V
V4 = 0.55V (ADJ Mode)
V4 = -0.02V (–ADJ Mode)
l
l
l
0.34
0.8
±15
±15
μA
nA
nA
IV5, IV6
V5, V6 Input Current (LTC2939)
V5, V6 = 0.55V
l
±15
nA
ICRT(UP)
CRT Pull-Up Current
VCRT = GND
l
–1.4
–2
–2.6
μA
ICRT(DN)
CRT Pull-Down Current
VCRT = 1.3V
l
10
20
30
μA
tRST
Reset Timeout Period
CRT = 1500pF
l
2
3
4
ms
tUV
Vn Undervoltage Detect to RST
Vn Less Than Reset Threshold VRTX by
More Than 1%
VOL
Voltage Output Low RST
ISINK = 2.5mA; VCC = 3V
l
0.15
0.4
V
ISINK = 100μA; VCC = 1V
l
0.05
0.3
V
VOL
Voltage Output Low WDO
ISINK = 2.5mA; VCC = 3.3V
l
0.15
0.4
V
VOH
Voltage Output High RST, WDO
(Note 5)
ISOURCE = –1μA; V2 = 3.3V
l
V2 – 1
ICWT(UP)
CWT Pull-Up Current
VCWT = GND
l
–1.4
–2
–2.6
μA
ICWT(DN)
CWT Pull-Down Current
VCWT = 1.3V
l
10
20
30
μA
tWD
Watchdog Timeout Period
CWT = 1500pF
l
20
30
40
ms
VWDI
WDI Input Threshold
(VCC = 3.3V to 5.5V)
Logic Low
Open
Logic High
l
l
l
0.7
1.4
0.9
0.4
1.1
V
V
V
150
μs
V
293839ff
3
LTC2938/LTC2939
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VCC = 5V unless otherwise specified. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
IWDI
WDI Input Current
VWDI = GND
VWDI = 0.7V
VWDI = 1.1V
VWDI = 5V
l
l
l
l
VCC = 3.3V or 5.5V
l
tWP
WDI Input Pulse Width
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into pins are positive, all voltages are referenced to
GND unless otherwise noted.
Note 3: The greater of V1, V2 is the internal supply voltage (VCC).
Note 4: Under static no-fault conditions, V1 will necessarily supply
quiescent current. If at any time V2 is larger than V1, V2 must be capable
MIN
TYP
MAX
UNITS
–30
μA
μA
μA
μA
–10
10
30
2
μs
of supplying the quiescent current, programming (transient) current and
reference load current.
Note 5: The outputs RST and WDO have internal pull-ups to V2 of typically
6μA. However, external pull-up resistors may be used when faster rise
times are required or for VOH voltages greater than V2. For V2 configured
to monitor 1.2V, 1.5V, 1.8V and 2.5V supplies, external pull-up resistors
are required to ensure that the output voltage, high, is above the VIH input
threshold of the external circuit.
TYPICAL PERFORMANCE CHARACTERISTICS
–ADJ Threshold Voltage
vs Temperature
1.010
1.005
1.000
0.995
0.990
0.985
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
125
29389 G01
VREF vs Temperature
18
1.228
12
1.222
6
1.216
VREF (V)
1.015
THRESHOLD VOLTAGE, VRTAN (mV)
NORMALIZED THRESHOLD VOLTAGES (V/V)
Normalized Threshold Voltages
vs Temperature
0
1.210
–6
1.204
–12
1.198
–18
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
125
29389 G02
1.192
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
125
29389 G03
293839ff
4
LTC2938/LTC2939
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs Temperature
90
400
–100μ
–10μ
125°C
–1μ
80
–100n
85°C
–10n
75
25°C
–1n
70
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
125
–100p
–300
TA = 25°C
350
TYPICAL TRANSIENT DURATION (μs)
V1 = 5V
V2 = 3.3V
V3 = 2.5V
V4 = 1.8V
85
V5 = V6 = 1V
IV4 (A)
SUPPLY CURRENT, IV1 (μA)
Transient Duration
vs Comparator Overdrive
I(V4) vs V4 in –ADJ mode
300
250
RESET OCCURS
ABOVE CURVE
200
150
100
50
0
–250
–200
–150 –100
V4 (mV)
–50
1
10
100
0.1
RESET COMPARATOR OVERDRIVE (% OF VRTX)
0
29389 G05
29389 G06
29389 G04
RST Output Voltage vs V1,
VPG = GND
RST Pull-Up Current vs V2
6
TA = 25°C
RST OUTPUT VOLTAGE (V)
PULL-UP CURRENT (μA)
15
12
9
VRT33
VRT25
6
VRT18
3
VRT15
1
4
3
2
1
VRT12
0
0.5
36
TA = 25°C
10k PULL-UP FROM RST TO V1
5 V1 = V2
WATCHDOG TIMEOUT PERIOD, tWD (ms)
18
Watchdog Timeout Period
vs Temperature
2
2.5 3
V2 (V)
3.5
4
4.5
0
5
1
2
3
26
2
100
125
100
TA = 25°C
10
1
10m
1m
100μ
10p
100p
1n
10n
CWT (F)
100n
1μ
29389 G11
125
Reset Timeout Period vs CRT
10
100m
3
50
25
75
0
TEMPERATURE (°C)
29389 G09
RESET TIMEOUT PERIOD tRST (s)
WATCHDOG TIMEOUT PERIOD tWD (s)
RESET TIMEOUT PERIOD, tRST (ms)
4
75
0
25
50
TEMPERATURE (°C)
28
Watchdog Timeout Period vs CWT
100
CRT = 1500pF
(SILVER MICA)
–25
30
29389 G08
Reset Timeout Period
vs Temperature
1
–50
32
V1 (V)
29389 G07
5
5
4
34
24
–50 –25
0
1.5
CWT = 1500pF
(SILVER MICA)
TA = 25°C
1
100m
10m
1m
100μ
10μ
10p
100p
1n
10n
CRT (F)
100n
1μ
29389 G12
29389 G10
293839ff
5
LTC2938/LTC2939
TYPICAL PERFORMANCE CHARACTERISTICS
Voltage Output Low
vs Sink Current (RST, WDO)
15
500
TA = 25°C
125°C
400
12
VOL = 0.4V
85°C
9
VOL (mV)
ISINK (mA)
WDI Input Current vs Temperature
20
V1 = 5V
V2 = 3V
WDI INPUT CURRENT, IWDI (μA)
ISINK vs Supply Voltage (RST)
VOL = 0.2V
6
300
25°C
200
–40°C
100
3
VWDI = 5V
15
VWDI = 1.1V
10
5
0
–5
–10
VWDI = 0V
–15
0
0
1
3
2
V1 OR V2 (V)
4
0
5
2
0
6
4
ISINK (mA)
8
29389 G13
WDI INPUT THRESHOLD, VWDI (V)
PULL-UP CURRENT (μA)
50
25
0
75
TEMPERATURE (°C)
100
125
29389 G15
1.50
15
12
9
6
3
0
2
–25
WDI Input Threshold
vs Temperature
TA = 25°C
WDO = GND
1
VWDI = 0.7V
29389 G14
WDO Pull-Up Current vs V2
18
10
–20
–50
3
V2 (V)
4
5
29389 G16
HIGH
1.25
OPEN (MAXIMUM)
1.00
0.75
LOW
OPEN (MINIMUM)
0.50
–50
–25
50
25
0
75
TEMPERATURE (°C)
100
125
29389 G17
PIN FUNCTIONS
CRT: Reset Timeout Capacitor. Attach an external capacitor (CRT) to GND to set a reset timeout of 2ms/nF. A 47nF
capacitor generates a 94ms reset delay time. Leaving CRT
unconnected generates a minimum timeout period of approximately 20μs which will vary depending on parasitic
capacitance on the pin.
CWT: Watchdog Timeout Capacitor. Attach a capacitor (CWT)
between CWT and GND to set a watchdog timeout period
of 20ms/nF. A 47nF capacitor generates a 940ms watchdog
timeout period. Leaving CWT unconnected generates a
minimum timeout period of approximately 200μs which
293839ff
6
LTC2938/LTC2939
PIN FUNCTIONS
will vary depending on parasitic capacitance on the pin.
Tie CWT to GND to disable the watchdog function.
GND: Device Ground.
NC: No Internal Connection.
RST: Reset Output. Logic output with weak 6μA pull-up
to V2. Pulls low when any voltage input is below the reset
threshold and held low for the configured reset delay time
after all voltage inputs are above threshold. When the
watchdog timer is enabled but not serviced prior to the
configured watchdog timeout period, RST pulls low for
one reset delay time. May be pulled to greater than V2
using an external pull-up. For V2 configured to monitor
2.5V or below, connect an external pull-up resistor to
the interface logic supply to ensure that the output high
voltage is above the VIH of the external circuit. Leave
open if unused.
V1: Voltage Input 1. Select from 5V or 3.3V. See the Applications Information section for details. The greater of
V1 or V2 is also VCC for the device. Bypass this input to
ground with a 0.1μF (or greater) capacitor.
V2: Voltage Input 2. Select from 3.3V, 2.5V, 1.8V, 1.5V or
1.2V. See the Applications Information section for details.
The greater of V1, V2 is also VCC for the device. Bypass
this input to ground with a 0.1μF (or greater) capacitor.
All status outputs are weakly pulled up to V2.
V3: Voltage Input 3. Select from 2.5V, 1.8V, 1.5V, 1.2V or
ADJ. See the Applications Information section for details.
Tie to V1 if unused.
V4: Voltage Input 4. Select from 1.8V, 1.5V, 1.2V, ADJ or
–ADJ. See the Applications Information section for details.
Tie to V1 if unused and configured for positive voltage.
V5: Adjustable Voltage Input 5 for LTC2939. High impedance comparator input with 0.5V typical threshold. Tie to
V1 if unused.
V6: Adjustable Voltage Input 6 for LTC2939. High impedance comparator input with 0.5V typical threshold. Tie to
V1 if unused.
VPG: Threshold Select Input. Connect to an external 1%
resistive divider between VREF and GND to select one of
sixteen combinations of voltage thresholds (see Table 1).
Do not add capacitance to the VPG input.
VREF : Buffered Reference Voltage Output. A 1.210V nominal reference used for the mode selection voltage (VPG)
and for the offset of negative adjustable applications. The
buffered reference can source and sink up to 1mA. The
reference can drive a bypass capacitor of up to 1000pF
without oscillation.
WDI: Watchdog Input: A three-state input that controls
the operation of the watchdog timer. Leaving the WDI pin
unconnected disables the watchdog timer while tying it
low or high enables it. While RST is high, a transition
between low and high logic levels (rising or falling edge)
within the watchdog timeout period is required to inhibit
WDO from pulling low and a watchdog initiated reset. A
capacitor attached to CWT sets the watchdog timeout
period. A transition between the low and high logic levels
on the WDI input clears the voltage on the CWT capacitor,
preventing WDO from going low. Once WDO is latched
low, WDI must transition between low and high logic levels
to clear WDO Transitions between open and logic low or
logic high do not clear WDO.
WDO: Watchdog Output. Logic output with weak 6μA pullup to V2. May be pulled greater than V2 using external
pull-up. For V2 configured to monitor 2.5V or below,
connect an external pull-up resistor to the interface logic
supply to ensure that the output high voltage is above the
VIH of the external circuit. The watchdog timer is enabled
when RST is high. The watchdog output pulls low if the
watchdog timer expires and the output remains low
until set high by the next WDI transition or anytime an
undervoltage condition occurs. A watchdog failure also
triggers a reset event. Leave open if unused.
Exposed Pad (DE12 package only): The Exposed Pad may
be left open or connected to device ground.
293839ff
7
LTC2938/LTC2939
BLOCK DIAGRAM
BUFFER
VREF
V1
BANDGAP
REFERENCE
VPG
V2
POWER
DETECT
VCC
A/D
V1
V2
V2
V3
4
+
4
–
RESISTIVE
DIVIDERS
V4
6μA
4
RST
ADJUSTABLE
RESET PULSE
GENERATOR
V5
WDFAIL
–
+
0.5V
LTC2939
+
V6
–
2μA
V2
VCC
22μA
CRT
6μA
GND
WDFAIL
WDI
UV
TRANSITION
DETECT
WDO
WATCHDOG
TIMER
2μA
VCC
22μA
CWT
293839 BD
293839ff
8
LTC2938/LTC2939
TIMING DIAGRAM
Vn Monitor Timing
VRT
Vn
tRST
tUV
RST
293839 TD01
Reset and Watchdog Timing
Vn
RST
tRST
tRST
tRST
tWD
WDO
tRST
tRST
tWD
tRST
tWD
tRST
tWD
WDI
293839 TD02
POWER-ON RESET
FOLLOWED BY RESET
CAUSED BY
UNDERVOLTAGE EVENT.
WATCHDOG OUTPUT SET
HIGH, WATCHDOG INPUT =
DON’T CARE
WATCHDOG INPUT NOT TOGGLED,
WATCHDOG TIMER EXPIRES, WATCHDOG
OUTPUT PULLS LOW. RESET OUTPUT
PULLS LOW FOR ONE RESET TIMEOUT
PERIOD.
WATCHDOG INPUT REMAINS UNTOGGLED,
WATCHDOG OUTPUT REMAINS LOW,
RESET OUTPUT PULLS LOW AGAIN AFTER
ONE WATCHDOG TIMEOUT PERIOD.
WATCHDOG OUTPUT CLEARED BY
UNDERVOLTAGE EVENT.
WATCHDOG INPUT NOT
TOGGLED, WATCHDOG
TIMER EXPIRES,
WATCHDOG OUTPUT
PULLS LOW. RESET
OUTPUT PULLS LOW.
WATCHDOG OUTPUT
LOW TIME SHORTENED
BY UNDERVOLTAGE
EVENT DURING RESET
TIMEOUT.
WATCHDOG INPUT NOT
TOGGLED, WATCHDOG
TIMER EXPIRES, WATCHDOG
OUTPUT PULLS LOW. RESET
OUTPUT PULLS LOW.
WATCHDOG OUTPUT NOT
CLEARED BY WATCHDOG
INPUT DURING RESET
TIMEOUT. AFTER RESET
COMPLETED, WATCHDOG
INPUT CLEARS WATCHDOG
OUTPUT.
293839ff
9
LTC2938/LTC2939
APPLICATIONS INFORMATION
Supply Monitoring
Threshold Accuracy
The LTC2938 and LTC2939 are low power, high accuracy
configurable four (LTC2938) and six (LTC2939) supply
monitoring circuits with reset output and watchdog functions. Both watchdog and reset timeouts are adjustable
using external capacitors. Single-pin configuration selects
one of sixteen input voltage monitor combinations. All four
(LTC2938) or six (LTC2939) voltage inputs must be above
predetermined thresholds for the reset not to be invoked.
The LTC2938/LTC2939 assert the reset during power-up,
power-down and brownout conditions on any one of the
voltage inputs.
Consider a 5V system with ±5% tolerance. The 5V supply
may vary between 4.75V to 5.25V. System ICs powered by
this supply must operate reliably within this band (and a
little more as subsequently explained). A perfectly accurate
supervisor for this supply generates a reset at exactly
4.75V. However, no supervisor is perfect. The actual reset
threshold of a supervisor varies over a specified band.
The LTC2938/LTC2939 varies ±1.5% around its nominal
threshold voltage (see Figure 1) over temperature.
Power-Up
The greater of V1 or V2 serves as the internal supply
voltage (VCC). On power-up, VCC powers the drive circuits
for the RST output. This ensures that the RST output will
be low as soon as V1 or V2 reaches 1V. The RST output
remains low until the part is configured. After configuration, if any one of the supply monitor inputs is below its
configured threshold, RST will be at logic low. Once all
the monitor inputs rise above their thresholds, an internal
timer is started and RST is released after the configured
delay time.
The reset threshold band and the power supply tolerance
bands should not overlap. This prevents false or nuisance
resets when the power supply is actually within its specified tolerance band.
The LTC2938 and LTC2939 have ±1.5% reset threshold
accuracy, so a 5% threshold is typically set to 6.5% below
the nominal input voltage. Therefore, a typical 5V, 5%
threshold is 4.675V.
The threshold is guaranteed to lie in the band between
4.750V and 4.600V over temperature. The powered system
must work reliably down to the low end of the threshold
band, or risk malfunction before a reset signal is properly
issued.
NOMINAL
SUPPLY
VOLTAGE
5V
SUPPLY TOLERANCE
MINIMUM
RELIABLE
SYSTEM
VOLTAGE
IDEAL
SUPERVISOR
THRESHOLD
4.75V
±1.5%
THRESHOLD
BAND
–5%
4.675V
–6.5%
4.6V
–8%
REGION OF POTENTIAL MALFUNCTION
293839 F01
Figure 1. 1.5% Threshold Accuracy Improves System Reliability
293839ff
10
LTC2938/LTC2939
APPLICATIONS INFORMATION
A less accurate supervisor increases the required system
voltage margin and increases the probability of system
malfunction. The LTC2938 and LTC2939 ±1.5% specification improves the reliability of the system over supervisors
with wider threshold tolerances.
Monitor Configuration
Upon power-up, the LTC2938 or LTC2939 enters a configuration period of approximately 150μs during which
the voltage on the VPG input is sampled and the monitor
is configured to the desired input combination. Do not
add capacitance to the VPG input. Immediately after
programming, the comparators are enabled and supply
monitoring begins.
Select the LTC2938/LTC2939 input voltage combination
by placing the recommended resistive divider from VREF
to GND and connect the tap point to VPG, as shown in
Figure 2.
LTC2938/
LTC2939
R1
1%
VREF
VPG
R2
1%
GND
Table 1 offers recommended 1% resistor values for the
various modes. The rightmost column in Table 1 specifies
optimum VPG / VREF ratios (±0.01), when configuring with
a ratiometric DAC.
293839 F02
Figure 2. Monitor Programming
Table 1. Voltage Threshold Modes
MODE
V1 (V)
V2 (V)
V3 (V)
V4 (V)
R1 (kΩ)
R2 (kΩ)
VPG/VREF
0
5
3.3
ADJ
ADJ
Open
Short
0
1
5
3.3
ADJ
–ADJ
93.1
9.53
0.094
2
3.3
2.5
ADJ
ADJ
86.6
16.2
0.156
3
3.3
2.5
ADJ
–ADJ
78.7
22.1
0.219
4
3.3
1.8
1.5
ADJ
71.5
28
0.281
5
5
3.3
2.5
ADJ
66.5
34.8
0.344
6
5
3.3
2.5
1.8
59
40.2
0.406
7
3.3
1.8
1.5
1.2
53.6
47.5
0.469
8
3.3
1.8
1.2
ADJ
47.5
53.6
0.531
9
3.3
1.8
ADJ
ADJ
40.2
59
0.594
10
3.3
2.5
1.8
1.5
34.8
66.5
0.656
11
3.3
2.5
1.8
ADJ
28
71.5
0.719
12
3.3
1.8
ADJ
–ADJ
22.1
78.7
0.781
13
3.3
1.5
ADJ
ADJ
16.2
86.6
0.844
14
5
3.3
1.8
ADJ
9.53
93.1
0.906
15
3.3
1.2
ADJ
ADJ
Short
Open
1
293839ff
11
LTC2938/LTC2939
APPLICATIONS INFORMATION
Using the Adjustable Thresholds
The reference inputs on the V3 and/or V4 comparators are
set to 0.5V when the positive adjustable modes are selected (Figure 3). The LTC2939 V5 and V6 comparators are
always in positive adjustable mode with a 0.5V reference.
The tap point on an external resistive divider, connected
between the positive voltage being sensed and ground, is
connected to the high impedance, adjustable inputs (V3,
V4, V5 and V6). Calculate the trip voltage from:
⎛ R3 ⎞
VTRIP = 0 . 5V • ⎜ 1 + ⎟
⎝ R4 ⎠
VTRIP
LTC2938/LTC2939
R3
1%
V3, V4, V5 OR V6
R4
1%
+
–
0.5V
293839 F03
Figure 3. Setting the Positive Adjustable Trip Point
In the negative adjustable mode, the high impedance,
adjustable input on the V4 comparator is connected to
ground (Figure 4). The tap point on an external resistive
divider, connected between the negative voltage being
sensed and the VREF output, is connected to the high
impedance adjustable input (V4). VREF provides the necessary level shift required to operate at ground. The negative trip voltage is calculated from:
VTRIP = −VREF •
R3
; V
= 1 . 210 V No min al
R4 REF
1 . 210 V
= 1 . 210 k
1mA
Tables 2 and 3 offer suggested 1% resistor values for
various adjustable applications assuming 5% monitor
thresholds.
Table 2. Suggested 1% Resistor Values for the ADJ Inputs
VSUPPLY (V)
VTRIP (V)
R3 (kΩ)
R4 (kΩ)
12
11.25
2150
100
10
9.4
1780
100
8
7.5
1400
100
7.5
7
1300
100
6
5.6
1020
100
5
4.725
845
100
3.3
3.055
511
100
3
2.82
464
100
2.5
2.325
365
100
1.8
1.685
237
100
1.5
1.410
182
100
1.2
1.120
124
100
1
0.933
86.6
100
0.9
0.840
68.1
100
Table 3. Suggested 1% Resistor Values for the Negative
ADJ Inputs
VSUPPLY (V)
VTRIP (V)
R3 (kΩ)
R4 (kΩ)
–2
–1.87
1.87
121
–5
–4.64
464
121
–5.2
–4.87
487
121
–10
–9.31
931
121
–12
–11.30
1130
121
Although all of the supply monitor comparators have
built-in glitch immunity, bypass capacitors on V1 and V2
are recommended because the greater of V1 or V2 is also
the supply for the device. Filter capacitors on the V3, V4,
V5 and V6 inputs are allowed.
LTC2938/LTC2839
VREF
R4
1%
In a negative adjustable application, the minimum value for
R4 is limited by the sourcing capability of VREF (±1mA).
With no other load on VREF, R4 (minimum) is:
V4
R3
1%
VTRIP
293839 F04
Figure 4. Setting the Negative Adjustable Trip Point
293839ff
12
LTC2938/LTC2939
APPLICATIONS INFORMATION
Power-Down
On power-down, once any of the monitor inputs drops
below its threshold, RST is held at a logic low. A logic low
of 0.4V is guaranteed until both V1 and V2 drop below
1V. If the bandgap reference becomes invalid (VCC < 2V
typical), the LTC2938/LTC2939 will reconfigure when VCC
rises above 2.4V (max).
Selecting the Reset Timing Capacitor
The reset timeout period is adjustable in order to accommodate a variety of microprocessor applications. The reset
timeout period, tRST, is adjusted by connecting a capacitor,
CRT, between CRT and ground. The value of this capacitor
is determined by:
t
⎛ pF ⎞
CRT = RST = 500 ⎜ ⎟ • t RST
2MΩ
⎝ ms ⎠
Leaving CRT unconnected generates a minimum reset
timeout period of approximately 20μs. The maximum
reset timeout period is limited by the largest available low
leakage capacitor. The accuracy of the timeout period is
affected by capacitor leakage (the nominal charging current
is 2μA) and capacitor tolerance. A low leakage ceramic
capacitor is recommended.
Watchdog Timer
The watchdog circuit typically monitors a microprocessor’s
activity. The microprocessor is required to change the
logic state of the WDI input on a periodic basis in order
to clear the watchdog timer. Whenever an undervoltage
condition exists, the watchdog timer is cleared and WDO
is set high. The watchdog timer starts when RST pulls
high. Subsequent edges received on the WDI input clear
the watchdog timer. If uncleared, the watchdog timer
continues to run until it times out. Once it times out,
internal circuitry brings the WDO and RST outputs low.
WDO remains low for at least one reset timeout period
and can then be cleared by a new edge on the WDI input
or anytime an undervoltage condition occurs.
The watchdog timer may be disabled in three ways. One
method is to simply ground CWT. With CWT held at ground,
any undervoltage event forces WDO high indefinitely. A
second method is to leave the WDI input floating or in high
impedance. The last method is to continuously drive WDI
between the low and high thresholds.
Selecting the Watchdog Timing Capacitor
The watchdog timeout period is adjustable and can be
optimized for software execution. The watchdog timeout
period, tWD, is adjusted by connecting a capacitor, CWT,
between CWT and ground. The value of this capacitor is
determined by:
⎛ pF ⎞
t
C WT = WD = 50 ⎜ ⎟ • t WD
20MΩ
⎝ ms ⎠
Leaving CWT unconnected generates a minimum watchdog
timeout period of approximately 200μs. The maximum
watchdog timeout period is limited by the largest available
low leakage capacitor. The accuracy of the timeout period
is affected by capacitor leakage (the nominal charging
current is 2μA) and capacitor tolerance. A low leakage
ceramic capacitor is recommended.
Pull-Up Resistors for WDO and RST
The WDO and RST pins provide weak pull-up currents to
V2. This current is typically greater than 6μA when V2 is
greater than 3.3V. The magnitude of the pull-up current
decreases as V2 decreases. For V2 configured to monitor
2.5V, 1.8V, 1.5V and 1.2V supplies, external pull-up resistors
are required from both pins to the interface logic supply
to ensure that the output high voltage is above the VOH
input threshold of the external circuit. The WDO and RST
pins can be pulled to voltages higher than V2 by external
pull-up resistors.
Watchdog Application
Figure 5 shows a typical application for the LTC2938/
LTC2939. The CWT timing capacitor adjusts the watchdog timeout period for optimal software execution. If
the software malfunctions and the state of the WDI pin
is unchanged before the end of the watchdog timeout
period (tWD), the LTC2938/LTC2939 WDO pin is latched
to a low state. At the same time, RST is pulled low to reset
the microprocessor. While RST is low, the WDI pin does
not affect RST or WDO. The system therefore resets for
at least tRST.
293839ff
13
LTC2938/LTC2939
APPLICATIONS INFORMATION
After RST returns high, the microprocessor can poll the
state of the WDO pin to determine if the reset was caused
by an undervoltage condition or by a watchdog timeout.
WDO high means that the reset was caused by undervoltage since this condition also resets the WDO latch (and
the watchdog timer). If the WDO pin is low, the system
reset was caused by watchdog timeout. The microprocessor can then change the state of WDI to clear the WDO
latch. If the microprocessor fails to do so, the LTC2938/
LTC2939 will alternate between tRST and tWD timeout
and RST will be pulled low for tRST after every watchdog
timeout. WDO remains low until the microprocessor flips
the state of WDI.
pin. This affects the response of the LTC2938/LTC2939.
When the WDI pin is floated, the watchdog timer is reset
and CWT is discharged towards ground but WDO remains
unchanged. Putting WDI in high impedance does not affect
tRST. Once RST goes high again, and WDI is driven from
high impedence to a high or low state, the watchdog timer
starts a complete tWD timeout period. A high-to-low or
low-to-high transition at WDI clears WDO if it was previously latched low.
The RST and WDO pins should not be tied together to
generate the master reset signal since a watchdog timeout
forces RST low together with WDO and the master reset
signal will remain low indefinitely.
Some microprocessors force their I/O pins into high
impedance during reset which in turn, floats the WDI
5V
V1
3.3V
0.1μF
0.1μF
2.5V
V3
1.8V
V4
2150k 1%
12V
1.2V
V2
124k 1%
R1
59k
1%
LTC2939
RST
V5
WDO
V6
WDI
VREF
VPG GND CRT
100k
1%
100k
1%
R2
40.2k
1%
MICROPROCESSOR
CWT
CRT
47nF
CWT
47nF
tRST = 94ms
tWD = 940ms
293839 F05
Figure 5. 6-Supply Monitor, 12V (ADJ), 5V, 3.3V, 2.5V, 1.8V, 1.2V (ADJ)
with Watchdog Enabled
293839ff
14
LTC2938/LTC2939
TYPICAL APPLICATIONS
Quad-Supply Monitor (Mode 14) with Watchdog Disabled
5V
V1
3.3V
0.1μF
0.1μF
1.8V
V2
LTC2938
V4
VTRIP = 11.25V
R3
2.15MΩ
1%
R4
100k
1%
R1
9.53k
1%
WDO
VREF
WDI
VPG
R2
93.1k
1%
SYSTEM
LOGIC
RST
V3
12V
GND
CRT
CWT
CRT
47nF
293839 TA02
±5V Supply Monitor (Mode 1) with Watchdog Disabled and Unused Inputs Tied High
5V
V1
0.1μF
–5V
VTRIP = – 4.64V
V2
R3
464k
1%
V3
V4
LTC2938
RST
R4
121k
1%
SYSTEM
LOGIC
WDO
VREF
R1
93.1k
1%
R2
9.53k
1%
VPG
GND
WDI
CWT
CRT
CRT
47nF
293839 TA03
293839ff
15
LTC2938/LTC2939
TYPICAL APPLICATIONS
Supply and Temperature Monitor (Mode 1, 5V, 3.3V, 28V, –5.2V, 12V, 100°C)
5V
V1
3.3V
0.1μF
12V
28V
V2
0.1μF
10k
1%
2150k 1%
V3
5110k 1%
LTC2939
V5
467k 1%
–5.2V
RBIAS
93.1k
1%
121k
1%
WDO
VREF
R1
93.1k
1%
WDI
V6
VPG
RNTC*
470k
100k
1%
SYSTEM
LOGIC
RST
V4
RHYST
280k
1%
GND
CRT
R2
9.53k
1%
100k
1%
CWT
CRT
47nF
293839 TA04
*PANASONIC ERTJOEV474J
Buffered VREF to Power High Current Circuits
5V
V1
3.3V
0.1μF
0.1μF
2.5V
WDO
V4
2150k 1%
12V
MICROPROCESSOR
WDI
V3
1.8V
1.2V
RST
V2
LTC2939
V5
124k 1%
5V
VREF
V6
R1
59k
1%
VPG
GND
100k
1%
100k
1%
CRT
CWT
CRT
47nF
CWT
47nF
+
LT1809
–
1.210V
±10mA
R2
40.2k
1%
293839 TAO5
293839ff
16
LTC2938/LTC2939
PACKAGE DESCRIPTION
UE/DE Package
12-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1695)
0.70 p0.05
3.60 p0.05
2.20 p0.05
3.30 p0.05
1.70 p 0.05
PACKAGE OUTLINE
0.25 p 0.05
0.50 BSC
2.50 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
4.00 p0.10
(2 SIDES)
7
R = 0.115
TYP
0.40 p 0.10
12
R = 0.05
TYP
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
3.00 p0.10
(2 SIDES)
0.75 p0.05
3.30 p0.10
1.70 p 0.10
6
0.25 p 0.05
PIN 1 NOTCH
R = 0.20 OR
0.35 s 45o
CHAMFER
1
(UE12/DE12) DFN 0806 REV D
0.50 BSC
2.50 REF
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE A VARIATION OF VERSION
(WGED) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
293839ff
17
LTC2938/LTC2939
PACKAGE DESCRIPTION
MS Package
12-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1668 Rev Ø)
0.889 p 0.127
(.035 p .005)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
4.039 p 0.102
(.159 p .004)
(NOTE 3)
0.65
(.0256)
BSC
0.42 p 0.038
(.0165 p .0015)
TYP
12 11 10 9 8 7
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
DETAIL “A”
3.00 p 0.102
(.118 p .004)
(NOTE 4)
4.90 p 0.152
(.193 p .006)
0o – 6o TYP
0.406 p 0.076
(.016 p .003)
REF
GAUGE PLANE
0.53 p 0.152
(.021 p .006)
1 2 3 4 5 6
1.10
(.043)
MAX
DETAIL “A”
0.18
(.007)
0.86
(.034)
REF
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.650
(.0256)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.1016 p 0.0508
(.004 p .002)
MSOP (MS12) 1107 REV Ø
293839ff
18
LTC2938/LTC2939
PACKAGE DESCRIPTION
MS Package
16-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1669 Rev Ø)
0.889 p 0.127
(.035 p .005)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
4.039 p 0.102
(.159 p .004)
(NOTE 3)
0.50
(.0197)
BSC
0.305 p 0.038
(.0120 p .0015)
TYP
0.280 p 0.076
(.011 p .003)
REF
16151413121110 9
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
DETAIL “A”
3.00 p 0.102
(.118 p .004)
(NOTE 4)
4.90 p 0.152
(.193 p .006)
0o – 6o TYP
GAUGE PLANE
0.53 p 0.152
(.021 p .006)
DETAIL “A”
0.18
(.007)
SEATING
PLANE
1234567 8
1.10
(.043)
MAX
0.17 – 0.27
(.007 – .011)
TYP
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.86
(.034)
REF
0.1016 p 0.0508
(.004 p .002)
MSOP (MS16) 1107 REV Ø
293839ff
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC2938/LTC2939
TYPICAL APPLICATION
Quad-Supply Monitor (Mode 14) with Pushbutton Reset
5V
1μF
1.8V
3.3V
V1
V2
V3
V4
CRT
LTC2938
1μF
12V
VTRIP = 11.25V
VREF
R1
9.53k
1%
RST
CRT
47nF
SYSTEM
LOGIC
WDO
VPG
WDI
GND
R3
2.15MΩ
1%
10k*
CWT
47nF
CWT
R2
93.1k
1%
293839 TAO6
R4
100k
1%
MANUAL RESET
PUSHBUTTON
*OPTIONAL RESISTOR FOR
ADDED ESD PROTECTION
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC2900
Programmable Quad-Supply Monitor
Adjustable Reset, 10-Lead MSOP and DFN Packages
LTC2901
Programmable Quad-Supply Monitor
Adjustable Reset and Watchdog Timer
LTC2902
Programmable Quad-Supply Monitor
Adjustable Reset and Tolerance
LTC2908
Precision 6-Supply Monitor (Four Fixed and Two Adjustable)
8-Lead TSOT-23 and DFN Packages
LTC2930
Configurable 6-Supply Monitor with Adjustable Reset Timer,
Manual Reset
H-Grade Temperature Range, 3mm × 3mm DFN-12 Package
LTC2931
Configurable 6-Supply Monitor with Adjustable Reset and
Watchdog Timers
H-Grade Temperature Range, Individual Supply Comparator
Outputs, TSSOP-20 Package
LTC2932
Configurable 6-Supply Monitor with Individual Comparator
Outputs
Adjustable Reset Timer and Tolerance, Pin-Selectable Tolerance
(5%, 7.5%, 10% or 12.5%), Reset Disable for Margining,
TSSOP-20 Package
293839ff
20 Linear Technology Corporation
LT 0709 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
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www.linear.com
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