LRC LDTA114YET1

LESHAN RADIO COMPANY, LTD.
Bias Resistor Transistors
LDTA114YET1
PNP Silicon Surface Mount Transistors
With Monolithic Bias Resistor Network
3
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a base-emitter
1
2
SC-89
resistor. The BRT eliminates these individual components by integrating
them into a single device. The use of a BRT can reduce both system
cost and board space. The device is housed in the SC-89 package
which is designed for low power surface mount applications.
ƽSimplifies Circuit Design
ƽReduces Board Space
Pin 1
Base
(Input)
ƽReduces Component Count
ƽThe SC-89 Package can be Soldered using Wave or Reflow.
Pin 3
Collector
(Output)
R1
R2
Pin 2
Emitter
(Ground)
ƽAvailable in 8 mm, 7 inch/3000 Unit Tape & Reel
ƽThis is Pb-Free Device.
DEVICE MARKING AND ORDERING INFORMATION
Device
Marking
Package
Shipping
6D
SC-89
(Pb-Free)
3000/Tape&Reel
LDTA114YET1
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
MARKING DIAGRAM
Symbol
Value
Unit
Collector-Base Voltage
VCBO
50
Vdc
Collector-Emitter Voltage
VCEO
50
Vdc
IC
100
mAdc
Symbol
Max
Unit
PD
200 (Note 1)
300 (Note 2)
1.6 (Note 1)
2.4 (Note 2)
mW
Rating
Collector Current
3
XX M
1
THERMAL CHARACTERISTICS
Characteristic
Total Device Dissipation
TA = 25°C
Derate above 25°C
xx
M
2
= Specific Device Code
= Date Code
mW/°C
Thermal Resistance –
Junction-to-Ambient
RθJA
600 (Note 1)
400 (Note 2)
°C/W
Junction and Storage
Temperature Range
TJ, Tstg
–55 to +150
°C
1. FR–4 @ Minimum Pad
2. FR–4 @ 1.0 x 1.0 inch Pad
Version 1.0
LDTA114YET1-1/4
LESHAN RADIO COMPANY, LTD.
LDTA114YET1
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
Collector-Base Cutoff Current (VCB = 50 V, IE = 0)
ICBO
–
–
100
nAdc
Collector-Emitter Cutoff Current (VCE = 50 V, IB = 0)
ICEO
–
–
500
nAdc
Emitter-Base Cutoff Current
(VEB = 6.0 V, IC = 0 )
IEBO
–
–
0.2
mAdc
Collector-Base Breakdown Voltage (IC = 10 µA, IE = 0)
V(BR)CBO
50
–
–
Vdc
Collector-Emitter Breakdown Voltage (Note 3)
(IC = 2.0 mA, IB = 0)
V(BR)CEO
50
–
–
Vdc
hFE
80
140
–
VCE(sat)
–
–
0.25
Vdc
Characteristic
OFF CHARACTERISTICS
ON CHARACTERISTICS (Note 3)
DC Current Gain
(VCE = 10 V, IC = 5.0 mA)
Collector-Emitter Saturation Voltage (IC = 10 mA, IB = 0.3 mA)
Output Voltage (on)
(VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kΩ)
VOL
–
–
0.2
Vdc
Output Voltage (off)
(VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kΩ)
VOH
4.9
–
–
Vdc
Input Resistor
R1
7.0
10
13
kΩ
Resistor Ratio
R1/R2
0.17
0.21
0.25
3. Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0%
PD , POWER DISSIPATION (MILLIWATTS)
250
200
150
100
50
0
-ā50
RθJA = 600°C/W
0
50
100
TA, AMBIENT TEMPERATURE (°C)
150
Figure 1. Derating Curve
Version 1.0
LDTA114YET1-2/4
LESHAN RADIO COMPANY, LTD.
180
1
IC/IB = 10
hFE , DC CURRENT GAIN (NORMALIZED)
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS)
LDTA114YET1
TAĂ=Ă-25°C
25°C
0.1
75°C
0.01
0.001
0
20
40
60
IC, COLLECTOR CURRENT (mA)
25°C
140
-25°C
120
100
80
60
40
20
0
80
TAĂ=Ă75°C
VCE = 10 V
160
1
2
4
6
Figure 2. VCE(sat) versus IC
100
IC, COLLECTOR CURRENT (mA)
3.5
Cob , CAPACITANCE (pF)
TAĂ=Ă75°C
f = 1 MHz
lE = 0 V
TA = 25°C
4
3
2.5
2
1.5
1
0.5
0
2
4
6 8 10 15 20 25 30 35 40
VR, REVERSE BIAS VOLTAGE (VOLTS)
45
Figure 4. Output Capacitance
50
25°C
-25°C
10
VO = 5 V
1
0
2
4
6
Vin, INPUT VOLTAGE (VOLTS)
10
+12 V
VO = 0.2 V
V in , INPUT VOLTAGE (VOLTS)
8
Figure 5. Output Current versus Input Voltage
10
25°C
75°C
TAĂ=Ă-25°C
Typical Application
for PNP BRTs
1
0.1
80 90 100
Figure 3. DC Current Gain
4.5
0
8 10 15 20 40 50 60 70
IC, COLLECTOR CURRENT (mA)
LOAD
0
10
20
30
IC, COLLECTOR CURRENT (mA)
40
Figure 6. Input Voltage versus Output Current
Version 1.0
50
Figure 7. Inexpensive, Unregulated Current Source
LDTA114YET1-3/4
LESHAN RADIO COMPANY, LTD.
LDTA114YET1
SC-89
A
-X-
3
1
2
B -Y-
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
4. 463C-01 OBSOLETE, NEW STANDARD 463C-02.
S
K
G
2 PL
D
0.08 (0.003)
M
DIM
A
B
C
D
G
H
J
K
L
M
N
S
3 PL
X Y
N
M
C
J
-T-
H
MILLIMETERS
MIN
NOM
MAX
1.50
1.60
1.70
0.75
0.85
0.95
0.60
0.70
0.80
0.23
0.28
0.33
0.50 BSC
0.53 REF
0.10
0.15
0.20
0.30
0.40
0.50
1.10 REF
----10 _
----10 _
1.50
1.60
1.70
MIN
0.059
0.030
0.024
0.009
0.004
0.012
----0.059
INCHES
NOM
0.063
0.034
0.028
0.011
0.020 BSC
0.021 REF
0.006
0.016
0.043 REF
----0.063
MAX
0.067
0.040
0.031
0.013
0.008
0.020
10 _
10 _
0.067
SEATING
PLANE
H
L
G
RECOMMENDED PATTERN
OF SOLDER PADS
Version 1.0
LDTA114YET1-4/4