NJG1647HD3 SPDT SWITCH GaAs MMIC ! GENERAL DESCRIPTION The NJG1647HD3 is a GaAs SPDT switch IC suited for the application of GSM, CDMA and UMTS handsets. This switch features low distortion, high power handling and low insertion loss. This device can operate a single bit control signal from +1.3V. This device has the low current consumption mode. The ultra-small & ultra-thin USB6-D3 package is adopted. ! FEATURES " Low control voltage " Low operation voltage " Low distortion " Low insertion loss " Ultra-small & ultra-thin package ! PACKAGE OUTLINE NJG1647HD3 1.3V min. 2.5~+3.6V IIP3=+70dBm typ. @ PIN=24dBm, 2 tone, VDD=2.7V 2nd harmonics=-70dBc max. @ PIN=35dBm, f=0.9GHz 3rd harmonics=-70dBc max. @ PIN=35dBm, f=0.9GHz 0.25dB typ. @f=0.9GHz, PIN=35dBm, VDD=2.7V 0.30dB typ. @f=1.9GHz, PIN=33dBm, VDD=2.7V USB6-D3 (Package size: 2.0x1.8x0.8mm) ! PIN CONFIGURATION USB6-D3 Type (Top View) GND GND 4 3 5 2 6 1 GND Pin connection 1. PC 2. CTL2 (Option) 3. VDD 4. CTL1 5. P1 6. P2 GND ! TRUTH TABLE “H”=VCTL(H), “L”=VCTL(L) CTL1 Path H P1-PC L P2-PC Option: CTL2 is the mode switching port. Supplying “L” voltage, this device is operated the low current consumption mode. NOTE: Please note that any information on this datasheet will be subject to change. Ver.2007-08-21 -1- NJG1647HD3 ! ABSOLUTE MAXIMUM RATINGS PARAMETER RF Input Power SYMBOL PIN (Ta=+25°C, Zs=Zl=50Ω) RATINGS UNITS CONDITIONS VDD =2.7V, CTL2=VCTL(H) 36 32 5.0 V dBm Supply Voltage VDD VDD =2.7V, CTL2=VCTL(L) VDD terminal Control Voltage VCTL CTL1, CTL2 terminal 5.0 V on PCB board 270 mW Power Dissipation PD Operating Temp. Topr -40~+85 °C Storage Temp. Tstg -55~+150 °C ! ELECTRICAL CHARACTERISTICS 1 (General conditions: Ta=+25°C, Zs=Zl=50Ω, VDD=2.7V, VCTL(L)=0V, VCTL(H)=1.8V, with application circuit) PARAMETERS SYMBOL CONDITIONS MIN TYP MAX UNITS 2.5 2.7 3.6 V Supply Voltage VDD Operating Current1 IDD1 No RF input, CTL2= VCTL(H) - 300 500 µA Operating Current2 IDD2 No RF input, CTL2= VCTL(L) - 15 50 µA VCTL(L) CTL1, CTL2 Terminal 0 - 0.4 V VCTL(H) CTL1, CTL2 Terminal 1.3 - 5.0 V - 5 10 µA Control Voltage (LOW) Control Voltage (HIGH) Control Current -2- ICTL NJG1647HD3 ! ELECTRICAL CHARACTERISTICS 2 (General conditions: Ta=+25°C, Zs=Zl=50Ω, VDD=2.7V, VCTL(L)=0V, VCTL(H)=1.8V, with application circuit) PARAMETERS SYMBOL CONDITIONS MIN TYP MAX UNITS Insertion Loss 1 LOSS1 f=0.9GHz, PIN=35dBm - 0.25 0.45 dB Insertion Loss 2 LOSS2 f=1.9GHz, PIN=33dBm - 0.30 0.50 dB Isolation 1 ISL1 f=0.9GHz, PIN=35dBm 22 25 - dB Isolation 2 ISL2 f=1.9GHz, PIN=33dBm 17 20 - dB f=1.9GHz 34 - - dBm Pin at 0.2dB Compression Point1 P-0.2dB(1) 2nd harmonics1 2f0(1) f=0.9GHz, PIN=35dBm - -75 -70 dBc 2nd harmonics2 2f0(2) f=1.9GHz, PIN=33dBm - -75 -70 dBc 3rd harmonics1 3f0(1) f=0.9GHz, PIN=35dBm - -75 -70 dBc 3 harmonics2 3f0(2) f=1.9GHz, PIN=33dBm - -75 -70 dBc Input 3rd order intercept point1 IIP3(1) f=829+849MHz, PIN=24dBm each tone *1 +65 +70 - dBm Input 3rd order intercept point2 IIP3(2) f=1870+1910MHz, PIN=24dBm each tone *1 +65 +70 - dBm VSWR VSWR on-state ports, f=1.9GHz - 1.2 1.4 - 1 5 rd Switching time TSW µs *1: IIP is defined by the following equation: IIP3=(3 x Pout-IM3)/2+LOSS -3- NJG1647HD3 ! TERMINAL INFORMATION No. -4- SYMBOL DESCRIPTION 1 PC Common RF port. This PC port is connected to P1 or P2 by logical control voltage of CTL1. In order to block DC bias voltage of internal circuit, an external capacitor is required. 2 CTL2 Control port 2. This terminal is set to +1.3~5.0V of logical high level as usual, and set to +0.0~0.4V of logical low level for the low current consumption mode. 3 VDD Supply voltage terminal (+2.5~3.6V). Please place an inductor close to this terminal, and a bypass capacitor between VDD and GND for avoiding RF characteristic degradation. 4 CTL1 Control port 1. This terminal is set to +1.3~5.0V of logical high level for ON state between PC and P1 ports, and set to +0.0~0.4V of logical low level for ON state between PC and P2 RF ports. 5 P1 This port is connected with PC port by control voltage of +1.3~5.0V(VCTL(H)) to 4th pin. An external capacitor is required to block the DC bias voltage of internal circuit. 6 P2 This port is connected to PC port by control voltage of +0.0~0.4V(VCTL(L)) to 4th pin. An external capacitor is required to block the DC bias voltage of internal circuit. GND GND Ground terminal. Please connect this terminal with ground plane as close as possible for good RF performance. NJG1647HD3 ! ELECTRICAL CHARACTERISTICS (With Application circuit, Loss of external circuit are excluded) Loss, ISL vs Frequency Loss, ISL vs Frequency (PC-P1 ON, V =2.7V) (PC-P2 ON, V =2.7V) DD 0.0 DD 0 0.0 -0.2 -5 -0.2 -5 -0.4 -10 -0.4 -10 -0.6 -15 -0.6 -15 -0.8 -20 -0.8 -20 -1.0 -25 -1.0 -25 -1.2 -30 -1.2 -30 -1.4 -35 -1.4 -35 -1.6 -40 -1.6 -40 -1.8 -45 -1.8 -45 -50 3.0 -2.0 -2.0 0.0 0.5 1.0 1.5 2.0 2.5 0.0 1.0 1.5 2.0 2.5 Frequency (GHz) Frequency (GHz) VSWR vs Frequency VSWR vs Frequency (PC Port, PC-P1 ON, V 2.0 DD =2.7V) (PC Port, PC-P2 ON, V 2.0 1.8 1.8 1.6 1.6 1.4 1.4 1.2 1.2 1.0 0.0 0.5 0 0.5 1.0 1.5 2.0 Frequency (GHz) 2.5 3.0 1.0 0.0 0.5 1.0 1.5 DD -50 3.0 =2.7V) 2.0 2.5 3.0 Frequency (GHz) -5- NJG1647HD3 ! ELECTRICAL CHARACTERISTICS (With Application circuit, Loss of external circuit are excluded) Output Power, I DD vs Input Power (f=0.9GHz, P1-PC ON, CTL2=1.8V) 36 550 VV =2.5V =2.5V DD DD 34 500 VVDD =2.7V =2.7V DD DD vs Input Power (f=1.9GHz, P1-PC ON, CTL2=1.8V) 36 550 V =2.5V V =2.5V DD DD 34 500 V =2.7V VDD=2.7V DD =3.6V VVDD =3.6V DD 32 Output Power, I V V =3.6V =3.6V DD 450 32 30 400 30 400 28 350 28 350 26 300 26 300 24 250 24 250 22 200 22 200 150 20 20 20 22 24 26 28 30 32 34 36 450 150 20 22 24 Input Power (dBm) 26 28 30 32 34 36 Input Power (dBm) Loss, ISL vs Input Power Loss, ISL vs Input Power (f=0.9GHz, P1-PC ON, CTL2=1.8V) (f=1.9GHz, P1-PC ON, CTL2=1.8V) 0.0 0 0.0 -0.2 -3 -0.2 -3 -0.4 -6 -0.4 -6 -9 -0.6 -0.6 VVDD=2.5V =2.5V V V =2.5V =2.5V DD -0.8 -12 DD DD -9 V =2.7V V =2.7V DD DD VV =2.7V =2.7V 0 -0.8 -12 V =3.6V V =3.6V DD =3.6V VVDD =3.6V DD DD -1.0 -15 -1.0 -15 -1.2 -18 -1.2 -18 -1.4 -21 -1.4 -21 -1.6 -24 -1.6 -24 -27 -1.8 -1.8 20 22 24 26 28 30 32 34 36 22 24 26 28 30 32 34 36 Input Power (dBm) Input Power (dBm) Harmonics vs Input Power Harmonics vs Input Power (f=0.9GHz, P1-PC ON, CTL2=1.8V) -50 V V =2.5V =2.5V VDD =3.6V -60 (f=1.9GHz, P1-PC ON, CTL2=1.8V) -50 =2.5V VVDDDD =2.5V VVDD=2.7V =2.7V DD VDD=3.6V -55 DD DD -55 V -60 VDDDD =3.6V -65 -65 -70 -70 -75 -27 20 VDD=2.7V =2.7V V DD =3.6V 3rd Harmonics -75 2nd Harmonics -80 -80 -85 -85 3rd Harmonics 2nd Harmonics -90 -90 20 22 24 26 28 30 32 Input Power (dBm) -6- 34 36 20 22 24 26 28 30 32 Input Power (dBm) 34 36 NJG1647HD3 ! ELECTRICAL CHARACTERISTICS (With Application circuit, Loss of external circuit are excluded) Output Power, IM3 vs Input Power (f=829MHz+849MHz, P1-PC ON, V DD =2.7V) 80 Output Power, IM3 vs Input Power 60 60 40 40 20 (f=1870MHz+1910MHz, P1-PC ON, V DD =2.7V) 80 20 Pout 0 0 -20 -20 -40 -40 Pout -60 -60 IM3 IM3 IIP3=71.9dBm -80 IIP3=70.0dBm -80 20 30 40 50 60 70 20 80 30 Input Power (dBm) 40 50 60 70 80 Input Power (dBm) IIP3 vs Input Power IIP3 vs Input Power (f=829MHz+849MHz, P1-PC ON, CTL2=1.8V) (f=1870MHz+1910MHz, P1-PC ON, CTL2=1.8V) 80 80 75 75 70 70 65 65 60 60 V =2.5V VDD =2.5V DD VDD =2.7V 55 VDD =2.7V 55 V =3.6V VDD =3.6V DD 50 50 20 21 22 23 24 25 26 Input Power (dBm) 27 28 20 21 22 23 24 25 26 27 28 Input Power (dBm) -7- NJG1647HD3 ! ELECTRICAL CHARACTERISTICS (With Application circuit, Loss of external circuit are excluded) DC Current vs Ambient Temperature (No RF Signal) 500 50 Switching Time vs Ambient Temperature (VDD =2.7V, CTL1=0/1.8V) 4 V =2.5V Trise Tfall DD 400 VDD =2.7V 40 V =3.6V 3 DD ICTL 300 30 200 20 100 10 2 1 I 0 -50 0 CTL 0 100 50 o 0 -50 Loss, ISL vs Ambient Temperature IN -0.2 -0.4 o 100 (f=1.9GHz, P1-PC ON, P =33dBm) 0 0.0 -5 -0.2 -10 -0.4 IN 0 -5 -10 =2.5V VV =2.5V DD DD VV =2.5V =2.5V VV =2.7V =2.7V DD DD DD DD VVDD=2.7V =2.7V VV =3.6V =3.6V -15 -0.6 -0.8 -20 -0.8 -20 -1.0 -25 -1.0 -25 -0.6 DD VDD=3.6V VDD =3.6V -30 100 -1.2 -50 0 50 o Ambient Temperature ( C) -8- 50 Loss, ISL vs Ambient Temperature (f=0.9GHz, P1-PC ON, P =35dBm) 0.0 0 Ambient Temperature ( C) Ambient Temperature ( C) -1.2 -50 -15 DD DD 0 -30 100 50 o Ambient Temperature ( C) NJG1647HD3 ! ELECTRICAL CHARACTERISTICS (With Application circuit, Loss of external circuit are excluded) 2nd Harmonics vs Ambient Temperature (f=0.9GHz, P1-PC ON, P IN =35dBm) -30 2nd Harmonics vs Ambient Temperature (f=1.9GHz, P1-PC ON, P IN =33dBm) -30 V =2.5V VDD =2.5V DD VDD =2.7V -40 V =2.7V -40 DD V =3.6V VDD =3.6V DD -50 -50 -60 -60 -70 -70 -80 -80 -90 -90 -50 0 50 o 100 -50 IIP3 vs Ambient Temperature 75 70 70 65 65 60 60 55 55 50 VDD =2.5V V =2.5V DD VDD =2.7V 45 VDD =3.6V 0 50 o 100 VDD =2.7V VDD =3.6V 40 -50 0 50 o 100 Ambient Temperature ( C) Ambient Temperature ( C) 3rd Harmonics vs Ambient Temperature 3rd Harmonics vs Ambient Temperature (f=1.9GHz, P1-PC ON, P =33dBm) (f=0.9GHz, P1-PC ON, P =35dBm) IN -30 IN 80 75 40 -50 100 (f=1870+1910MHz, P1-PC ON, P =24dBm) IN IN -30 VDD =2.5V V =2.5V DD VDD =2.7V -40 o IIP3 vs Ambient Temperature 80 45 50 Ambient Temperature ( C) (f=829+849MHz, P1-PC ON, P =24dBm) 50 0 Ambient Temperature ( C) VDD =2.7V -40 VDD =3.6V V =3.6V DD -50 -50 -60 -60 -70 -70 -80 -80 -90 -90 -50 0 50 o Ambient Temperature ( C) 100 -50 0 50 o 100 Ambient Temperature ( C) -9- NJG1647HD3 ! APPLICATION CIRCUIT (TOP VIEW) GND GND L1 CTL1 4 VDD=2.7V 3 C4 P1 C2 5 2 6 1 CTL2 P2 C3 C1 GND GND ! PARTS LIST No. C1~C3 Parameters 56pF Note C4 1000pF Murata MFG (GRM15) L1 82nH TDK (MLG0603) ! TEST PCB LAYOUT (TOP VIEW) P2 C3 1pin mark PC C1 PCB SIZE=19.4x15.0mm PCB: FR-4, t=0.2mm CAPACITOR: size 1005 INDUCTOR: size 0603 Strip Line Width=0.4mm(Zo=50Ω) C2 L1 ! Losses of PCB (Connector and DC blocking Capacitor losses are included) Frequency Loss (dB) (GHz) PC-P1 PC-P2 C4 GND P1 GND 0.9 0.23 0.21 1.9 0.33 0.30 CTL2 VDD CTL1 PRECAUTIONS [1] The DC blocking capacitors have to be placed at RF terminal of PC, P1 and P2. [2] To control the influence on the RF performance, the terminal of VDD should be connected with ground through the inductor L1 and the bypass capacitor C4. [3] For good RF performance, the ground terminals must be placed possibly close to ground plane of substrate, and through holes for GND should be placed near by the pin connection. - 10 - NJG1647HD3 ! PACKAGE OUTLINE (USB6-D3) 45 2.0±0.1 1.8±0.1 0.8±0.05 0.018(GND,Stand Off) A-A Cross Section 0.14±0.05 A 0.038±0.01 0.2±0.08 2 3 5 4 0.1±0.05 6 0.5±0.1 0.5±0.1 R0.075 Ground connection is required. 0.75±0.05 A 0.75±0.05 1.0±0.1 0.8±0.1 0.8±0.05 0.3 1 0.3±0.1 Cautions on using this product This product contains Gallium-Arsenide (GaAs) which is a harmful material. • Do NOT eat or put into mouth. • Do NOT dispose in fire or break up this product. • Do NOT chemically make gas or powder with this product. • To waste this product, please obey the relating law of your country. [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. This product may be damaged with electric static discharge (ESD) or spike voltage. Please handle with care to avoid these damages. - 11 -