SM5320A 5-channel Video Buffer with Built-in wideband LPF OVERVIEW The SM5320A is a 5-channel video buffer with built-in 5th-order lowpass filters. The HD block lowpass filter cutoff frequency range can adjust from 4.10MHz to 42.7MHz*1 by 256 steps. The lowpass filter supports 480i to 1080i format, video signal equipment analog input/outputs. For video input systems, the device functions as a next-stage ADC system anti-aliasing filter. For video output systems, the filter reduces video DAC aliasing and external noise and can drive up to 300Ω terminating resistance. The cutoff frequency and signal input type can be controlled using an I2C-BUS*2, and the I2C slave address can be set by ADS (3-state input) to allow up to three SM5320A on the same bus. The output gain can be varied in the range of 0dB ± 2.1dB (max step: 0.15dB) for each Y/C block and HD block individually using the I2C-BUS. *1. When the resistor connected to ISET (RISET) is 1.8kΩ. *2. I2C-BUS is a registered trademark of NXP B.V. ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ PINOUT Supply voltages • Analog: 4.75 to 5.25V • Digital: 3.0 to 5.5V Lowpass filter with adjustable cutoff frequency (256 steps) (CH-1 to CH-3) • Cutoff frequency range: 4.10MHz to 42.7MHz (RISET = 1.8kΩ) Filter bypass mode function for display specifications up to SXGA resolution (CH-1 to CH-3) • Passband: 80MHz (typ) Half fc mode switch function suitable for component signals (CH-2, CH-3) Video input pins can be independently set to synctip clamp/bias inputs (CH-1 to CH-3) Filter passband (± 1.5dB): 6MHz (CH-Y/C) Up to 300Ω terminating resistance drive capability Output gain: 0dB ± 2.1dB (max step: 0.15dB) Power-down function • ≤ 500µA current consumption when power-down I2C-BUS interface control • Slave address: 48h, 49h, or 4Ah (up to three devices can be used simultaneously, selected by ADS input) • Data transfer rate: Fast mode (up to 400kbit/s) Operating ambient temperature range: 0 to 70°C Package: 28-pin VSOP (Top view) CIN 1 28 COUT VCC4 VCC3 VDD YOUT SDA GND4 SCL VCC2 GND6 OUT3 VCC5 GND3 NC OUT2 ISET VCC1 GND1 OUT1 IN3 GND2 IN2 IN1 REF 15 14 (Unit: mm) + 0.15 − 0.1 0.05 ■ ■ 5.6 ± 0.2 HDTVs LCD TVs PDPs Projectors 0.5 ± 0.2 ■ ADS PACKAGE DIMENSIONS APPLICATIONS ■ GND5 YIN 7.6 ± 0.2 FEATURES 0.675TYP 9.8 ± 0.2 Device SM5320AV Package 28-pin VSOP 1.15 ± 0.1 ORDERING INFORMATION 0.10 ± 0.05 0 to 10 ° 0.65 + 0.1 0.22 - 0.05 0.10 0.12 M SEIKO NPC CORPORATION —1 SM5320A BLOCK DIAGRAM VDD GND1 ISET ADS SDA I2 C Control VREF Current Source SCL REF VCC1 YIN Clamp 5th order LPF (6MHz) Gain Control YOUT −2.1dB to + 2.1dB GND2 Gain Control COUT −2.1dB to + 2.1dB GND3 VREF VCC2 CIN Bias 5th order LPF (6MHz) CH-Y/C Bypass Clamp/ Bias IN1 VCC3 5th order LPF filter CH-1 Gain Control OUT1 −2.1dB to + 2.1dB GND4 Gain Control OUT2 −2.1dB to + 2.1dB GND5 Gain Control OUT3 −2.1dB to + 2.1dB GND6 Bypass Clamp/ Bias IN2 VCC4 5th order LPF filter CH-2 Bypass Clamp/ Bias IN3 VCC5 5th order LPF filter CH-3 Note. The recommended value of the external resistor (RISET) connected to ISET is 1.8kΩ. SEIKO NPC CORPORATION —2 SM5320A PIN DESCRIPTION Number Name I/O*1 A/D*2 1 CIN I A Video signal input (C) 2 YIN I A Video signal input (Y) 3 VCC4 – A Analog supply 4 4 VDD – D Digital supply 5 SDA I/O D I2C data signal input/output 6 SCL I D I2C clock signal input 7 GND6 – A Ground 6 8 VCC5 – A Analog supply 5 9 NC – – No connection 10 ISET – A Internal current-setting resistor (RISET) connection (standard 1.8kΩ) 11 GND1 – A Ground 1 12 IN3 I A Video signal input (CH-3) 13 IN2 I A Video signal input (CH-2) 14 IN1 I A Video signal input (CH-1) 15 ADS I D I2C slave address select (3-state input) 16 REF O A Internal reference voltage 17 GND2 – A Ground (Y/C block) 18 OUT1 O A Video signal output (CH-1) 19 VCC1 – A Analog supply 1 20 OUT2 O A Video signal output (CH-2) 21 GND3 – A Ground 3 22 OUT3 O A Video signal output (CH-3) 23 VCC2 – A Analog supply 2 24 GND4 – A Ground 4 25 YOUT O A Video signal output (Y) 26 VCC3 – A Analog supply 3 27 COUT O A Video signal output (C) 28 GND5 – A Ground 5 Description *1. I: input, O: output *2. A: analog, D: digital SEIKO NPC CORPORATION —3 SM5320A PIN EQUIVALENT CIRCUITS Number Name I/O*1 Equivalent circuit VCC 14 13 12 IN1 IN2 IN3 I INn GND VCC 25 27 18 20 22 YOUT COUT OUT1 OUT2 OUT3 YOUT COUT OUTn O GND VCC 16 REF REF O GND 2 YIN I YIN 130Ω SEIKO NPC CORPORATION —4 SM5320A Number Name I/O*1 1 CIN I Equivalent circuit 20kΩ CIN 130Ω 200Ω 5 SDA 250Ω I/O SDA GND 6 SCL 180Ω I SCL GND VCC 15 ADS I 250Ω ADS GND *1. I: input, O: output Note. Resistance values in the equivalent circuits indicate design values. SEIKO NPC CORPORATION —5 SM5320A SPECIFICATIONS Absolute Maximum Ratings VSS = GND1 = GND2 = GND3 = GND4 = GND5 = GND = 0V, VCC1 = VCC2 = VCC3 = VCC4 = VCC5 = VDD = VCC Parameter Symbol Condition Rating Unit Supply voltage VCC VCC1, VCC2, VCC3, VCC4, VCC5, VDD − 0.3 to 7.0 V Input voltage VIN ADS, SDA, SCL, INn (n = 1, 2, 3) GND – 0.3 to VCC + 0.3 V TSTG − 55 to + 125 °C Power dissipation*1 PD 1.2 W Junction temperature*1 TJ 125 °C Storage temperature range *1. Ta = 80°C, when mounted on NPC’s regulation substrate (112 × 80 × 1.6mm double layer glass-epoxy substrate with 180% wiring factor) Recommended Operating Conditions Parameter Symbol Condition Rating Unit Supply voltage 1 VCC VCC1, VCC2, VCC3, VCC4, VCC5 4.75 to 5.25 V Supply voltage difference ∆VCC Difference between VCC1 to VCC5 pin each ± 0.1 V Supply voltage 2 VDD VDD 3.0 to 5.5 V 0 to 70 °C Operating ambient temperature Ta Note. VCC1 to VCC5 should be applied simultaneously. Electrical Characteristics DC Characteristics VCC = 5.0V, VDD = 3.0 to 5.5V, Ta = 25°C, fin = 100kHz, VIN = 1.0Vp-p, RISET = 1.8kΩ, GS1 = 04h, GS2 = 04h, RL = 300Ω, CH-1 set to clamp input, CH-2 and CH-3 set to bias input, FCDATA = 227, unless otherwise noted. Rating Parameter Symbol Condition min typ max Unit Test level Current consumption 1*1 ICC1 Filter mode, FCDATA = 255 − 110 150 mA I Current consumption 2*1 ICC2 Filter bypass mode − 75 100 mA I Current consumption 3*1 ICC3 Power-down mode − – 500 µA I HIGH-level input voltage VIH1 SDA, SCL 0.7 VDD − − V I LOW-level Input voltage VIL1 SDA, SCL − − 0.3 VDD V I ADS HIGH-level input voltage VIH2 ADS 0.8 VCC − − V I ADS LOW-level input voltage VIL2 ADS − − 0.2 VCC V I ADS open-circuit input voltage VOPEN ADS VCC/2 − 0.2 − VCC/2 + 0.2 V I LOW-level input leakage current ILL SDA, SCL, VIN = 0V − − 1.0 µA I HIGH-level input leakage current ILH SDA, SCL, VIN = VDD − − 1.0 µA I SDA output voltage VOL SDA = LOW output, Sink current = 3mA 0 − 0.4 V I *1. Total of current consumption of VCC1, VCC2, VCC3, VCC4, VCC5 and VDD, when no input signals. SEIKO NPC CORPORATION —6 SM5320A AC Characteristics (I2C-BUS) VCC = 5.0V, VDD = 3.0 to 5.5V, Ta = 25°C, unless otherwise noted. Rating Unit Test level 400 kHz II − − µs II 1.3 − − µs II tHIGH 0.6 − − µs II SCL setup time (start condition) tSU;STA 0.6 − − µs II SDA data hold time tHD;DAT 0 − 0.9 µs II SDA data setup time tSU;DAT 100 − − ns II SDA, SCL rise time tr − − 300 ns II SDA, SCL fall time tf − − 300 ns II tSU;STO 0.6 − − µs II Ci − − 10 pF II Parameter Symbol Condition min typ max fSCL 0 − tHD;STA 0.6 SCL clock LOW-level pulsewidth tLOW SCL clock HIGH-level pulsewidth SCL clock frequency SCL hold time (start condition) SCL setup time (stop condition) SDA, SCL input capacitance SDA tf tLOW tr tr tSU;DAT tf tHD;STA SCL tHD;DAT tHD;STA S tSU;STA tHIGH Sr tSU;STO P Note. S, Sr: start condition, P: stop condition SEIKO NPC CORPORATION —7 SM5320A Analog Characteristics Analog input characteristics VCC = 5.0V, VDD = 3.0 to 5.5V, Ta = 25°C, fin = 100kHz, VIN = 1.0Vp-p, RISET = 1.8kΩ, GS1 = 04h, GS2 = 04h, RL = 300Ω, CH-1 set to clamp input, CH-2 and CH-3 set to bias input, FCDATA = 227, unless otherwise noted. Rating Parameter Symbol Condition min typ max Unit Test level Clamp voltage 1 VCLMP1 Clamp input, no signal input, IN1, IN2, IN3 1.80 2.00 2.20 V I Clamp voltage 2 VCLMP2 No signal input, YIN 1.45 1.65 1.85 V I Bias voltage 1 VBIAS1 Bias input, no signal input, IN1, IN2, IN3 2.25 2.45 2.65 V I Bias voltage 2 VBIAS2 No signal input, CIN 2.10 2.30 2.50 V I Input resistance RBIAS Bias input, IN1, IN2, IN3, CIN − 20 − kΩ II Input voltage (CH-1, CH-2, CH-3)*1 VAI1 THD < 1.0%, IN1, IN2, IN3 − − 1.4 Vp-p I Input voltage (Y)*1 VAI2 THD < 1.5%, YIN − − 1.4 Vp-p I Input voltage (C)*1 VAI3 THD < 1.5%, CIN − − 1.0 Vp-p I Crosstalk between channels XTLK fin = 1MHz, between each channel – 70 – dB II *1. This item represents values of maximum input signal amplitude in which the output distortion rate shown in the condition column is filled. When the signal amplitude that exceeds this specification value is input, the output distortion rate is deteriorated. When using this device, the input signal level should be set not to exceed the standard value of the signal amplitude. Filter and filter bypass mode frequency characteristics (CH-1, CH-2, CH-3) VCC = 5.0V, VDD = 3.0 to 5.5V, Ta = 25°C, fin = 100kHz, VIN = 1.0Vp-p, RISET = 1.8kΩ, GS1 = 04h, RL = 300Ω, CH-1 set to clamp input, CH-2 and CH-3 set to bias input, FCDATA = 227, unless otherwise noted. Rating Parameter Cutoff frequency Symbol Condition min typ max Unit Test level FC1 FCDATA = 0 − 4.10 − MHz II FC2 FCDATA = 10 4.99 5.68 6.37 MHz I FC3 FCDATA = 227 31.0 35.3 39.6 MHz I FC4 FCDATA = 255 − 42.7 − MHz II Half fc mode cutoff frequency ratio Rhalf1 Half fc mode, FCDATA = 10 44 49 54 % I Rhalf2 Half fc mode, FCDATA = 227 46 51 56 % I 4fc attenuation GSB fin ≥ 4fc, attenuation from fin = 100kHz − 50 − dB II Filter bypass mode passband*1 FBP Filter bypass mode, VIN = 0.7Vp-p 74.25 80 − MHz II *1. The passband that the attenuation from fin = 100kHz is ≤ 1dB. AVB (FBP) – AVB (100kHz) ≥ –1dB SEIKO NPC CORPORATION —8 SM5320A Frequency characteristics (CH-Y/C) VCC = 5.0V, VDD = 3.0 to 5.5V, Ta = 25°C, fin = 100kHz, VIN = 1.0Vp-p, RISET = 1.8kΩ, GS2 = 04h, RL = 300Ω, unless otherwise noted. Rating Parameter Symbol Condition Min Typ Max Unit Test level Passband attenuation FPB fin = 6MHz/100kHz – 1.5 0 1.5 dB I Stopband attenuation FSB fin= 27MHz/100kHz 30 40 − dB II Group delay deviation ∆TGD 100kHz to 5MHz − 10 − ns II Output characteristics (CH-1, CH-2, CH-3) VCC = 5.0V, VDD = 3.0 to 5.5V, Ta = 25°C, fin = 100kHz, VIN = 1.0Vp-p, RISET = 1.8kΩ, GS1 = 04h, RL = 300Ω, CH-1 set to clamp input, CH-2 and CH-3 set to bias input, FCDATA = 227, unless otherwise noted. Rating Parameter Symbol Condition min typ max Unit Test level Filter mode output gain 1 AVF1 GS1 = 04h − 0.5 0 0.5 dB I Filter mode output gain 2 AVF2 GS1 = 20h − 2.6 – 2.1 – 1.6 dB I Filter mode output gain 3 AVF3 GS1 = 1Fh 1.6 2.1 2.6 dB I – – 0.15 dB I Filter mode gain step width AVFstep Filter bypass mode output gain 1 AVB1 GS1 = 04h − 0.5 0 0.5 dB I Filter bypass mode output gain 2 AVB2 GS1 = 20h − 2.6 – 2.1 – 1.6 dB I Filter bypass mode output gain 3 AVB3 GS1 = 1Fh 1.6 2.1 2.6 dB I – – 0.15 dB I − ± 0.2 − dB I − − ± 0.2 dB I Filter bypass mode gain step width AVBstep Filter bypass mode gain error dAVBP Channel to channel gain error dAVCH Maximum output voltage Vout1 THD < 1.0% – 1.4 – Vp-p I Output distortion THD1 VIN = 1.4Vp-p − 0.2 1.0 % I Drive load resistance RL 1 load = 300Ω − − 1 load I I2C response time TIC Response time from ACK bit output when changing settings using I2C-BUS − − 1 µs II Gain error between filter mode and bypass mode SEIKO NPC CORPORATION —9 SM5320A Output characteristics (CH-Y/C) VCC = 5.0V, VDD = 3.0 to 5.5V, Ta = 25°C, fin = 100kHz, VIN = 1.0Vp-p, RISET = 1.8kΩ, GS2 = 04h, RL = 300Ω, unless otherwise noted. Rating Parameter Symbol Condition min typ max Unit Test level Output gain 1 AV1 GS2 = 04h − 0.5 0 0.5 dB I Output gain 2 AV2 GS2 = 20h − 2.6 – 2.1 – 1.6 dB I Output gain 3 AV3 GS2 = 1Fh 1.6 2.1 2.6 dB I Output gain step width AVstep – – 0.15 dB I Y to C gain error dAVYC − − ± 0.2 dB I Maximum output voltage (Y) Vout2 YOUT, THD < 1.5% – 1.4 – Vp-p I Maximum output voltage (C) Vout3 COUT, THD < 1.5% – 1.0 – Vp-p I Output distortion (Y) THD2 YOUT, VIN = 1.4Vp-p − 0.2 1.5 % I Output distortion (C) THD3 COUT, VIN = 1.0Vp-p − 0.2 1.5 % I Drive load resistance RL 1 load = 300Ω − − 1 load I Unit Test level V II Reference voltage characteristics VCC = 5.0V, VDD = 3.0 to 5.5V, Ta = 25°C, unless otherwise noted. Rating Parameter REF output voltage Symbol VR Condition REF min typ max − 2.65 − Test level The definition of “Test Level” shown in the electrical characteristic table is as follows. I : 100% of products tested at Ta = + 25°C. II : Guaranteed as result of design and characteristics evaluation. SEIKO NPC CORPORATION —10 SM5320A Evaluation Circuit Diagram I 2C Controller + 0.1µF 0.1µF 100µF 100µF + CIN COUT 300Ω 4.7µF YIN + 4.7µF IN3 + 4.7µF IN1 GND5 YIN COUT VCC4 VCC3 VDD YOUT SDA GND4 SCL VCC2 GND6 OUT3 VCC5 GND3 NC OUT2 ISET VCC1 GND1 OUT1 IN3 GND2 100µF + + IN2 REF IN1 ADS YOUT 300Ω 100µF + 4.7µF IN2 CIN + OUT3 300Ω 100µF + OUT2 300Ω 100µF + OUT1 300Ω + 1.8kΩ 10µF Note. This is a circuit only for the evaluation board of an electric characteristics. (It is not a recommended application circuit.) SEIKO NPC CORPORATION —11 SM5320A FUNCTIONAL DESCRIPTION I2C-BUS Control The SM5320A uses an I2C-BUS interface to set the following functions. 1) 2) 3) 4) 5) 6) Cutoff frequency (HD block) fc mode switching (1/2 cutoff frequency switching, HD block) Filter mode/filter bypass mode switching (HD block) Input type switching (sync-tip clamp, bias, HD block) Power-down function Gain setting The transfer rate of I2C-BUS corresponds to the fast-mode (up to 400kbit/s). Note that the SM5320A does not support a read function (IC is write only). Basic Cycle The write sequence is: SM5320A slave address → specific control register sub-address → write data. Data can be written to the SM5320A in successive bytes, as the sub-address for the register is incremented automatically after each byte. However, if the sub-address exceeds the address of the last register (03h), data write operation to the SM5320A register stops and the acknowledge signal is not returned. Single byte access S Slave address A Sub address A Data A P Multi byte access (address auto increment) S Slave address A Sub address A Data A Data A ... A Data A P S: START condition, P: STOP condition, A: acknowledge : drive master device : drive SM5320A Figure 1. Write sequence SEIKO NPC CORPORATION —12 SM5320A Slave Address The 7-bit slave address is selected using the ADS pin. When ADS = “L” the address is 48h (1001000b), when ADS = “H” the address is 49h (1001001b), and when ADS = “Z” (open) the address is 4Ah (1001010b). A maximum of three SM5320A devices can be connected to the same I2C-BUS simultaneously, and controlled independently by setting the slave address of each using the ADS pin. When writing to control register, send sub address of control register following slave address. SLAVE ADDRESS for control register write (1st byte) bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 (Hex) Description Name Value SLAVE ADDRESS R/W 1 0 0 1 0 0 0 0 90h Indicate to write when device's slave address is 48h (ADS = "L") 1 0 0 1 0 0 1 0 92h Indicate to write when device's slave address is 49h (ADS = "H") 1 0 0 1 0 1 0 0 94h Indicate to write when device's slave address is 4Ah (ADS = "Z") bit1 bit0 (Hex) SUB ADDRESS for control register write (2nd byte) bit7 bit6 bit5 bit4 bit3 bit2 Description Name SUB ADDRESS 0 0 0 0 0 0 0 0 00h Indicate to write control register 00h 0 0 0 0 0 0 0 1 01h Indicate to write control register 01h 0 0 0 0 0 0 1 0 02h Indicate to write control register 02h 0 0 0 0 0 0 1 1 03h Indicate to write control register 03h Value Control Register The SM5320A has a 4-byte control register. Register assign default Sub Addr. bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 (Hex) 00h FCM FC6 FC5 FC4 FC3 FC2 FC1 FC0 00h OUT1 to OUT3 fc control 01h CB5 CB4 CB3 CB2 CB1 CB0 BYP – 00h OUT1 to OUT3 input method and filter bypass setting 02h PD HALF GS15 GS14 GS13 GS12 GS11 GS10 00h OUT1 to OUT3 gain control 03h – – GS25 GS24 GS23 GS22 GS21 GS20 00h YOUT, COUT gain control Description SEIKO NPC CORPORATION —13 SM5320A Flag settings (1) Cutoff frequency Register name: FCM, FC Address: Sub address = 00h, bit7 to bit0 Flag name FCDATA FCM FC6 FC5 FC4 FC3 FC2 FC1 FC0 Cutoff frequency [MHz] FCSET 0 00h 0 0 0 0 0 0 0 0 4.10 1 01h 0 0 0 0 0 0 0 1 4.26 2 02h 0 0 0 0 0 0 1 0 4.42 Default : 125 7Dh 0 1 1 1 1 1 0 1 22.5 126 7Eh 0 1 1 1 1 1 1 0 22.7 127 7Fh 0 1 1 1 1 1 1 1 22.8 128 80h 1 0 0 0 0 0 0 0 7.53 129 81h 1 0 0 0 0 0 0 1 7.83 130 82h 1 0 0 0 0 0 1 0 8.12 : 253 FDh 1 1 1 1 1 1 0 1 42.2 254 FEh 1 1 1 1 1 1 1 0 42.5 255 FFh 1 1 1 1 1 1 1 1 42.7 (2) Input type switching (sync-tip clamp, bias) Register name: CB Address: Sub address = 01h, bit7 to bit2 Control register Sub address 01h bit5 bit4 INPUT Description bit7 bit6 bit3 bit2 IN1 * 0 Clamp * 1 Bias IN2 IN3 IN1: sync-tip clamp input (default) IN1: bias input * 0 Clamp * 1 Bias IN2: sync-tip clamp input (default) IN2: bias input * 0 Clamp * 1 Bias IN3: sync-tip clamp input (default) IN3: bias input Sets the input method of IN1, IN2, IN3. SEIKO NPC CORPORATION —14 SM5320A (3) Power-down mode select Register name: PD Address: Sub address = 02h, bit7 Control register Sub address 02h Description bit7 0 Normal operation (default) 1 Power-down mode. Current consumption: ≤ 500µA Sets the normal operation or power-down mode. (4) fc mode switching (1/2 cutoff frequency switching) Register name: HALF Address: Sub address = 02h, bit6 Control register Sub address 02h Description bit6 0 Standard fc mode. OUT1, OUT2, OUT3 cutoff frequency is identical. (default) 1 Half fc mode. OUT2, OUT3 cutoff frequency is 1/2 that of OUT1. Sets the standard fc mode or half fc mode. (5) Filter bypass mode Register name: BYP Address: Sub address = 01h, bit1 Control register Sub address 01h Description bit1 0 Filter mode. The signals is output to OUT1, OUT2, OUT3 passing through filter. (default) 1 Filter bypass mode. The signals is output to OUT1, OUT2, OUT3 without passing through filter. Sets the use or nonuse of filter. SEIKO NPC CORPORATION —15 SM5320A (6) Output gain setting Register name: GS1 Address: Sub address = 02h, bit5 to bit0 Control register Sub address 02h OUT1, OUT2, OUT3 gain control bit5 bit4 bit3 bit2 bit1 bit0 (HEX) (DEC) 1 0 0 0 0 0 20h – 32 – 2.10dB 1 0 0 0 0 1 21h – 31 – 2.05dB 1 0 0 0 1 0 22h – 30 – 2.00dB : 1 1 1 1 1 0 3Eh –2 – 0.35dB 1 1 1 1 1 1 3Fh –1 – 0.28dB 0 0 0 0 0 0 00h 0 – 0.21dB (default) 0 0 0 0 0 1 01h 1 – 0.15dB 0 0 0 0 1 0 02h 2 – 0.10dB 0 0 0 0 1 1 03h 3 – 0.05dB 0 0 0 1 0 0 04h 4 ± 0.00dB : 0 1 1 1 0 1 1Dh 29 + 1.94dB 0 1 1 1 1 0 1Eh 30 + 2.02dB 0 1 1 1 1 1 1Fh 31 + 2.10dB Sets the output gain of OUT1, OUT2, OUT3. Register name: GS2 Address: Sub address = 03h, bit5 to bit0 Control register Sub address 03h YOUT, COUT gain control bit5 bit4 bit3 bit2 bit1 bit0 (HEX) (DEC) 1 0 0 0 0 0 20h – 32 – 2.10dB 1 0 0 0 0 1 21h – 31 – 2.05dB 1 0 0 0 1 0 22h – 30 – 2.00dB : 1 1 1 1 1 0 3Eh –2 – 0.35dB 1 1 1 1 1 1 3Fh –1 – 0.28dB 0 0 0 0 0 0 00h 0 – 0.21dB (default) 0 0 0 0 0 1 01h 1 – 0.15dB 0 0 0 0 1 0 02h 2 – 0.10dB 0 0 0 0 1 1 03h 3 – 0.05dB 0 0 0 1 0 0 04h 4 ± 0.00dB : 0 1 1 1 0 1 1Dh 29 + 1.94dB 0 1 1 1 1 0 1Eh 30 + 2.02dB 0 1 1 1 1 1 1Fh 31 + 2.10dB Sets the output gain of YOUT, COUT. SEIKO NPC CORPORATION —16 SM5320A Lowpass Filter The SM5320A has built-in 5th-order lowpass filters with variable cutoff frequency. The cutoff frequency range is set by the resistor (RISET) connected between ISET and GND, and the cutoff frequency setting is determined by FCDATA data. The cutoff frequency vs. FCDATA values are listed in table 1, and shown graphically in figure 2. Table 1. Cutoff frequency vs. FCDATA (RISET = 1.8kΩ) FCDATA 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 FCSET (hex) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F Cutoff freq. [MHz] 4.10 4.26 4.42 4.58 4.74 4.90 5.06 5.21 5.36 5.52 5.68 5.83 5.99 6.14 6.30 6.45 6.59 6.79 6.94 7.09 7.23 7.38 7.53 7.67 7.80 7.95 8.10 8.25 8.40 8.55 8.70 8.85 8.97 9.13 9.28 9.43 9.58 9.74 9.89 10.0 10.2 10.3 10.5 10.6 10.8 10.9 11.1 11.2 11.4 11.5 11.7 11.8 12.0 12.1 12.3 12.4 12.6 12.7 12.9 13.0 13.2 13.3 13.5 13.6 FCDATA 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 FCSET (hex) 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F Cutoff freq. [MHz] 13.8 13.9 14.0 14.2 14.3 14.5 14.6 14.8 14.9 15.1 15.2 15.4 15.5 15.7 15.8 15.9 16.1 16.2 16.4 16.5 16.7 16.8 17.0 17.1 17.2 17.4 17.5 17.7 17.8 18.0 18.1 18.3 18.4 18.5 18.7 18.8 19.0 19.1 19.3 19.4 19.5 19.7 19.8 20.0 20.1 20.3 20.4 20.5 20.7 20.8 21.0 21.1 21.2 21.4 21.5 21.7 21.8 22.0 22.1 22.2 22.4 22.5 22.7 22.8 FCDATA 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 FCSET (hex) 80 81 82 83 84 85 86 87 88 89 8A 8B 8C 8D 8E 8F 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9E 9F A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF Cutoff freq. [MHz] 7.53 7.83 8.12 8.42 8.71 9.01 9.31 9.60 9.88 10.2 10.5 10.8 11.1 11.4 11.7 12.0 12.2 12.5 12.8 13.1 13.4 13.7 14.0 14.3 14.6 14.9 15.1 15.4 15.7 16.0 16.3 16.6 16.8 17.1 17.4 17.7 18.0 18.3 18.6 18.9 19.2 19.5 19.8 20.0 20.3 20.6 20.9 21.2 21.5 21.8 22.1 22.4 22.7 22.9 23.2 23.5 23.8 24.1 24.4 24.6 24.9 25.2 25.5 25.7 FCDATA 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 FCSET (hex) C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF Cutoff freq. [MHz] 26.0 26.2 26.5 26.8 27.0 27.3 27.6 27.8 28.1 28.4 28.7 28.9 29.2 29.4 29.7 30.0 30.2 30.5 30.8 31.0 31.3 31.6 31.8 32.1 32.4 32.6 32.9 33.2 33.5 33.7 34.0 34.3 34.5 34.7 35.0 35.3 35.5 35.8 36.1 36.4 36.6 36.9 37.2 37.4 37.7 37.9 38.2 38.5 38.8 39.0 39.3 39.6 39.8 40.1 40.3 40.6 40.9 41.1 41.4 41.7 42.0 42.2 42.5 42.7 SEIKO NPC CORPORATION —17 SM5320A 50 45 40 fc [MHz] 35 30 25 20 15 10 5 0 0 32 64 96 128 FCDATA 160 192 224 256 Figure 2. Cutoff frequency vs. FCDATA (RISET = 1.8kΩ) RISET RISET controls the internal current source, and its connection is essential. The recommended value (RISET) is 1.8kΩ. In power-down mode and filter bypass mode, no current flows into RISET. Note. A value other than 1.8kΩ will change the current consumption of SM5320A. In the determination of resistance value, caution should be taken to ensure the power dissipation does not exceed the absolute maximum rating for the package. Half fc Mode In half fc mode, the CH-2 and CH-3 cutoff frequency is 1/2 that of the CH-1 cutoff frequency setting. Half fc mode is useful for systems where the sampling frequency varies due to luminance (Y) and color difference signal (Cr, Cb) requirements as in component signals. Group Delay Characteristics The group delay varies with the cutoff frequency setting. Note also that in half fc mode, the group delay between CH-1 and CH-2/CH-3 varies. Filter Bypass Mode In filter bypass mode, the internal lowpass filter in SM5320A is bypassed and the signal is input to the output buffer stage directly. In filter bypass mode, the input type and output gain are set just as for filter mode. But the cutoff frequency setting and fc mode setting have no effect on the outputs. In this mode, the passband frequency is 80MHz (typ), which can support SXGA-class signals. Power-ON Reset When power is applied, an internal power-ON reset circuit operates initializing the internal register flags to their default settings. At power-ON, all supplies should be applied simultaneously. Reference Voltage (REF) The REF pin is internal reference voltage output. A 10 µF capacitor connected between pin and ground is recommended for stability of movement. SEIKO NPC CORPORATION —18 SM5320A USAGE PRECAUTIONS Slave Address (4Ah) Setting When slave address 4Ah is used, the ADS input must be left open circuit. In this case, an external resistor should be connected as shown in figure 3 to reduce the risk of malfunction in the I2C-BUS interface due to large external spikes or other noise invaded from outside. The recommended value is 10kΩ. VDD 10k ADS 10k GND Slave address = 4Ah Figure 3. Slave address 4Ah setting Power Supply Invest Timing The SM5320A uses 2-type power supply, analog one (VCC1, VCC2, VCC3, VCC4, VCC5) and digital one (VDD). Therefore all power supply pins should be forced voltage at the same time power supply invested. In the case analog power supply and digital one are set up separately, composing system the time-lag to makes short time as standard under 1ms is need. And if voltage of digital power supply comes higher than one of analog power supply, it is necessary to set voltage of digital power supply to make potential difference bellow 250mV as compared with voltage of analog one. SEIKO NPC CORPORATION —19 SM5320A TYPICAL CHARACTERISTICS Phase 1 10 Frequency [MHz] 6 0 –6 Gain –12 –18 –24 Phase –30 –36 –42 –48 –54 –60 0.1 1 10 Frequency [MHz] 360 270 180 90 0 –90 –180 –270 –360 –450 –540 –630 100 Figure 8. Gain and Phase characteristics (half fc mode, FCDATA = 10) 330 300 270 240 210 180 150 120 90 60 30 0 20 Gain Group delay 0 5 10 15 Frequency [MHz] Group delay [ns] Gain [dB] Figure 7. Gain and Group delay characteristics (standard fc mode, FCDATA = 10) Phase [deg] Gain [dB] Figure 6. Gain and Phase characteristics (standard fc mode, FCDATA = 10) 6 0 –6 –12 –18 –24 –30 –36 –42 –48 –54 –60 Group delay [ns] Gain 360 270 180 90 0 –90 –180 –270 –360 –450 –540 –630 100 330 300 270 Gain 240 210 180 150 120 90 60 30 Group delay 0 0 10 20 30 40 50 60 70 80 90 Frequency [MHz] 6 0 –6 Gain –12 –18 –24 –30 Group delay –36 –42 –48 –54 –60 0 2 4 6 Frequency [MHz] 8 330 300 270 240 210 180 150 120 90 60 30 0 10 Group delay [ns] 6 0 –6 –12 –18 –24 –30 –36 –42 –48 –54 –60 0.1 6 0 –6 –12 –18 –24 –30 –36 –42 –48 –54 –60 Figure 5. Gain and Group delay characteristics (filter bypass mode) Phase [deg] Gain [dB] Figure 4. Gain and Phase characteristics (filter bypass mode) Gain [dB] 1 10 Frequency [MHz] 360 270 180 90 0 –90 –180 –270 –360 –450 –540 –630 100 Gain [dB] 6 0 –6 Gain –12 –18 Phase –24 –30 –36 –42 –48 –54 –60 0.1 Phase [deg] Gain [dB] VCC = 5.0V, VDD = 3.0 to 5.5V, Ta = 25°C, fin = 100kHz, VIN = 1.0Vp-p, RISET = 1.8kΩ, RL = 300Ω, CH-1 set to clamp input, CH-2 and CH-3 set to bias input, FCDATA = 227, unless otherwise noted. Figure 9. Gain and Group delay characteristics (half fc mode, FCDATA = 10) SEIKO NPC CORPORATION —20 1 10 Frequency [MHz] 100 1 10 Frequency [MHz] 360 270 180 90 0 –90 –180 –270 –360 –450 –540 –630 100 Figure 14. Gain and Phase characteristics (CH = Y/C) 0 10 20 30 40 Frequency [MHz] 6 0 –6 –12 –18 –24 –30 –36 –42 –48 –54 –60 Gain Group delay 0 10 20 30 40 Frequency [MHz] 330 300 270 240 210 180 150 120 90 60 30 0 50 Group delay [ns] Gain [dB] Figure 13. Gain and Group delay characteristics (half fc mode, FCDATA = 227) Phase [deg] Gain [dB] Figure 12. Gain and Phase characteristics (half fc mode, FCDATA = 227) 6 0 –6 Gain –12 –18 Phase –24 –30 –36 –42 –48 –54 –60 0.1 Group delay Group delay [ns] 360 270 180 90 0 –90 –180 –270 –360 –450 –540 –630 Gain 330 300 270 240 210 180 150 120 90 60 30 0 50 6 0 –6 –12 –18 –24 –30 –36 –42 –48 –54 –60 Gain Group delay 0 5 10 15 Frequency [MHz] 330 300 270 240 210 180 150 120 90 60 30 0 20 Group delay [ns] 6 0 –6 Gain –12 –18 Phase –24 –30 –36 –42 –48 –54 –60 0.1 6 0 –6 –12 –18 –24 –30 –36 –42 –48 –54 –60 Figure 11. Gain and Group delay characteristics (standard fc mode, FCDATA = 227) Phase [deg] Gain [dB] Figure 10. Gain and Phase characteristics (standard fc mode, FCDATA = 227) Gain [dB] 100 360 270 180 90 0 –90 –180 –270 –360 –450 –540 –630 Gain [dB] 6 0 –6 Gain –12 –18 Phase –24 –30 –36 –42 –48 –54 –60 0.1 1 10 Frequency [MHz] Phase [deg] Gain [dB] SM5320A Figure 15. Gain and Group delay characteristics (CH = Y/C) SEIKO NPC CORPORATION —21 SM5320A 140 140 120 120 *1 ICC1 80 *2 ICC2 60 80 40 20 20 4.75 5 5.25 VCC [V] *1. filter mode, FCDATA = 255 *2. filter bypass mode 0 –20 5.5 Figure 16. ICC1, 2 vs. VCC 0 20 40 60 80 Ta [°C] *1. filter mode, FCDATA = 255 *2. filter bypass mode 500 500 400 400 300 300 200 100 200 100 0 4.5 4.75 5 5.25 0 –20 5.5 0 20 VCC [V] 3 3 2 2 1 1 0 –1 –2 –2 5 5.25 VCC [V] Figure 20. Gain vs. VCC 80 100 0 –1 4.75 40 60 Ta [°C] Figure 19. ICC3 vs. Ta Gain [dB] Gain [dB] Figure 18. ICC3 vs. VCC –3 4.5 100 Figure 17. ICC1, 2 vs. Ta ICC3 [µA] ICC3 [µA] ICC2*2 60 40 0 4.5 ICC1*1 100 ICC [mA] ICC [mA] 100 5.5 –3 –20 0 20 40 60 Ta [°C] 80 100 Figure 21. Gain vs. Ta SEIKO NPC CORPORATION —22 SM5320A Please pay your attention to the following points at time of using the products shown in this document. The products shown in this document (hereinafter “Products”) are not intended to be used for the apparatus that exerts harmful influence on human lives due to the defects, failure or malfunction of the Products. Customers are requested to obtain prior written agreement for such use from SEIKO NPC CORPORATION (hereinafter “NPC”). Customers shall be solely responsible for, and indemnify and hold NPC free and harmless from, any and all claims, damages, losses, expenses or lawsuits, due to such use without such agreement. NPC reserves the right to change the specifications of the Products in order to improve the characteristic or reliability thereof. NPC makes no claim or warranty that the contents described in this document dose not infringe any intellectual property right or other similar right owned by third parties. Therefore, NPC shall not be responsible for such problems, even if the use is in accordance with the descriptions provided in this document. Any descriptions including applications, circuits, and the parameters of the Products in this document are for reference to use the Products, and shall not be guaranteed free from defect, inapplicability to the design for the mass-production products without further testing or modification. Customers are requested not to export or re-export, directly or indirectly, the Products to any country or any entity not in compliance with or in violation of the national export administration laws, treaties, orders and regulations. Customers are requested appropriately take steps to obtain required permissions or approvals from appropriate government agencies. SEIKO NPC CORPORATION 15-6, Nihombashi-kabutocho, Chuo-ku, Tokyo 103-0026, Japan Telephone: +81-3-6667-6601 Facsimile: +81-3-6667-6611 http://www.npc.co.jp/ Email: [email protected] NC0608AE 2007.02 SEIKO NPC CORPORATION —23