5309b_nc0609be

SM5309B
3-channel Video Buffer with Built-in wideband LPF
OVERVIEW
The SM5309B is a 3-channel video buffer with built-in 5th-order lowpass filters. The lowpass filter cutoff frequency range can adjust from 4MHz to 40MHz*1 by 256 steps. The lowpass filter supports 480i to 1080i format, video signal equipment analog input/outputs. For video input systems, the device functions as a next-stage
ADC system anti-aliasing filter. For video output systems, the filter reduces video DAC aliasing and external
noise and can drive up to two 75Ω terminating resistance. The cutoff frequency and signal input type can be
controlled using an I2C-BUS*2, and the I2C slave address can be set by ADS (3-state input) to allow up to three
SM5309B on the same bus.
*1. When the resistor connected to ISET (RISET) is 1.8kΩ.
*2. I2C-BUS is a registered trademark of NXP B.V.
FEATURES
■
■
■
■
■
■
■
■
1
24
REF1
GND
REF2
ISET
VCC
NC
OUT1
IN2A
GND
IN2B
OUT2
VCC
VCC
IN3A
OUT3
IN3B
GND
MUXSEL
SCL
VDD
■
■
(Unit: mm)
+ 0.1
0.15 − 0.05
7.9 ± 0.2
HDTVs
LCD TVs
PDPs
Projectors
ORDERING INFORMATION
Device
Package
SM5309BV
24-pin VSOP
SDA
PACKAGE DIMENSIONS
1.15 ± 0.1
■
13
12
APPLICATIONS
■
ADS
IN1B
0.5 ± 0.2
■
IN1A
0.65
0.10
+ 0.1
0.22 − 0.05
0.12 M
0 to 10
0.10 ± 0.05
■
(Top view)
7.6 ± 0.2
■
Supply voltages
• Analog: 4.75 to 5.25V
• I2C-BUS interface: 3.0 to 5.5V
Lowpass filter with adjustable cutoff frequency
(256 steps)
• Cutoff frequency range: 4MHz to 40MHz
(RISET = 1.8kΩ)
Filter bypass mode function for display specifications up to SXGA resolution
• Passband: 80MHz (typ)
Half fc mode switch function (CH-2, CH-3) suitable for component signals
2-system input multiplexer function
(switchable using I2C-BUS or MUXSEL input)
Video input pins can be independently set to synctip clamp/bias/direct inputs
Up to two 75Ω terminating resistance drive capability
Output gain: 0dB
Power-down function
• ≤ 1mA current consumption when power-down
I2C-BUS interface control
• Slave address: 90h, 92h, or 94h
(up to three devices can be used simultaneously,
selected by ADS input)
• Data transfer rate: Fast mode (up to 400kbit/s)
Operating ambient temperature range: 0 to 70°C
Package: 24-pin VSOP
5.6 ± 0.2
■
PINOUT
SEIKO NPC CORPORATION —1
SM5309B
BLOCK DIAGRAM
VDD
ADS MUXSEL
ISET
REF1
SDA
SCL
Vref
Current Source
I 2C Control
Bypass
IN1A
IN1B
VCC
Clamp/Bias/Direct
MUX
5th Order
LPF
Clamp/Bias/Direct
0dB
GND
Bypass
Clamp/Bias/Direct
IN2B
Clamp/Bias/Direct
MUX
5th Order
LPF
VCC
0dB
GND
Bypass
VCC
Clamp/Bias/Direct
MUX
IN3B
Clamp/Bias/Direct
OUT2
Filter
CH-2
IN3A
OUT1
Filter
CH-1
IN2A
REF2
5th Order
LPF
0dB
OUT3
Filter
GND
CH-3
Note. The recommended value of the external resistor (RISET) connected to ISET is 1.8kΩ.
SEIKO NPC CORPORATION —2
SM5309B
PIN DESCRIPTION
Number
Name
I/O*1
A/D*2
1
IN1A
I
A
Video signal input (CH-1, input A)
2
IN1B
I
A
Video signal input (CH-1, input B)
3
GND
–
A
Ground
4
ISET
–
A
Internal current-setting resistor (RISET) connection (standard 1.8kΩ)
5
NC
–
–
No connection
6
IN2A
I
A
Video signal input (CH-2, input A)
7
IN2B
I
A
Video signal input (CH-2, input B)
8
VCC
–
A
Analog supply
9
IN3A
I
A
Video signal input (CH-3, input A)
10
IN3B
I
A
Video signal input (CH-3, input B)
11
MUXSEL
I
D
Input multiplexer switch control
L (GND): INnA select
H (VCC): INnB select
12
SCL
I
D
I2C-BUS clock signal input
13
SDA
I/O
D
I2C-BUS data signal input/output
14
VDD
–
D
I2C-BUS interface supply
15
GND
–
A
Ground
16
OUT3
O
A
Video signal output (CH-3)
17
VCC
–
A
Analog supply
18
OUT2
O
A
Video signal output (CH-2)
19
GND
–
A
Ground
20
OUT1
O
A
Video signal output (CH-1)
21
VCC
–
A
Analog supply
22
REF2
O
A
Internal reference voltage 2
23
REF1
O
A
Internal reference voltage 1
D
I2C-BUS slave address select (3-state input)
L (GND): 90h
H (VCC): 92h
Open: 94h
24
ADS
I
Description
*1. I: input, O: output
*2. A: analog, D: digital
SEIKO NPC CORPORATION —3
SM5309B
PIN EQUIVALENT CIRCUITS
Number
Name
I/O*1
Equivalent circuit
VCC
1
2
6
7
9
10
IN1A
IN1B
IN2A
IN2B
IN3A
IN3B
I
INnA
INnB
GND
VCC
20
18
16
OUT1
OUT2
OUT3
O
OUTn
GND
VCC
23
REF1
O
REF1
GND
VCC
REF2
22
REF2
O
GND
SEIKO NPC CORPORATION —4
SM5309B
Number
Name
I/O*1
Equivalent circuit
VDD
250Ω
13
SDA
SDA
I/O
GND
VDD
180Ω
12
SCL
SCL
I
GND
VCC
11
MUXSEL
180Ω
I
MUXSEL
GND
VCC
24
ADS
I
250Ω
ADS
GND
*1. I: input, O: output
Note. Resistance values in the equivalent circuits indicate design values.
SEIKO NPC CORPORATION —5
SM5309B
SPECIFICATIONS
Absolute Maximum Ratings
GND = 0V, VCC = VDD = VCC
Parameter
Symbol
Condition
Supply voltage
VCC
VCC, VDD
Input voltage
VIN
ADS, SDA, SCL, INn (n = 1, 2, 3)
Rating
Unit
− 0.3 to 7.0
V
GND – 0.3 to VCC + 0.3
V
TSTG
− 55 to + 125
°C
Power dissipation*1
PD
1.1
W
Junction temperature*1
TJ
125
°C
Storage temperature range
*1. Ta = 80°C, when mounted on NPC’s regulation substrate (110 × 65 × 1.6mm double layer glass-epoxy substrate with 160% wiring factor)
Recommended Operating Conditions
Parameter
Symbol
Condition
Rating
Unit
Supply voltage 1
VCC
VCC
4.75 to 5.25
V
Supply voltage 2
VDD
VDD
3.0 to 5.5
V
0 to 70
°C
Operating ambient temperature
Ta
Note. VCC should be applied simultaneously.
Electrical Characteristics
DC Characteristics
VCC = 5.0V, VDD = 3.0 to 5.5V, Ta = 25°C, fin = 100kHz, VIN = 1.0Vp-p, RISET = 1.8kΩ, RL = 75Ω,
CH-1 set to clamp input, CH-2 and CH-3 set to bias input, FCDATA = 227, unless otherwise noted.
Rating
Parameter
Symbol
Condition
Unit
Test
level
min
typ
max
Filter mode, FCDATA = 0
−
95
130
mA
I
ICC2
Filter mode, FCDATA = 255
−
105
145
mA
I
ICC3
Filter bypass mode
−
75
100
mA
I
ICC4
Power-down mode
−
−
1.0
mA
I
HIGH-level input voltage
VIH1
SDA, SCL
0.7 VDD
−
−
V
I
LOW-level Input voltage
VIL1
SDA, SCL
−
−
0.3 VDD
V
I
ADS, MUXSEL HIGH-level input
voltage
VIH2
ADS, MUXSEL
0.8 VCC
−
−
V
I
ADS, MUXSEL LOW-level input
voltage
VIL2
ADS, MUXSEL
−
−
0.2 VCC
V
I
ADS open-circuit input voltage
VOPEN
VCC/2
− 0.2
−
VCC/2
+ 0.2
V
I
Current consumption 1*1
ICC1
Current consumption 2*1
Current consumption 3*1
Current consumption 4*1
ADS
LOW-level input leakage current
ILL
SDA, SCL, VIN = 0V
−
−
1.0
µA
I
HIGH-level input leakage current
ILH
SDA, SCL, VIN = VDD
−
−
1.0
µA
I
SDA output voltage
VOL
SDA = LOW output,
Sink current = 3mA
0
−
0.4
V
I
*1. Total of current consumption of VCC and VDD, when no input signals.
SEIKO NPC CORPORATION —6
SM5309B
AC Characteristics (I2C-BUS)
VCC = 5.0V, VDD = 3.0 to 5.5V, Ta = 25°C, unless otherwise noted.
Rating
Unit
Test
level
400
kHz
II
−
−
µs
II
1.3
−
−
µs
II
tHIGH
0.6
−
−
µs
II
SCL setup time (start condition)
tSU;STA
0.6
−
−
µs
II
SDA data hold time
tHD;DAT
0
−
0.9
µs
II
SDA data setup time
tSU;DAT
100
−
−
ns
II
SDA, SCL rise time
tr
−
−
300
ns
II
SDA, SCL fall time
tf
−
−
300
ns
II
tSU;STO
0.6
−
−
µs
II
Ci
−
−
10
pF
II
Parameter
Symbol
Condition
min
typ
max
fSCL
0
−
tHD;STA
0.6
SCL clock LOW-level pulsewidth
tLOW
SCL clock HIGH-level pulsewidth
SCL clock frequency
SCL hold time (start condition)
SCL setup time (stop condition)
SDA, SCL input capacitance
SDA
tf
tLOW
tr
tr
tSU;DAT
tf
tHD;STA
SCL
tHD;DAT
tHD;STA
S
tSU;STA
tHIGH
Sr
tSU;STO
P
Note. S, Sr: start condition, P: stop condition
SEIKO NPC CORPORATION —7
SM5309B
Analog Characteristics
Analog input characteristics
VCC = 5.0V, VDD = 3.0 to 5.5V, Ta = 25°C, fin = 100kHz, VIN = 1.0Vp-p, RISET = 1.8kΩ, RL = 75Ω,
CH-1 set to clamp input, CH-2 and CH-3 set to bias input, FCDATA = 227, unless otherwise noted.
Internal mode settings are shown in table 1 in "Mode Condition Settings".
Rating
Parameter
Symbol
Condition
min
typ
max
Unit
Test
level
Clamp voltage
VCLMP
Clamp input, no signal input
1.6
1.8
2.0
V
I
Bias voltage
VBIAS
Bias input, no signal input
2.1
2.3
2.5
V
I
Input resistance
RBIAS
Bias input
−
20
−
kΩ
II
VAI1
Mode: b (bias), THD < 1.0%
−
−
1.4
Vp-p
I
VAI2
Mode: c (clamp), THD < 1.0%
−
−
1.4
Vp-p
I
VAI3
Mode: f (bias), THD < 1.0%
−
−
1.4
Vp-p
I
VAI4
Mode: g (clamp), THD < 1.0%
–
−
1.4
Vp-p
I
VIDC
Direct mode, THD < 1.5%,
VIN < 1.4Vp-p
1.5
−
3.2
V
I
Filter mode input voltage
Bypass mode input voltage
Direct mode input
DC voltage range
Note. This item represents values of maximum input signal amplitude in which the output distortion rate shown in the condition column is filled. When the
signal amplitude that exceeds this specification value is input, the output distortion rate is deteriorated. When using this device, the input signal level
should be set not to exceed the standard value of the signal amplitude.
Filter mode and bypass mode frequency characteristics
VCC = 5.0V, VDD = 3.0 to 5.5V, Ta = 25°C, fin = 100kHz, VIN = 1.0Vp-p, RISET = 1.8kΩ, RL = 75Ω,
CH-1 set to clamp input, CH-2 and CH-3 set to bias input, FCDATA = 227, unless otherwise noted.
Rating
Parameter
Symbol
Condition
min
typ
max
Unit
Test
level
FC1
FCDATA = 0
–
4.05
–
MHz
II
FC2
FCDATA = 10
4.98
5.66
6.34
MHz
I
FC3
FCDATA = 227
29.70
33.75
37.80
MHz
I
FC4
FCDATA = 255
–
40.60
–
MHz
II
Rhalf1
Half fc mode, FCDATA = 10
44
49
54
%
I
Rhalf2
Half fc mode, FCDATA = 227
48
53
58
%
I
4fc attenuation
GSB
fin ≥ 4fc, attenuation from fin = 100kHz
−
50
−
dB
II
Filter bypass mode passband
FBP
VIN = 1.0Vp-p, Gain = − 1dB
74.25
80
−
MHz
II
Cutoff frequency
Half fc mode cutoff frequency
ratio
SEIKO NPC CORPORATION —8
SM5309B
Analog output characteristics
VCC = 5.0V, VDD = 3.0 to 5.5V, Ta = 25°C, fin = 100kHz, VIN = 1.0Vp-p, RISET = 1.8kΩ, RL = 75Ω,
CH-1 set to clamp input, CH-2 and CH-3 set to bias input, FCDATA = 227, unless otherwise noted.
Internal mode settings are shown in table 1 in "Mode Condition Settings".
Rating
Parameter
Symbol
Condition
min
typ
max
Unit
Test
level
Filter mode output gain
AVF
− 0.5
0
0.5
dB
I
Filter bypass mode output gain
AVB
− 0.5
0
0.5
dB
I
Filter bypass mode gain error
dAVBP
−
± 0.2
−
dB
I
Channel to channel gain error
dAVCH
−
−
± 0.2
dB
I
Gain error between filter mode and
bypass mode
Vout
Mode: b, c, THD < 1.0%
–
1.4
–
Vp-p
I
THDB
Mode: b, fin = 100kHz, VIN = 1.4Vp-p
−
0.2
1.0
%
I
THDC
Mode: c, fin = 100kHz, VIN = 1.4Vp-p
−
0.2
1.0
%
I
Channel to channel crosstalk
XTLK1
1.0Vp-p input, fin = 1MHz,
between 2 channels
−
− 71
−
dB
II
MUX input to input crosstalk
XTLK2
1.0Vp-p input, fin = 1MHz,
between INnA and INnB
–
− 50
−
dB
II
Maximum output voltage
Output distortion
Drive load resistance
RL
1 load = 150Ω
−
−
2
load
I
I2C response time
TIC
Response time from ACK bit output
when changing settings using I2C-BUS
−
−
1
µs
II
Unit
Test
level
Reference voltage characteristics
VCC = 5.0V, VDD = 3.0 to 5.5V, Ta = 25°C, unless otherwise noted.
Rating
Parameter
REF output voltage
Symbol
Condition
min
typ
max
VR1
REF1
−
3.35
−
V
II
VR2
REF2
−
2.45
−
V
II
Test level
The definition of “Test Level” shown in the electrical characteristic table is as follows.
I : 100% of products tested at Ta = + 25°C.
II : Guaranteed as result of design and characteristics evaluation.
SEIKO NPC CORPORATION —9
SM5309B
Mode Condition Settings
Table 1. Mode settings
Input type
Mode setting
fc mode
a
CH-1
CH-2
CH-3
Clamp
Bias
Bias
b
Bias
c
Clamp
d
Bias
e
Clamp
f
Bias
g
Clamp
Filter/Bypass mode
Standard
Filter
Half
−
h
Bypass
Standard
Filter
i
Direct
Half
−
j
Bypass
Evaluation Circuit Diagram
VCC
VDD
VCC
1µF
10µF
+
+
10µF
0.1µF
+
+
+
IN1A
100µF 0.1µF
100µF
1µF
IN2A
+
1µF
IN3A
+
IN1A
ADS
IN1B
REF1
GND
REF2
ISET
VCC
NC
1µF
IN1B
+
1µF
IN2B
+
IN3B
+
OUT1
75Ω
OUT1
IN2A
GND
IN2B
OUT2
VCC
VCC
IN3A
OUT3
IN3B
GND
MUXSEL
VDD
SCL
1µF
100µF
SDA
100µF
+
OUT2
75Ω
100µF
+
VCC
OUT3
75Ω
+
I 2C Controller
1.8kΩ
100pF
SEIKO NPC CORPORATION —10
SM5309B
FUNCTIONAL DESCRIPTION
I2C-BUS Control
The SM5309B uses an I2C BUS interface to set the following functions.
1)
2)
3)
4)
5)
6)
Cutoff frequency
Input multiplexer selection
fc mode switching (1/2 cutoff frequency switching)
Filter mode/filter bypass mode switching
Input type switching (sync-tip clamp, bias, direct)
Power-down function
The transfer rate of I2C-BUS corresponds to the fast-mode (up to 400kbit/s). Note that the SM5309B does not
support a read function (IC is write only).
Basic cycle
SDA
SCL
Start condition
Stop condition
I2C-BUS start/stop condition
The basic access cycle comprises the following elements.
1)
2)
3)
4)
5)
Start condition
1st byte: Slave address
2nd byte: Subaddress
3rd byte: Control data
Stop condition
If the input data does not match the slave address or the subaddress is incorrect, the corresponding ACK
(acknowledge) bit is not output LOW. However, the ACK bit is output after 3rd byte irrespective of the byte
data. Also note that the IC does not support a subaddress auto-increment function, hence each subaddress
access requires all the basic cycle steps 1 to 5.
Start
SDA
1st byte:Slave address
D7
D6
D1
2nd byte:Subaddress
D0
3rd byte:Control data
Stop
ACK
D7
D6
D1
D0
ACK
D7
D6
D1
D0
ACK
9
1
2
7
8
9
1
2
7
8
9
Low
SCL
1
2
7
8
SEIKO NPC CORPORATION —11
SM5309B
1st byte: slave address
The ADS pin can set one of three slave addresses. Note that D0 must be “0 (Write)”. The input circuit of ADS
pin is placed in analog supply (VCC, GND) area.
1st byte: slave address
ADS
HEX
D7
D6
D5
D4
D3
D2
D1
D0
L: GND
90h
1
0
0
1
0
0
0
0 (W)
H: VCC
92h
1
0
0
1
0
0
1
0 (W)
Open
94h
1
0
0
1
0
1
0
0 (W)
2nd byte: subaddress
The 2nd byte sets the subaddress, selecting one of three registers.
2nd byte: subaddress
Register name
HEX
D7
D6
D5
D4
D3
D2
D1
D0
FCSET
01h
0
0
0
0
0
0
0
1
CONDITION1
02h
0
0
0
0
0
0
1
0
CONDITION2
03h
0
0
0
0
0
0
1
1
3rd byte: control data
The 3rd byte control data sets the register flags corresponding to the subaddress selected by 2nd byte. The flags
assigned are shown in the following table.
3rd byte: control data
Register name
D7
D6
D5
D4
D3
D2
D1
D0
FCSET
FCM
FC6
FC5
FC4
FC3
FC2
FC1
FC0
CONDITION1
CB5
CB4
CB3
CB2
CB1
CB0
−
–
CONDITION2
PD
MUX
HALF
BYPASS
−
–
−
−
SEIKO NPC CORPORATION —12
SM5309B
Flag settings
(1) Cutoff frequency
Register name: FCSET
Flag names: FCM, FC [6:0]
The FCSET register setting sets the cutoff frequency using one of two tuning adjustment functions, thus a
total of 256 steps are possible.
Flag name
FCDATA
FCM
FC6
FC5
FC4
FC3
FC2
FC1
FC0
Cutoff
frequency
[MHz]
FCSET
0
00h
0
0
0
0
0
0
0
0
4.05
1
01h
0
0
0
0
0
0
0
1
4.22
2
02h
0
0
0
0
0
0
1
0
4.38
Default
:
125
7Dh
0
1
1
1
1
1
0
1
22.46
126
7Eh
0
1
1
1
1
1
1
0
22.60
127
7Fh
0
1
1
1
1
1
1
1
22.74
128
80h
1
0
0
0
0
0
0
0
7.40
129
81h
1
0
0
0
0
0
0
1
7.70
130
82h
1
0
0
0
0
0
1
0
7.99
:
253
FDh
1
1
1
1
1
1
0
1
40.10
254
FEh
1
1
1
1
1
1
1
0
40.35
255
FFh
1
1
1
1
1
1
1
1
40.60
(2) Input type switching (sync-tip clamp, bias, direct)
Register name: CONDITION1
Flag names: CB [5:4], CB [3:2], CB [1:0]
These flags set the input type of CH-1, CH-2, and CH-3 to one of three types: sync-tip clamp input, bias
input, or direct input.
Channel
CH-1
CH-2
CH-3
Flag name
CB5
CB3
CB1
CB4
CB2
CB0
Input type
L
L
Sync-tip clamp input
L
H
Bias input
H
Don't care
Direct input*1
Default
*1. An input coupling capacitor should not be connected when direct input is selected.
SEIKO NPC CORPORATION —13
SM5309B
(3) Power-down mode select
Register name: CONDITION2
Flag name: PD
This flag selects standard/power-down for the analog block.
Flag name
Mode
Default
PD
L
Standard (normal operation)
H
Power-down (no operation)
(4) Input multiplexer selection
Register name: CONDITION2
Flag name: MUX
This flag selects the A or B input for all three channels (IN1×, IN2×, IN3×). Note that this flag is significant
only when the MUXSEL input is LOW. See “Input Multiplexer Switching (MUXSEL)”.
Flag name
Input selection*1
Default
MUX
L
INnA
H
INnB
*1. n = 1, 2, 3
(5) fc mode switching (1/2 cutoff frequency switching)
Register name: CONDITION2
Flag name: HALF
This flag switches the cutoff frequency of CH-2 and CH-3 to divide the value set by the FCSET register into
halves. Note that the CH-1 cutoff frequency cannot be switched to 1/2. This mode is suitable for systems
where the sampling frequency varies due to Y, Cr, and Cb requirements, such as component signals.
Flag name
fc mode
Default
HALF
L
Standard fc mode
(CH-1, CH-2, CH-3 cutoff frequency is identical)
H
Half fc mode
(CH-2, CH-3 cutoff frequency is 1/2 that of CH-1)
(6) Filter bypass mode
Register name: CONDITION2
Flag name: BYPASS
This flag allows the internal lowpass filter in SM5309B to be bypassed. Even in filter bypass mode, the
input type and multiplexer function can all be set just as in filter mode. However, the cutoff frequency and
fc mode settings have no effect on the outputs.
Flag name
Filter
Default
BYPASS
L
Filter mode (signals pass through lowpass filter)
H
Filter bypass mode (signals bypass lowpass filter)
SEIKO NPC CORPORATION —14
SM5309B
Lowpass Filter
The SM5309B has built-in 5th-order lowpass filters with variable cutoff frequency. The cutoff frequency range is
set by the resistor (RISET) connected between ISET and GND, and the cutoff frequency setting is determined by
FCDATA data. The cutoff frequency vs. FCDATA values are listed in table 2, and shown graphically in figure 1.
Table 2. Cutoff frequency vs. FCDATA (RISET = 1.8kΩ)
FCDATA
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
FCSET
(hex)
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
10
11
12
13
14
15
16
17
18
19
1A
1B
1C
1D
1E
1F
20
21
22
23
24
25
26
27
28
29
2A
2B
2C
2D
2E
2F
30
31
32
33
34
35
36
37
38
39
3A
3B
3C
3D
3E
3F
Cutoff freq.
[MHz]
4.05
4.22
4.38
4.54
4.70
4.87
5.02
5.19
5.34
5.50
5.66
5.82
5.99
6.15
6.31
6.48
6.63
6.79
6.95
7.11
7.27
7.43
7.59
7.76
7.91
8.07
8.22
8.39
8.54
8.70
8.85
9.01
9.15
9.30
9.46
9.62
9.77
9.93
10.08
10.23
10.39
10.54
10.69
10.85
10.99
11.15
11.30
11.45
11.60
11.75
11.90
12.04
12.20
12.35
12.49
12.65
12.79
12.95
13.09
13.24
13.39
13.53
13.68
13.83
FCDATA
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
FCSET
(hex)
40
41
42
43
44
45
46
47
48
49
4A
4B
4C
4D
4E
4F
50
51
52
53
54
55
56
57
58
59
5A
5B
5C
5D
5E
5F
60
61
62
63
64
65
66
67
68
69
6A
6B
6C
6D
6E
6F
70
71
72
73
74
75
76
77
78
79
7A
7B
7C
7D
7E
7F
Cutoff freq.
[MHz]
13.95
14.09
14.24
14.39
14.53
14.67
14.82
14.97
15.11
15.25
15.39
15.54
15.68
15.83
15.97
16.11
16.25
16.39
16.54
16.68
16.82
16.96
17.11
17.26
17.39
17.54
17.67
17.81
17.95
18.09
18.23
18.37
18.51
18.65
18.78
18.92
19.06
19.19
19.33
19.48
19.61
19.74
19.88
20.02
20.15
20.30
20.43
20.57
20.71
20.83
20.97
21.10
21.24
21.38
21.52
21.65
21.78
21.91
22.06
22.19
22.33
22.46
22.60
22.74
FCDATA
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
FCSET
(hex)
80
81
82
83
84
85
86
87
88
89
8A
8B
8C
8D
8E
8F
90
91
92
93
94
95
96
97
98
99
9A
9B
9C
9D
9E
9F
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
AA
AB
AC
AD
AE
AF
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
BA
BB
BC
BD
BE
BF
Cutoff freq.
[MHz]
7.40
7.70
7.99
8.29
8.59
8.88
9.18
9.47
9.76
10.05
10.34
10.63
10.92
11.21
11.49
11.78
12.05
12.33
12.61
12.90
13.18
13.47
13.75
14.03
14.31
14.58
14.86
15.14
15.41
15.69
15.98
16.25
16.50
16.77
17.04
17.31
17.58
17.87
18.14
18.41
18.67
18.94
19.20
19.47
19.75
20.01
20.29
20.55
20.80
21.07
21.33
21.60
21.86
22.13
22.40
22.66
22.91
23.17
23.44
23.70
23.96
24.22
24.48
24.74
FCDATA
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
FCSET
(hex)
C0
C1
C2
C3
C4
C5
C6
C7
C8
C9
CA
CB
CC
CD
CE
CF
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
DA
DB
DC
DD
DE
DF
E0
E1
E2
E3
E4
E5
E6
E7
E8
E9
EA
EB
EC
ED
EE
EF
F0
F1
F2
F3
F4
F5
F6
F7
F8
F9
FA
FB
FC
FD
FE
FF
Cutoff freq.
[MHz]
24.93
25.19
25.45
25.72
25.96
26.24
26.48
26.74
27.01
27.26
27.51
27.76
28.02
28.26
28.53
28.78
29.02
29.26
29.54
29.78
30.02
30.28
30.52
30.78
31.03
31.28
31.53
31.77
32.03
32.28
32.53
32.78
33.02
33.27
33.50
33.75
34.01
34.25
34.49
34.73
34.98
35.23
35.47
35.72
35.96
36.20
36.45
36.70
36.94
37.19
37.42
37.66
37.91
38.16
38.41
38.66
38.88
39.12
39.36
39.60
39.86
40.10
40.35
40.60
SEIKO NPC CORPORATION —15
SM5309B
50
45
40
fc [MHz]
35
30
25
20
15
10
5
0
0
32
64
96
128
FCDATA
160
192
224
256
Figure 1. Cutoff frequency vs. FCDATA (RISET = 1.8kΩ)
RISET
RISET controls the internal current source, and its connection is essential. The recommended value (RISET) is
1.8kΩ. In power-down mode and filter bypass mode, no current flows into RISET.
Note. A value other than 1.8kΩ will change the current consumption of SM5309B. In the determination of
resistance value, caution should be taken to ensure the power dissipation does not exceed the absolute
maximum rating for the package.
Half fc Mode
In half fc mode, the CH-2 and CH-3 cutoff frequency is 1/2 that of the CH-1 cutoff frequency setting. Half fc
mode is useful for systems where the sampling frequency varies due to luminance (Y) and color difference signal (Cr, Cb) requirements as in component signals.
Group Delay Characteristics
The group delay varies with the cutoff frequency setting. Note also that in half fc mode, the group delay
between CH-1 and CH-2/CH-3 varies.
Filter Bypass Mode
In filter bypass mode, the internal lowpass filter in SM5309B is bypassed and the signal is input to the output
buffer stage directly. In filter bypass mode, the input type and multiplexer function are set just as for filter
mode. But the cutoff frequency setting and fc mode setting have no effect on the outputs. In this mode, the
passband frequency is 80MHz (typ), which can support SXGA-class signals.
Input Multiplexer Switching (MUXSEL)
The input multiplexer setting can also be set using the MUXSEL input. When set using the I2C-BUS, a certain
amount of communication time is required, but the setting can be made using the MUXSEL input with arbitrary timing for high-speed switching. The input circuit of MUXSEL pin is placed in analog supply (VCC,
GND) area.
MUXSEL pin
MUX flag
Multiplexer selection*1
L: GND
L
INnA
L: GND
H
INnB
H: VCC
L
INnB
H: VCC
H
INnB
*1. n = 1, 2, 3
SEIKO NPC CORPORATION —16
SM5309B
Power-ON Reset
When power is applied, an internal power-ON reset circuit operates initializing the internal register flags to
their default settings. At power-ON, all supplies should be applied simultaneously.
Reference Voltage (REF)
The REFn pins (n = 1, 2) are internal reference voltage outputs. A 10 µF capacitor connected between pin and
ground is recommended for stability of movement. REF1 and REF2 are independent reference voltage outputs,
and have no correspondence with settings of CH-1, CH-2, and CH-3.
SEIKO NPC CORPORATION —17
SM5309B
USAGE PRECAUTIONS
Slave Address Setting
When slave address 92h is used, the ADS pin pull-up to VCC. When slave address 94h is used, the ADS input
must be left open circuit. In this case, an external resistor should be connected as shown in figure 2 to reduce
the risk of malfunction in the I2C-BUS interface due to large spikes or other noise invaded from outside. The
recommended value is 10kΩ.
Direct Input Mode
In direct input mode, the signal is connected to the input without an input capacitor. However, the input DC
voltage range varies with the use situation, hence the signal must be appropriately biased for the use situation.
If the input voltage exceeds “Direct mode input DC voltage range” (see “Analog input characteristics”), take
care of harmonic distortion may occur in the output signal. (For defending device breakdown occur, input bottom voltage and top voltage should be set within the absolute maximum ratings.)
VCC
VCC
VH
10k
ADS
Video Signal In
INnA
INnB
10k
GND
VL
GND
Slave address = 94h
Figure 2. Slave address 94h setting
Figure 3. Direct input mode
Power Supply Invest Timing
The SM5309B uses 2-type power supply, analog one (VCC) and I2C-BUS one (VDD). Therefore all power
supply pins should be forced voltage at the same time power supply invested. In the case analog power supply
and I2C-BUS one are set up separately, composing system the time-lag to makes short time as standard under
1ms is need. And if voltage of I2C-BUS interface power supply comes higher than one of analog power supply,
it is necessary to set voltage of I2C-BUS interface power supply to make potential difference bellow 250mV as
compared with voltage of analog one.
SEIKO NPC CORPORATION —18
SM5309B
TYPICAL CHARACTERISTICS
VCC = 5.0V, VDD = 3.0 to 5.5V, Ta = 25°C, fin = 100kHz, VIN = 1.0Vp-p, RISET = 1.8kΩ, RL = 75Ω,
CH-1 set to clamp input, CH-2 and CH-3 set to bias input, FCDATA = 227, unless otherwise noted.
220
6
360
6
0
270
0
–6
180
–6
180
–12
90
–12
160
–18
0
–18
140
–24
120
–30
100
–90
–30
–180
–36
–270
–36
80
–42
–360
–42
60
–48
–450
–48
40
–54
–540
–54
–630
100
–60
1
10
Frequency [MHz]
Figure 4. Gain and Phase characteristics
(filter bypass mode)
10
20
30
40
Frequency [MHz]
50
60
0
Figure 5. Gain and Group delay characteristics
(filter bypass mode)
6
360
6
0
270
0
–6
180
–6
180
–12
90
–12
160
–18
0
–18
140
–24
120
220
200
–90
–30
–180
–36
–270
–36
80
–42
–360
–42
60
–48
–450
–48
40
–54
–540
–54
20
–630
100
–60
10
Group delay
0
0
5
10
15
Frequency [MHz]
Frequency [MHz]
Figure 6. Gain and Phase characteristics
(standard fc mode, FCDATA = 10)
Figure 7. Gain and Group delay characteristics
(standard fc mode, FCDATA = 10)
6
220
270
0
200
–6
180
–6
180
–12
90
–12
160
–18
0
–18
140
–24
120
–30
100
–24
Gain
Phase
–90
Gain [dB]
360
0
Phase [deg]
6
–30
–180
–36
–270
–36
–42
–360
–42
–48
–450
–48
40
–54
–540
–54
20
–630
100
–60
–60
0.1
1
10
Frequency [MHz]
Figure 8. Gain and Phase characteristics
(half fc mode, FCDATA = 10)
80
Group delay [ns]
1
100
–30
Group delay [ns]
Phase
Gain [dB]
Gain
Phase [deg]
–24
Gain
–60
0.1
Gain [dB]
20
Group delay
0
Group delay [ns]
–24
–60
0.1
Gain [dB]
Gain [dB]
Phase [deg]
Gain [dB]
Phase
200
Gain
Gain
Gain
60
Group delay
0
0
2
4
6
Frequency [MHz]
8
10
Figure 9. Gain and Group delay characteristics
(half fc mode, FCDATA = 10)
SEIKO NPC CORPORATION —19
SM5309B
6
270
0
–6
180
–6
180
–12
90
–12
160
–18
0
–18
140
–24
120
–30
100
–24
Phase
–90
220
200
Gain
–30
–180
–36
–270
–36
80
–42
–360
–42
60
–48
–450
–48
–54
–540
–54
–630
100
–60
Group delay [ns]
Gain [dB]
Gain
Gain [dB]
360
0
Phase [deg]
6
40
Group delay
1
10
20
0
10
20
Frequency [MHz]
Figure 10. Gain and Phase characteristics
(standard fc mode, FCDATA = 227)
50
60
0
Figure 11. Gain and Group delay characteristics
(standard fc mode, FCDATA = 227)
6
360
6
0
270
0
–6
180
–6
180
–12
90
–12
160
–18
0
–18
140
–24
120
–30
100
Gain
Phase
–90
Gain [dB]
–24
220
200
Gain
Phase [deg]
Gain [dB]
30
40
Frequency [MHz]
–30
–180
–36
–270
–36
80
–42
–360
–42
60
–48
–450
–48
–54
–540
–54
–630
100
–60
–60
0.1
1
10
Frequency [MHz]
Figure 12. Gain and Phase characteristics
(half fc mode, FCDATA = 227)
Group delay [ns]
–60
0.1
40
Group delay
20
0
0
10
20
Frequency [MHz]
30
40
Figure 13. Gain and Group delay characteristics
(half fc mode, FCDATA = 227)
SEIKO NPC CORPORATION —20
SM5309B
6
90
(Bypass mode)
0
(1)
–12
–90
(2)
(1)
Phase [deg]
(3)
–18
Gain [dB]
(Bypass mode)
0
–6
(4)
–24
–30
–180
(2)
(3)
–270
(4)
–360
–36
–42
–450
–48
–540
–54
–630
–60
0.1
1
100
10
Frequency [MHz]
0.1
1
10
100
Frequency [MHz]
Figure 14. Gain vs. FCDATA, fc mode
Figure 15. Phase vs. FCDATA, fc mode
FCDATA
fc mode
FCDATA
fc mode
(1)
227
standard
(1)
227
standard
(2)
227
half
(2)
227
half
(3)
10
standard
(3)
10
standard
(4)
10
half
(4)
10
half
220
200
180
160
Group delay [ns]
(4)
140
(3)
120
(2)
100
(1)
80
60
(Bypass mode)
40
20
0
0
10
20
30
40
Frequency [MHz]
50
60
Figure 16. Group delay vs. FCDATA, fc mode
FCDATA
fc mode
(1)
227
standard
(2)
227
half
(3)
10
standard
(4)
10
half
SEIKO NPC CORPORATION —21
SM5309B
140
140
120
120
ICC2*2
100
ICC1*1
100
ICC1*1
80
ICC3*3
80
ICC3*3
ICC [mA]
ICC [mA]
ICC2*2
60
60
40
40
20
20
0
4.5
4.75
5
VCC [V]
5.25
0
–40
5.5
–20
*1. filter mode, FCDATA = 0
*2. filter mode, FCDATA = 255
*3. filter bypass mode
60
80
100
Figure 18. ICC1, 2, 3 vs. Ta
0.5
0.5
0.45
0.45
0.4
0.4
0.35
0.35
0.3
ICC4 [mA]
0.3
ICC4 [mA]
20
40
Ta [°C]
*1. filter mode, FCDATA = 0
*2. filter mode, FCDATA = 255
*3. filter bypass mode
Figure 17. ICC1, 2, 3 vs. VCC
0.25
0.25
0.2
0.2
0.15
0.15
0.1
0.1
0.05
0.05
0
4.5
4.75
5
VCC [V]
5.25
0
–40
5.5
Figure 19. ICC4 vs. VCC
1
0.5
0.8
0.4
0.6
0.3
0.4
0.2
0.2
0.1
0
–0.2
–0.2
–0.3
–0.8
–0.4
–1
5
VCC [V]
5.25
Figure 21. Gain vs. VCC
20
40
Ta [°C]
60
80
100
–0.1
–0.6
4.75
0
0
–0.4
4.5
–20
Figure 20. ICC4 vs. Ta
Gain [dB]
Gain [dB]
0
5.5
–0.5
–20
0
20
40
Ta [°C]
60
80
100
Figure 22. Gain vs. Ta
SEIKO NPC CORPORATION —22
SM5309B
4.5
4
4
3.5
3.5
3
3
2.5
2.5
VOUT [V]
VOUT [V]
4.5
2
2
1.5
1.5
1
1
0.5
0.5
0
0
1
2
3
4
VIN [V]
Figure 23. VIN vs. VOUT
(filter mode, direct mode)
5
0
0
1
2
3
4
5
VIN [V]
Figure 24. VIN vs. VOUT
(filter bypass mode, direct mode)
SEIKO NPC CORPORATION —23
SM5309B
Please pay your attention to the following points at time of using the products shown in this document.
The products shown in this document (hereinafter “Products”) are not intended to be used for the apparatus that exerts harmful influence on
human lives due to the defects, failure or malfunction of the Products. Customers are requested to obtain prior written agreement for such
use from SEIKO NPC CORPORATION (hereinafter “NPC”). Customers shall be solely responsible for, and indemnify and hold NPC free and
harmless from, any and all claims, damages, losses, expenses or lawsuits, due to such use without such agreement. NPC reserves the right
to change the specifications of the Products in order to improve the characteristic or reliability thereof. NPC makes no claim or warranty that
the contents described in this document dose not infringe any intellectual property right or other similar right owned by third parties.
Therefore, NPC shall not be responsible for such problems, even if the use is in accordance with the descriptions provided in this document.
Any descriptions including applications, circuits, and the parameters of the Products in this document are for reference to use the Products,
and shall not be guaranteed free from defect, inapplicability to the design for the mass-production products without further testing or
modification. Customers are requested not to export or re-export, directly or indirectly, the Products to any country or any entity not in
compliance with or in violation of the national export administration laws, treaties, orders and regulations. Customers are requested
appropriately take steps to obtain required permissions or approvals from appropriate government agencies.
SEIKO NPC CORPORATION
1-9-9, Hatchobori, Chuo-ku,
Tokyo 104-0032, Japan
Telephone: +81-3-5541-6501
Facsimile: +81-3-5541-6510
http://www.npc.co.jp/
Email: [email protected]
NC0609BE
2007.04
SEIKO NPC CORPORATION —24