LMC6482 CMOS Dual Rail-To-Rail Input and Output Operational Amplifier General Description Features The LMC6482 provides a common-mode range that extends to both supply rails. This rail-to-rail performance combined with excellent accuracy, due to a high CMRR, makes it unique among rail-to-rail input amplifiers. It is ideal for systems, such as data acquisition, that require a large input signal range. The LMC6482 is also an excellent upgrade for circuits using limited common-mode range amplifiers such as the TLC272 and TLC277. Maximum dynamic signal range is assured in low voltage and single supply systems by the LMC6482’s rail-to-rail output swing. The LMC6482’s rail-to-rail output swing is guaranteed for loads down to 600Ω. Guaranteed low voltage characteristics and low power dissipation make the LMC6482 especially well-suited for battery-operated systems. LMC6482 is also available in MSOP package which is almost half the size of a SO-8 device. (Typical unless otherwise noted) n Rail-to-Rail Input Common-Mode Voltage Range (Guaranteed Over Temperature) n Rail-to-Rail Output Swing (within 20 mV of supply rail, 100 kΩ load) n Guaranteed 3V, 5V and 15V Performance n Excellent CMRR and PSRR: 82 dB n Ultra Low Input Current: 20 fA n High Voltage Gain (RL = 500 kΩ): 130 dB n Specified for 2 kΩ and 600Ω loads n Available in MSOP Package See the LMC6484 data sheet for a Quad CMOS operational amplifier with these same features. Applications Data Acquisition Systems Transducer Amplifiers Hand-held Analytic Instruments Medical Instrumentation Active Filter, Peak Detector, Sample and Hold, pH Meter, Current Source n Improved Replacement for TLC272, TLC277 n n n n n 3V Single Supply Buffer Circuit Rail-To-Rail Input Rail-To-Rail Output DS011713-2 DS011713-3 DS011713-1 Connection Diagram DS011713-4 © 1999 National Semiconductor Corporation DS011713 www.national.com LMC6482 CMOS Dual Rail-To-Rail Input and Output Operational Amplifier November 1997 Ordering Information Package Temperature Range Military 8-Pin Industrial −55˚C to +125˚C −40˚C to +85˚C LMC6482MN LMC6482AIN, Molded DIP LMC6482IN 8-pin LMC6482AIM, Small Outline LMC6482IM 8-pin LMC6482AMJ/883 NSC Drawing Transport Media N08E Rail M08A Rail Package Marking LMC6482MN, LMC6482AIN, LMC6482IN LMC6482AIM, LMC6482IM Tape and Reel J08A Rail LMC6482AMJ/883Q5962-9453401MPA Rail A10 Ceramic DIP 8-pin LMC6482IMM MUA08A Mini SO www.national.com Tape and Reel 2 Absolute Maximum Ratings (Note 1) Storage Temperature Range Junction Temperature (Note 4) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 2) Differential Input Voltage Voltage at Input/Output Pin Supply Voltage (V+ − V−) Current at Input Pin (Note 12) Current at Output Pin (Notes 3, 8) Current at Power Supply Pin Lead Temperature (Soldering, 10 sec.) −65˚C to +150˚C 150˚C Operating Ratings 1.5 kV (Note 1) Supply Voltage Junction Temperature Range LMC6482AM LMC6482AI, LMC6482I Thermal Resistance (θJA) N Package, 8-Pin Molded DIP M Package, 8-Pin Surface Mount MSOP package, 8-Pin Mini SO ± Supply Voltage (V+) +0.3V, (V−) −0.3V 16V ± 5 mA ± 30 mA 40 mA 3.0V ≤ V+ ≤ 15.5V −55˚C ≤ TJ ≤ +125˚C −40˚C ≤ TJ ≤ +85˚C 90˚C/W 155˚C/W 194˚C/W 260˚C DC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = VO = V+/2 and RL > 1M. Boldface limits apply at the temperature extremes. Symbol VOS TCVOS Parameter Conditions Typ (Note 5) Input Offset Voltage 0.11 Input Offset Voltage LMC6482AI LMC6482I LMC6482M Limit Limit Limit (Note 6) (Note 6) (Note 6) 0.750 3.0 3.0 mV 1.35 3.7 3.8 max 1.0 Units µV/˚C Average Drift IB Input Current (Note 13) 0.02 4.0 4.0 10.0 pA max IOS Input Offset Current (Note 13) 0.01 2.0 2.0 5.0 pA max CIN Common-Mode 3 pF Input Capacitance RIN Input Resistance CMRR Common Mode Rejection Ratio +PSRR Positive Power Supply Rejection Ratio −PSRR Negative Power Supply Rejection Ratio VCM > 10 0V ≤ VCM ≤ 15.0V V+ = 15V 82 0V ≤ VCM ≤ 5.0V V+ = 5V 82 5V ≤ V+ ≤ 15V, V− = 0V VO = 2.5V 82 −5V ≤ V− ≤ −15V, V+ = 0V VO = −2.5V 82 Input Common-Mode V+ = 5V and 15V Voltage Range For CMRR ≥ 50 dB V− − 0.3 V+ + 0.3V TeraΩ 70 65 65 67 62 60 70 65 65 67 62 60 70 65 65 dB 67 62 60 min 70 65 65 dB 67 62 60 min − 0.25 − 0.25 − 0.25 V 0 0 0 max V+ + 0.25 V+ + 0.25 V+ + 0.25 V V+ min V/mV V AV Large Signal RL = 2 kΩ Voltage Gain (Notes 7, 13) RL = 600Ω Sourcing 666 + V + dB min 140 120 120 84 72 60 min 35 35 35 V/mV Sinking 75 20 20 18 min Sourcing 300 80 50 50 V/mV 48 30 25 min Sinking 35 20 15 15 V/mV 13 10 8 min (Notes 7, 13) 3 www.national.com DC Electrical Characteristics (Continued) Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = VO = V+/2 and RL > 1M. Boldface limits apply at the temperature extremes. Symbol VO Parameter Output Swing Conditions Typ (Note 5) V+ = 5V RL = 2 kΩ to V+/2 4.9 0.1 V+ = 5V RL = 600Ω to V+/2 4.7 0.3 V+ = 15V RL = 2 kΩ to V+/2 14.7 0.16 V+ = 15V RL = 600Ω to V+/2 14.1 0.5 ISC Output Short Circuit Current V+ = 5V ISC Sourcing, VO = 0V 20 Sinking, VO = 5V Output Short Circuit Current V+ = 15V 15 Sourcing, VO = 0V 30 Sinking, VO = 12V 30 (Note 8) IS Supply Current Both Amplifiers V+ = +5V, VO = V+/2 1.0 Both Amplifiers V+ = 15V, VO = V+/2 1.3 LMC6482AI LMC6482I LMC6482M Limit Limit Limit Units (Note 6) (Note 6) (Note 6) 4.8 4.8 4.8 V 4.7 4.7 4.7 min 0.18 0.18 0.18 V 0.24 0.24 0.24 max 4.5 4.5 4.5 V 4.24 4.24 4.24 min 0.5 0.5 0.5 V 0.65 0.65 0.65 max 14.4 14.4 14.4 V 14.2 14.2 14.2 min 0.32 0.32 0.32 V 0.45 0.45 0.45 max 13.4 13.4 13.4 V 13.0 13.0 13.0 min 1.0 1.0 1.0 V 1.3 1.3 1.3 max 16 16 16 mA 12 12 10 min 11 11 11 mA 9.5 9.5 8.0 min 28 28 28 mA 22 22 20 min 30 30 30 mA 24 24 22 min 1.4 1.4 1.4 mA 1.8 1.8 1.9 max 1.6 1.6 1.6 mA 1.9 1.9 2.0 max AC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = VO = V+/2, and RL > 1M. Boldface limits apply at the temperature extremes. Symbol SR Parameter Slew Rate (Note 9) 1.3 V+ = 15V LMC6482AI LMC6482I LMC6482M Limit Limit Limit (Note 6) (Note 6) (Note 6) 1.0 0.9 0.9 0.7 0.63 0.54 Units V/µs min MHz Phase Margin 50 Deg Gain Margin 15 dB Gain-Bandwidth Product φm Gm Amp-to-Amp Isolation Input-Referred Voltage Noise in Typ (Note 5) 1.5 GBW en Conditions Input-Referred (Note 10) F = 1 kHz Vcm = 1V F = 1 kHz Current Noise www.national.com 4 150 dB 37 nV/√Hz 0.03 pA/√Hz AC Electrical Characteristics (Continued) Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = VO = V+/2, and RL > 1M. Boldface limits apply at the temperature extremes. Symbol T.H.D. Parameter Total Harmonic Distortion Conditions Typ (Note 5) F = 10 kHz, AV = −2 RL = 10 kΩ, VO = 4.1 VPP F = 10 kHz, AV = −2 LMC6482AI LMC6482I LMC6482M Limit Limit Limit (Note 6) (Note 6) (Note 6) Units % 0.01 RL = 10 kΩ, VO = 8.5 VPP V+ = 10V % 0.01 DC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 3V, V− = 0V, VCM = VO = V+/2 and RL > 1M. Symbol VOS TCVOS Parameter Conditions Typ (Note 5) Input Offset Voltage LMC6482AI LMC6482I LMC6482M Limit Limit Limit (Note 6) (Note 6) (Note 6) 2.0 3.0 3.0 mV 2.7 3.7 3.8 max 0.9 Input Offset Voltage Units 2.0 µV/˚C pA Average Drift IB Input Bias Current 0.02 IOS Input Offset Current 0.01 CMRR Common Mode 0V ≤ VCM ≤ 3V 74 pA 64 60 60 dB Rejection Ratio PSRR Power Supply min 3V ≤ V+ ≤ 15V, V− = 0V 80 68 60 60 dB Rejection Ratio VCM Input Common-Mode min For CMRR ≥ 50 dB V− −0.25 0 0 0 V Voltage Range max V+ + 0.25 V+ V+ V+ V min VO Output Swing RL = 2 kΩ to V+/2 2.8 V 0.2 RL = 600Ω to V+/2 V 2.7 2.5 2.5 2.5 0.37 0.6 0.6 0.6 V min V max IS Supply Current Both Amplifiers 0.825 1.2 1.2 1.2 mA 1.5 1.5 1.6 max AC Electrical Characteristics Unless otherwise specified, V+ = 3V, V− = 0V, VCM = VO = V+/2, and RL > 1M. Symbol Parameter SR Slew Rate GBW Gain-Bandwidth Product T.H.D. Total Harmonic Distortion Conditions Typ (Note 5) (Note 11) F = 10 kHz, AV = −2 RL = 10 kΩ, VO = 2 VPP LMC6482AI LMC6482I LMC6482M Limit Limit Limit (Note 6) (Note 6) (Note 6) Units 0.9 V/µs 1.0 MHz 0.01 % Note 1: Absolute Maximum Ratings indicate limts beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. Note 2: Human body model, 1.5 kΩ in series with 100 pF. All pins rated per method 3015.6 of MIL-STD-883. This is a Class 1 device rating. 5 www.national.com AC Electrical Characteristics (Continued) Note 3: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150˚C. Output currents in excess of ± 30 mA over long term may adversely affect reliability. Note 4: The maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max) − TA)/θJA. All numbers apply for packages soldered directly into a PC board. Note 5: Typical Values represent the most likely parametric norm. Note 6: All limits are guaranteed by testing or statistical analysis. Note 7: V+ = 15V, VCM = 7.5V and RL connected to 7.5V. For Sourcing tests, 7.5V ≤ VO ≤ 11.5V. For Sinking tests, 3.5V ≤ VO ≤ 7.5V. Note 8: Do not short circuit output to V+, when V+ is greater than 13V or reliability will be adversely affected. Note 9: V+ = 15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of either the positive or negative slew rates. Note 10: Input referred, V+ = 15V and RL = 100 kΩ connected to 7.5V. Each amp excited in turn with 1 kHz to produce VO = 12 VPP. Note 11: Connected as voltage Follower with 2V step input. Number specified is the slower of either the positive or negative slew rates. Note 12: Limiting input pin current is only necessary for input voltages that exceed absolute maximum input voltage ratings. Note 13: Guaranteed limits are dictated by tester limitations and not device performance. Actual performance is reflected in the typical value. Note 14: For guaranteed Military Temperature parameters see RETS6482X. Typical Performance Characteristics VS = +15V, Single Supply, TA = 25˚C unless otherwise specified Supply Current vs Supply Voltage Input Current vs Temperature Sourcing Current vs Output Voltage DS011713-40 Sourcing Current vs Output Voltage DS011713-41 Sourcing Current vs Output Voltage DS011713-43 www.national.com Sinking Current vs Output Voltage DS011713-44 6 DS011713-42 DS011713-45 Typical Performance Characteristics VS = +15V, Single Supply, TA = 25˚C unless otherwise specified (Continued) Sinking Current vs Output Voltage Sinking Current vs Output Voltage DS011713-46 Input Voltage Noise vs Frequency Output Voltage Swing vs Supply Voltage DS011713-47 Input Voltage Noise vs Input Voltage DS011713-49 Input Voltage Noise vs Input Voltage DS011713-48 Input Voltage Noise vs Input Voltage DS011713-50 DS011713-51 Crosstalk Rejection vs Frequency DS011713-52 DS011713-53 7 www.national.com Typical Performance Characteristics VS = +15V, Single Supply, TA = 25˚C unless otherwise specified (Continued) Crosstalk Rejection vs Frequency Positive PSRR vs Frequency Negative PSRR vs Frequency DS011713-54 CMRR vs Frequency DS011713-55 CMRR vs Input Voltage CMRR vs Input Voltage DS011713-58 DS011713-57 ∆VOS vs CMR CMRR vs Input Voltage DS011713-59 ∆VOS vs CMR DS011713-60 www.national.com DS011713-56 DS011713-61 8 DS011713-62 Typical Performance Characteristics VS = +15V, Single Supply, TA = 25˚C unless otherwise specified (Continued) Input Voltage vs Output Voltage Input Voltage vs Output Voltage Open Loop Frequency Response DS011713-63 Open Loop Frequency Responce DS011713-64 Open Loop Frequency Response vs Temperature DS011713-66 Gain and Phase vs Capacitive Load DS011713-65 Maximum Output Swing vs Frequency DS011713-68 DS011713-67 Gain and Phase vs Capacitive Load DS011713-69 Open Loop Output Impedance vs Frequency DS011713-70 9 DS011713-71 www.national.com Typical Performance Characteristics VS = +15V, Single Supply, TA = 25˚C unless otherwise specified (Continued) Open Loop Output Impedance vs Frequency Slew Rate vs Supply Voltage Non-Inverting Large Signal Pulse Response Non-Inverting Large Signal Pulse Response Non-Inverting Large Signal Pulse Response DS011713-75 Non-Inverting Small Signal Pulse Response Non-Inverting Small Signal Pulse Response DS011713-76 Non-Inverting Small Signal Pulse Response DS011713-78 www.national.com DS011713-74 DS011713-73 DS011713-72 Inverting Large Signal Pulse Response DS011713-79 10 DS011713-77 DS011713-80 Typical Performance Characteristics VS = +15V, Single Supply, TA = 25˚C unless otherwise specified (Continued) Inverting Large Signal Pulse Response Inverting Large Signal Pulse Response DS011713-81 Inverting Small Signal Pulse Response Inverting Small Signal Pulse Response DS011713-82 Inverting Small Signal Pulse Response DS011713-84 DS011713-83 Stability vs Capacitive Load DS011713-85 DS011713-86 Stability vs Capacitive Load Stability vs Capacitive Load Stability vs Capacitive Load DS011713-87 DS011713-88 11 DS011713-89 www.national.com Typical Performance Characteristics VS = +15V, Single Supply, TA = 25˚C unless otherwise specified (Continued) Stability vs Capacitive Load Stability vs Capacitive Load DS011713-90 DS011713-91 Application Information 1.0 Amplifier Topology The LMC6482 incorporates specially designed wide-compliance range current mirrors and the body effect to extend input common mode range to each supply rail. Complementary paralleled differential input stages, like the type used in other CMOS and bipolar rail-to-rail input amplifiers, were not used because of their inherent accuracy problems due to CMRR, cross-over distortion, and open-loop gain variation. The LMC6482’s input stage design is complemented by an output stage capable of rail-to-rail output swing even when driving a large load. Rail-to-rail output swing is obtained by taking the output directly from the internal integrator instead of an output buffer stage. DS011713-39 FIGURE 2. A ± 7.5V Input Signal Greatly Exceeds the 3V Supply in Figure 3 Causing No Phase Inversion Due to RI 2.0 Input Common-Mode Voltage Range Unlike Bi-FET amplifier designs, the LMC6482 does not exhibit phase inversion when an input voltage exceeds the negative supply voltage. Figure 1 shows an input voltage exceeding both supplies with no resulting phase inversion on the output. Applications that exceed this rating must externally limit the maximum input current to ± 5 mA with an input resistor (RI) as shown in Figure 3. DS011713-11 FIGURE 3. RI Input Current Protection for Voltages Exceeding the Supply Voltages 3.0 Rail-To-Rail Output The approximated output resistance of the LMC6482 is 180Ω sourcing and 130Ω sinking at Vs = 3V and 110Ω sourcing and 80Ω sinking at Vs = 5V. Using the calculated output resistance, maximum output voltage swing can be estimated as a function of load. DS011713-10 FIGURE 1. An Input Voltage Signal Exceeds the LMC6482 Power Supply Voltages with No Output Phase Inversion 4.0 Capacitive Load Tolerance The LMC6482 can typically directly drive a 100 pF load with VS = 15V at unity gain without oscillating. The unity gain follower is the most sensitive configuration. Direct capacitive loading reduces the phase margin of op-amps. The combi- The absolute maximum input voltage is 300 mV beyond either supply rail at room temperature. Voltages greatly exceeding this absolute maximum rating, as in Figure 2, can cause excessive current to flow in or out of the input pins possibly affecting reliability. www.national.com 12 Application Information (Continued) nation of the op-amp’s output impedance and the capacitive load induces phase lag. This results in either an underdamped pulse response or oscillation. Capacitive load compensation can be accomplished using resistive isolation as shown in Figure 4. This simple technique is useful for isolating the capacitive inputs of multiplexers and A/D converters. DS011713-17 FIGURE 4. Resistive Isolation of a 330 pF Capacitive Load DS011713-16 FIGURE 7. Pulse Response of LMC6482 Circuit in Figure 6 5.0 Compensating for Input Capacitance It is quite common to use large values of feedback resistance with amplifiers that have ultra-low input current, like the LMC6482. Large feedback resistors can react with small values of input capacitance due to transducers, photodiodes, and circuits board parasitics to reduce phase margins. DS011713-18 FIGURE 5. Pulse Response of the LMC6482 Circuit in Figure 4 Improved frequency response is achieved by indirectly driving capacitive loads, as shown in Figure 6. DS011713-19 FIGURE 8. Canceling the Effect of Input Capacitance The effect of input capacitance can be compensated for by adding a feedback capacitor. The feedback capacitor (as in Figure 8), Cf, is first estimated by: or R1 CIN ≤ R2 Cf which typically provides significant overcompensation. Printed circuit board stray capacitance may be larger or smaller than that of a bread-board, so the actual optimum value for Cf may be different. The values of Cf should be checked on the actual circuit. (Refer to the LMC660 quad CMOS amplifier data sheet for a more detailed discussion.) DS011713-15 FIGURE 6. LMC6482 Noninverting Amplifier, Compensated to Handle a 330 pF Capacitive Load R1 and C1 serve to counteract the loss of phase margin by feeding forward the high frequency component of the output signal back to the amplifiers inverting input, thereby preserving phase margin in the overall feedback loop. The values of R1 and C1 are experimentally determined for the desired pulse response. The resulting pulse response can be seen in Figure 7. 13 www.national.com Application Information (Continued) 6.0 Printed-Circuit-Board Layout for High-Impedance Work It is generally recognized that any circuit which must operrate with less than 1000 pA of leakage current requires special layout of the PC board. When one wishes to take advantage of the ultra-low input current of the LMC6482, typically less than 20 fA, it is essential to have an excellent layout. Fortunately, the techniques of obtaining low leakages are quite simple. First, the user must not ignore the surface leakage of the PC board, even through it may sometimes appear acceptably low, because under conditions of high humidity or dust or contamination, the surface leakage will be appreciable. To minimize the effect of any surface leakage, lay out a ring of foil completely surrounding the LM6482’s inputs and the terminals of capacitors, diodes, conductors, resistors, relay terminals, etc. connected to the op-amp’s inputs, as in Figure 9. To have a significant effect, guard rings should be placed on both the top and bottom of the PC board. This PC foil must then be connected to a voltage which is at the same voltage as the amplifier inputs, since no leakage current can flow between two points at the same potential. For example, a PC board trace-to-pad resistance of 1012Ω, which is normally considered a very large resistance, could leak 5 pA if the trace were a 5V bus adjacent to the pad of the input. This would cause a 250 times degradation from the LMC6482’s actual performance. However, if a guard ring is held within 5 mV of the inputs, then even a resistance of 1011Ω would cause only 0.05 pA of leakage current. See Figure 10 for typical connections of guard rings for standard op-amp configurations. DS011713-21 Inverting Amplifier DS011713-22 Non-Inverting Amplifier DS011713-23 Follower FIGURE 10. Typical Connections of Guard Rings The designer should be aware that when it is inappropriate to lay out a PC board for the sake of just a few circuits, there is another technique which is even better than a guard ring on a PC board: Don’t insert the amplifier’s input pin into the board at all, but bend it up in the air and use only air as an insulator. Air is an excellent insulator. In this case you may have to forego some of the advantages of PC board construction, but the advantages are sometimes well worth the effort of using point-to-point up-in-the-air wiring. See Figure 11. DS011713-20 FIGURE 9. Example of Guard Ring in P.C. Board Layout DS011713-24 (Input pins are lifted out of PC board and soldered directly to components. All other pins connected to PC board.) FIGURE 11. Air Wiring www.national.com 14 Application Information (Continued) 7.0 Offset Voltage Adjustment Offset voltage adjustment circuits are illustrated in Figure 12 Figure 13. Large value resistances and potentiometers are used to reduce power consumption while providing typically ± 2.5 mV of adjustment range, referred to the input, for both configurations with VS = ± 5V. DS011713-26 FIGURE 13. Non-Inverting Configuration Offset Voltage Adjustment 8.0 Upgrading Applications The LMC6484 quads and LMC6482 duals have industry standard pin outs to retrofit existing applications. System performance can be greatly increased by the LMC6482’s features. The key benefit of designing in the LMC6482 is increased linear signal range. Most op-amps have limited input common mode ranges. Signals that exceed this range generate a non-linear output response that persists long after the input signal returns to the common mode range. Linear signal range is vital in applications such as filters where signal peaking can exceed input common mode ranges resulting in output phase inverison or severe distortion. DS011713-25 FIGURE 12. Inverting Configuration Offset Voltage Adjustment 9.0 Data Acquisition Systems Low power, single supply data acquisition system solutions are provided by buffering the ADC12038 with the LMC6482 (Figure 14). Capable of using the full supply range, the LMC6482 does not require input signals to be scaled down to meet limited common mode voltage ranges. The LMC4282 CMRR of 82 dB maintains integral linearity of a 12-bit data acquisition system to ± 0.325 LSB. Other rail-to-rail input amplifiers with only 50 dB of CMRR will degrade the accuracy of the data acquisition system to only 8 bits. 15 www.national.com Application Information (Continued) DS011713-28 FIGURE 14. Operating from the same Supply Voltage, the LMC6482 buffers the ADC12038 maintaining excellent accuracy cations that benefit from these features include analytic medical instruments, magnetic field detectors, gas detectors, and silicon-based tranducers. A small valued potentiometer is used in series with Rg to set the differential gain of the 3 op-amp instrumentation circuit in Figure 15. This combination is used instead of one large valued potentiometer to increase gain trim accuracy and reduce error due to vibration. 10.0 Instrumentation Circuits The LMC6482 has the high input impedance, large common-mode range and high CMRR needed for designing instrumentation circuits. Instrumentation circuits designed with the LMC6482 can reject a larger range of common-mode signals than most in-amps. This makes instrumentation circuits designed with the LMC6482 an excellent choice of noisy or industrial environments. Other appli- DS011713-29 FIGURE 15. Low Power 3 Op-Amp Instrumentation Amplifier A 2 op-amp instrumentation amplifier designed for a gain of 100 is shown in Figure 16. Low sensitivity trimming is made www.national.com 16 Application Information Higher frequency and larger common-mode range applications are best facilitated by a three op-amp instrumentation amplifier. (Continued) for offset voltage, CMRR and gain. Low cost and low power consumption are the main advantages of this two op-amp circuit. DS011713-30 FIGURE 16. Low-Power Two-Op-Amp Instrumentation Amplifier 11.0 Spice Macromodel A spice macromodel is available for the LMC6482. This model includes accurate simulation of: • Input common-mode voltage range • Frequency and transient response • GBW dependence on loading conditions • Quiescent and dynamic supply current • Output swing dependence on loading conditions and many more characteristics as listed on the macromodel disk. Contact your local National Semiconductor sales office to obtain an operational amplifier spice model library disk. Typical Single-Supply Applications DS011713-32 FIGURE 18. Half-Wave Rectifier Waveform The circuit in Figure 17 uses a single supply to half wave rectify a sinusoid centered about ground. RI limits current into the amplifier caused by the input voltage exceeding the supply voltage. Full wave rectification is provided by the circuit in Figure 19. DS011713-31 FIGURE 17. Half-Wave Rectifier with Input Current Protection (RI) DS011713-33 FIGURE 19. Full Wave Rectifier with Input Current Protection (RI) 17 www.national.com Typical Single-Supply Applications (Continued) DS011713-34 FIGURE 20. Full Wave Rectifier Waveform DS011713-35 FIGURE 21. Large Compliance Range Current Source DS011713-36 FIGURE 22. Positive Supply Current Sense www.national.com 18 Typical Single-Supply Applications (Continued) DS011713-37 FIGURE 23. Low Voltage Peak Detector with Rail-to-Rail Peak Capture Range In Figure 23 dielectric absorption and leakage is minimized by using a polystyrene or polyethylene hold capacitor. The droop rate is primarily determined by the value of CH and diode leakage current. The ultra-low input current of the LMC6482 has a negligible effect on droop. DS011713-38 FIGURE 24. Rail-to-Rail Sample and Hold The LMC6482’s high CMRR (82 dB) allows excellent accuracy throughout the circuit’s rail-to-rail dynamic capture range. DS011713-27 FIGURE 25. Rail-to-Rail Single Supply Low Pass Filter The low pass filter circuit in Figure 25 can be used as an anti-aliasing filter with the same voltage supply as the A/D converter. Filter designs can also take advantage of the LMC6482 ultra-low input current. The ultra-low input current yields negligible offset error even when large value resistors are used. This in turn allows the use of smaller valued capacitors which take less board space and cost less. 19 www.national.com Physical Dimensions inches (millimeters) unless otherwise noted 8-Pin Ceramic Dual-In-Line Package Order Number LMC6482AMJ/883 NS Package Number J08A 8-Pin Small Outline Package Order Package Number LMC6482AIM or LMC6482IM NS Package Number M08A www.national.com 20 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 8-Pin Molded Dual-In-Line Package Order Package Number LMC6482AIN, LMC6482IN or LMC6482MN NS Package Number N08E 21 www.national.com LMC6482 CMOS Dual Rail-To-Rail Input and Output Operational Amplifier Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 8-Lead Mini Small Outline Molded Package, JEDEC Order Number LMC6482IMM, or LMC6482IMMX NS Package Number MUA08A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: [email protected] www.national.com National Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: [email protected] Deutsch Tel: +49 (0) 1 80-530 85 85 English Tel: +49 (0) 1 80-532 78 32 Français Tel: +49 (0) 1 80-532 93 58 Italiano Tel: +49 (0) 1 80-534 16 80 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: [email protected] National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.