LMC6042 CMOS Dual Micropower Operational Amplifier General Description Features Ultra-low power consumption and low input-leakage current are the hallmarks of the LMC6042. Providing input currents of only 2 fA typical, the LMC6042 can operate from a single supply, has output swing extending to each supply rail, and an input voltage range that includes ground. The LMC6042 is ideal for use in systems requiring ultra-low power consumption. In addition, the insensitivity to latch-up, high output drive, and output swing to ground without requiring external pull-down resistors make it ideal for single-supply battery-powered systems. Other applications for the LMC6042 include bar code reader amplifiers, magnetic and electric field detectors, and hand-held electrometers. This device is built with National’s advanced Double-Poly Silicon-Gate CMOS process. See the LMC6041 for a single, and the LMC6044 for a quad amplifier with these features. n n n n n Low supply current: 10 µA/Amp (typ) Operates from 4.5V to 15V single supply Ultra low input current: 2 fA (typ) Rail-to-rail output swing Input common-mode range includes ground Applications n n n n n n n Battery monitoring and power conditioning Photodiode and infrared detector preamplifier Silicon based transducer systems Hand-held analytic instruments pH probe buffer amplifier Fire and smoke detection systems Charge amplifier for piezoelectric transducers Connection Diagram 8-Pin DIP/SO DS011137-1 Ordering Information Temperature Package Range NSC Industrial Drawing Transport Media −40˚C to +85˚C 8-Pin LMC6042AIM Small Outline LMC6042IM 8-Pin LMC6042AIN Molded DIP LMC6042IN © 1999 National Semiconductor Corporation DS011137 M08A Rail Tape and Reel N08E Rail www.national.com LMC6042 CMOS Dual Micropower Operational Amplifier August 1999 Absolute Maximum Ratings (Note 1) Storage Temperature Range Junction Temperature (Note 3) ESD Tolerance (Note 4) Voltage at Input/Output Pin If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ± Supply Voltage Differential Input Voltage Supply Voltage (V+ − V−) Output Short Circuit to V+ Output Short Circuit to V− Lead Temperature (Soldering, 10 seconds) Current at Input Pin Current at Output Pin Current at Power Supply Pin Power Dissipation −65˚C to +150˚C 110˚C 500V (V+) + 0.3V, (V−) − 0.3V Operating Ratings 16V (Note 12) (Note 2) Temperature Range LMC6042AI, LMC6042I Supply Voltage Power Dissipation Thermal Resistance (θJA), (Note 11) 8-Pin DIP 8-Pin SO 260˚C ± 5 mA ± 18 mA 35 mA (Note 3) −40˚C ≤ TJ ≤ +85˚C 4.5V ≤ V+ ≤ 15.5V (Note 10) 101˚C/W 165˚C/W Electrical Characteristics Unless otherwise spec ified, all limits guaranteed for TA = TJ = 25˚C. Boldface limits apply at the temperature extremes. V+ = 5V, V− = 0V, VCM = 1.5V, VO = V+/2 and RL > 1M unless otherwise specified. Typical Symbol VOS TCVOS Parameter Conditions (Note 5) Input Offset Voltage 1 Input Offset Voltage LMC6042AI LMC6042I Units Limit Limit (Limit) (Note 6) (Note 6) 3 6 mV 3.3 6.3 Max 1.3 µV/˚C Average Drift IB Input Bias Current 0.002 4 4 pA (Max) IOS Input Offset Current 0.001 2 2 pA (Max) RIN Input Resistance CMRR Common Mode 68 62 dB 66 60 Min 68 62 dB 66 60 Min 84 74 dB 83 73 Min −0.1 −0.1 V 0 0 Max V+− 2.3V V+− 2.3V V V+− 2.5V V+− 2.4V Min V/mV 0V ≤ VCM ≤ 12.0V V+ = 15V 75 5V ≤ V+ ≤ 15V VO = 2.5V 75 94 Input Common-Mode 0V ≤ V− ≤ −10V VO = 2.5V V+ = 5V and 15V Voltage Range For CMRR ≥ 50 dB Rejection Ratio +PSRR Positive Power Supply Rejection Ratio −PSRR Negative Power Supply Rejection Ratio CMR > 10 −0.4 V+−1.9V AV Large Signal RL = 100 kΩ (Note 7) Sourcing 1000 Voltage Gain RL = 25 kΩ (Note 7) www.national.com 2 TeraΩ 400 300 300 200 Min 90 V/mV Sinking 500 180 120 70 Min Sourcing 1000 200 100 V/mV 160 80 Min Sinking 250 100 50 V/mV 60 40 Min Electrical Characteristics (Continued) Unless otherwise spec ified, all limits guaranteed for TA = TJ = 25˚C. Boldface limits apply at the temperature extremes. V+ = 5V, V− = 0V, VCM = 1.5V, VO = V+/2 and RL > 1M unless otherwise specified. Typical Symbol Parameter Output Swing VO Conditions (Note 5) V+ = 5V RL = 100 kΩ to V+/2 4.987 0.004 V+ = 5V RL = 25 kΩ to V+/2 4.980 0.010 V+ = 15V RL = 100 kΩ to V+/2 14.970 0.007 V+ = 15V RL = 25 kΩ to V+/2 14.950 0.022 ISC Output Current V+ = 5V Sourcing, VO = 0V 22 Sinking, VO = 5V ISC Output Current V+ = 15V 21 Sourcing, VO = 0V 40 Sinking, VO = 13V 39 (Note 12) IS Supply Current Both Amplifiers VO = 1.5V 20 Both Amplifiers V+ = 15V 26 LMC6042AI LMC6042I Units Limit Limit (Limit) (Note 6) (Note 6) 4.970 4.940 V 4.950 4.910 Min 0.030 0.060 V 0.050 0.090 Max 4.920 4.870 V 4.870 4.820 Min 0.080 0.130 V 0.130 0.180 Max 14.920 14.880 V 14.880 14.820 Min 0.030 0.060 V 0.050 0.090 Max 14.900 14.850 V 14.850 14.800 Min 0.100 0.150 V 0.150 0.200 Max 16 13 mA 10 8 Min 16 13 mA 8 8 Min 15 15 mA 10 10 Min 24 21 mA 8 8 Min 34 45 µA 39 50 Max 44 56 µA 51 65 Max AC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TA = TJ = 25˚C. Boldface limits apply at the temperature extremes. V+ = 5V, V− = 0V, VCM = 1.5V, VO = V+/2 and RL > 1M unless otherwise specified. Symbol SR Parameter Slew Rate GBW Gain-Bandwidth Product φm Phase Margin Amp-to-Amp Isolation en in Input-Referred Voltage Noise Input-Referred Current Noise Conditions (Note 8) Typ LMC6042AI LMC6042I Units (Note 5) Limit Limit (Limit) (Note 6) (Note 6) 0.015 0.010 0.010 0.007 0.02 (Note 9) f = 1 kHz V/µs Min 100 kHz 60 Deg 115 dB 83 f = 1 kHz 0.0002 3 www.national.com AC Electrical Characteristics (Continued) Unless otherwise specified, all limits guaranteed for TA = TJ = 25˚C. Boldface limits apply at the temperature extremes. V+ = 5V, V− = 0V, VCM = 1.5V, VO = V+/2 and RL > 1M unless otherwise specified. Symbol T.H.D. Parameter Total Harmonic Distortion Conditions f = 1 kHz, AV = −5 RL = 100 kΩ, VO = 2 VPP Typ LMC6042AI LMC6042I Units (Note 5) Limit Limit (Limit) (Note 6) (Note 6) % 0.01 ± 5V Supply Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Conditions indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Note 2: Applies to both single-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 110˚C. Output currents in excess of ± 30 mA over long term may adversely affect reliability. Note 3: The maximum power dissipation is a function of TJ(Max), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(Max) − TA)/θJA. Note 4: Human body model, 1.5 kΩ in series with 100 pF. Note 5: Typical values represent the most likely parametric norm. Note 6: All limits are guaranteed at room temperature (standard type face) or at operating temperature extremes (bold face type). Note 7: V+ = 15V, VCM = 7.5V and RL connected to 7.5V. For Sourcing tests, 7.5V ≤ VO ≤ 11.5V. For Sinking tests, 2.5V ≤ VO ≤ 7.5V. Note 8: V+ = 15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of the positive and negative slew rates. Note 9: Input referred V+ = 15V and RL = 100 kΩ connected to V+/2. Each amp excited in turn with 100 Hz to produce VO = 12 VPP. Note 10: For operating at elevated temperatures the device must be derated based on the thermal resistance θJA with PD = (TJ − TA)/θJA. Note 11: All numbers apply for packages soldered directly into a PC board. Note 12: Do not connect output to V+when V+ is greater than 13V or reliability may be adversely affected. Typical Performance Characteristics Supply Current vs Supply Voltage VS = ± 7.5V, TA = 25˚C unless otherwise specified Offset Voltage vs Temperature of Five Representative Units Input Bias Current vs Temperature DS011137-19 DS011137-21 DS011137-20 Input Bias Current vs Input Common-Mode Voltage Input Common-Mode Voltage Range vs Temperature DS011137-22 www.national.com Output Characteristics Current Sinking DS011137-23 4 DS011137-24 Typical Performance Characteristics Output Characteristics Current Sourcing VS = ± 7.5V, TA = 25˚C unless otherwise specified (Continued) Input Voltage Noise vs Frequency DS011137-25 CMRR vs Frequency Crosstalk Rejection vs Frequency DS011137-26 CMRR vs Temperature DS011137-27 Power Supply Rejection Ratio vs Frequency DS011137-29 DS011137-28 DS011137-30 Open-Loop Voltage Gain vs Temperature Open-Loop Frequency Response DS011137-31 Gain and Phase Responses vs Load Capacitance DS011137-32 DS011137-33 5 www.national.com Typical Performance Characteristics Gain and Phase Response vs Temperature VS = ± 7.5V, TA = 25˚C unless otherwise specified (Continued) Gain Error (VOS vs VOUT) Common-Mode Error vs Common-Mode Voltage of 3 Representative Units DS011137-35 DS011137-34 Non-Inverting Slew Rate vs Temperature DS011137-36 Inverting Slew Rate vs Temperature DS011137-37 Non-Inverting Large Signal Pulse Response (AV = +1) DS011137-38 DS011137-39 Non-Inverting Small Signal Pulse Response Inverting Large-Signal Pulse Response DS011137-41 DS011137-40 www.national.com Inverting Small Signal Pulse Response 6 DS011137-42 Typical Performance Characteristics VS = ± 7.5V, TA = 25˚C unless otherwise specified (Continued) Stability vs Capacitive Load Stability vs Capacitive Load DS011137-43 DS011137-44 Applications Hints The effect of input capacitance can be compensated for by adding a capacitor. Place a capacitor, Cf, around the feedback resistor (as in Figure 1 ) such that: AMPLIFIER TOPOLOGY The LMC6042 incorporates a novel op-amp design topology that enables it to maintain rail-to-rail output swing even when driving a large load. Instead of relying on a push-pull unity gain output buffer stage, the output stage is taken directly from the internal integrator, which provides both low output impedance and large gain. Special feed-forward compensation design techniques are incorporated to maintain stability over a wider range of operating conditions than traditional micropower op-amps. These features make the LMC6042 both easier to design with, and provide higher speed than products typically found in this ultra-low power class. or R1 CIN ≤ R2 Cf Since it is often difficult to know the exact value of CIN, Cf can be experimentally adjusted so that the desired pulse response is achieved. Refer to the LMC660 and the LMC662 for a more detailed discussion on compensating for input capacitance. COMPENSATING FOR INPUT CAPACITANCE It is quite common to use large values of feedback resistance with amplifiers with ultra-low input curent, like the LMC6042. Although the LMC6042 is highly stable over a wide range of operating conditions, certain precautions must be met to achieve the desired pulse response when a large feedback resistor is used. Large feedback resistors and even small values of input capacitance, due to transducers, photodiodes, and circuit board parasitics, reduce phase margins. When high input impedances are demanded, guarding of the LMC6042 is suggested. Guarding input lines will not only reduce leakage, but lowers stray input capacitance as well. (See Printed-Circuit-Board Layout for High Impedance Work). CAPACITIVE LOAD TOLERANCE Direct capacitive loading will reduce the phase margin of many op-amps. A pole in the feedback loop is created by the combination of the op-amp’s output impedance and the capacitive load. This pole induces phase lag at the unity-gain crossover frequency of the amplifier resulting in either an oscillatory or underdamped pulse response. With a few external components, op amps can easily indirectly drive capacitive loads, as shown in Figure 2. DS011137-6 DS011137-5 FIGURE 2. LMC6042 Noninverting Gain of 10 Amplifier, Compensated to Handle Capacitive Loads FIGURE 1. Cancelling the Effect of Input Capacitance In the circuit of Figure 2, R1 and C1 serve to counteract the loss of phase margin by feeding the high frequency compo7 www.national.com Applications Hints (Continued) nent of the output signal back to the amplifier’s inverting input, thereby preserving phase margin in the overall feedback loop. Capacitive load driving capability is enhanced by using a pull up resistor to V+ (Figure 3). Typically a pull up resistor conducting 10 µA or more will significantly improve capacitive load responses. The value of the pull up resistor must be determined based on the current sinking capability of the amplifier with respect to the desired output swing. Open loop gain of the amplifier can also be affected by the pull up resistor (see Electrical Characteristics). DS011137-18 DS011137-7 FIGURE 3. Compensating for Large Capacitive Loads with a Pull Up Resistor FIGURE 4. Example of Guard Ring in P.C. Board Layout PRINTED-CIRCUIT-BOARD LAYOUT FOR HIGH-IMPEDANCE WORK It is generally recognized that any circuit which must operate with less than 1000 pA of leakage current requires special layout of the PC board. When one wishes to take advantage of the ultra-low bias current of the LMC6042, typically less than 2 fA, it is essential to have an excellent layout. Fortunately, the techniques of obtaining low leakages are quite simple. First, the user must not ignore the surface leakage of the PC board, even though it may sometimes appear acceptably low, because under conditions of high humidity or dust or contamination, the surface leakage will be appreciable. To minimize the effect of any surface leakage, lay out a ring of foil completely surrounding the LMC6042’s inputs and the terminals of capacitors, diodes, conductors, resistors, relay terminals etc. connected to the op-amp’s inputs, as in Figure 4. To have a significant effect, guard rings should be placed on both the top and bottom of the PC board. This PC foil must then be connected to a voltage which is at the same voltage as the amplifier inputs, since no leakage current can flow between two points at the same potential. For example, a PC board trace-to-pad resistance of 1012Ω, which is normally considered a very large resistance, could leak 5 pA if the trace were a 5V bus adjacent to the pad of the input. This would cause a 100 times degradation from the LMC6042’s actual performance. However, if a guard ring is held within 5 mV of the inputs, then even a resistance of 1011Ω would cause only 0.05 pA of leakage current. See Figure 5 for typical connections of guard rings for standard op-amp configurations. DS011137-8 Inverting Amplifier DS011137-10 Non-Inverting Amplifier DS011137-9 Follower FIGURE 5. Typical Connections of Guard Rings www.national.com 8 Applications Hints probes, analytic medical instruments, magnetic field detectors, gas detectors, and silicon based pressure transducers. The circuit in Figure 7 is recommended for applications where the common-mode input range is relatively low and the differential gain will be in the range of 10 to 1000. This two op-amp instrumentation amplifier features an independent adjustment of the gain and common-mode rejection trim, and a total quiescent supply current of less than 20 µA. To maintain ultra-high input impedance, it is advisable to use ground rings and consider PC board layout an important part of the overall system design (see Printed-Circuit-Board Layout for High Impedance Work). Referring to Figure 7, the input voltages are represented as a common-mode input VCM plus a differential input VD. Rejection of the common-mode component of the input is accomplished by making the ratio of R1/R2 equal to R3/R4. So that where, (Continued) The designer should be aware that when it is inappropriate to lay out a PC board for the sake of just a few circuits, there is another technique which is even better than a guard ring on a PC board: Don’t insert the amplifier’s input pin into the board at all, but bend it up in the air and use only air as an insulator. Air is an excellent insulator. In this case you may have to forego some of the advantages of PC board construction, but the advantages are sometimes well worth the effort of using point-to-point up-in-the-air wiring. See Figure 6. A suggested design guideline is to minimize the difference of value between R1 through R4. This will often result in improved resistor tempco, amplifier gain, and CMRR over temperature. If RN = R1 = R2 = R3 = R4 then the gain equation can be simplified: DS011137-11 (Input pins are lifted out of PC board and soldered directly to components. All other pins connected to PC board.) FIGURE 6. Air Wiring Typical Single-Supply Applications (V+ = 5.0 VDC) The extremely high input impedance, and low power consumption, of the LMC6042 make it ideal for applications that require battery-powered instrumentation amplifiers. Examples of these types of applications are hand-held pH Due to the “zero-in, zero-out” performance of the LMC6042, and output swing rail-rail, the dynamic range is only limited to the input common-mode range of 0V to VS − 2.3V, worst case at room temperature. This feature of the LMC6042 makes it an ideal choice for low-power instrumentation systems. A complete instrumentation amplifier designed for a gain of 100 is shown in Figure 8. Provisions have been made for low sensitivity trimming of CMRR and gain. DS011137-12 FIGURE 7. Two Op-Amp Instrumentation Amplifier 9 www.national.com Typical Single-Supply Applications (V+ = 5.0 VDC) (Continued) DS011137-13 FIGURE 8. Low-Power Two-Op-Amp Instrumentation Amplifier DS011137-14 FIGURE 9. Low-Leakage Sample and Hold DS011137-15 FIGURE 10. Instrumentation Amplifier www.national.com 10 Typical Single-Supply Applications (V+ = 5.0 VDC) (Continued) DS011137-16 FIGURE 11. 1 Hz Square Wave Oscillator DS011137-17 FIGURE 12. AC Coupled Power Amplifier 11 www.national.com Physical Dimensions inches (millimeters) unless otherwise noted 8-Pin Small Outline Package Order Number LMC6042AIM or LMC6042IM NS Package Number M08A 8-Pin Molded Dual-In-Line Package Order Number LMC6042AIN or LMC6042IN NS Package Number N08E www.national.com 12 LMC6042 CMOS Dual Micropower Operational Amplifier Notes LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: [email protected] www.national.com National Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: [email protected] Deutsch Tel: +49 (0) 1 80-530 85 85 English Tel: +49 (0) 1 80-532 78 32 Français Tel: +49 (0) 1 80-532 93 58 Italiano Tel: +49 (0) 1 80-534 16 80 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: [email protected] National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.