Genesys Logic, Inc. GL830 USB 2.0 / PATA / SATA Bridge Controller Product Overview GL830 Product Overview Copyright Copyright © 2012 Genesys Logic, Inc. All rights reserved. No part of the materials shall be reproduced in any form or by any means without prior written consent of Genesys Logic, Inc. Ownership and Title Genesys Logic, Inc. owns and retains of its right, title and interest in and to all materials provided herein. Genesys Logic, Inc. reserves all rights, including, but not limited to, all patent rights, trademarks, copyrights and any other propriety rights. No license is granted hereunder. Disclaimer All Materials are provided “as is”. Genesys Logic, Inc. makes no warranties, express, implied or otherwise, regarding their accuracy, merchantability, fitness for any particular purpose, and non-infringement of intellectual property. In no event shall Genesys Logic, Inc. be liable for any damages, including, without limitation, any direct, indirect, consequential, or incidental damages. The materials may contain errors or omissions. Genesys Logic, Inc. may make changes to the materials or to the products described herein at anytime without notice. Genesys Logic, Inc. 12F., No. 205, Sec. 3, Beixin Rd., Xindian Dist. 231, New Taipei City, Taiwan Tel : (886-2) 8913-1888 Fax : (886-2) 6629-6168 http://www.genesyslogic.com ©2012 Genesys Logic, Inc. - All rights reserved. Page 2 GL830 Product Overview GENERAL DESCRIPTION The GL830 is a highly-compatible, low cost USB 2.0 / PATA to SATA bridge controller, which integrates Genesys Logic own design high speed UTMI (USB 2.0 Transceiver Macrocell Interface) transceiver/receiver and Serial ATA PHY. As a one-chip solution which complies with Universal Serial Bus specification rev. 2.0 and Serial ATA specification rev. 2.6. There are totally 4 endpoints in the GL830 controller, Control (0), Bulk In (1), Bulk Out (2), and Interrupt (3). By complies with the USB Storage Class specification ver.1.0 (Bulk only protocol), the GL830 can support not only plug and play but also Windows Vista/ XP/ 2000/ ME default driver. The GL830 uses 25MHz crystal and slew-rate controlled pads to reduce the EMI issue. GL830 provides four package types –LQFP 48 pin (7x7mm), LQFN 46 pin (4.5x6.5mm), LQFP 64 pin (7x7mm) & LQFP 128 pin (14x14mm) for different target applications. 1. LQFP 48 pin package provides basic USB to SATA bridge function to fit standard USB 2.0 high speed storage class applications such as SATA HDD and ODD enclosure. It provides the best cost / performance solution in industry. In terms of cost, GL830 features on-chip 5V to 3.3V regulator and low pin count package to minimize overall system cost. In terms of performance, GL830 provides industry-leading data read / write speed and latency that powered by internal turbo 8051 micro processor. In terms of power consumption, GL830 features low-power mixed signal design to reduce silicon operating current. It also provides various power management options for system designer to reduce system level power consumption. 2. LQFN 46 pin package provides the same function / performance as LQFP 48 pin. It features smaller silicon foot print and lower silicon operating temperature, which is perfect for mechanical limited PCB design. 3. LQFP 64 pin (A) provides an additional SATA differential pair that enables USB / E-SATA (External SATA) to SATA function for HDD enclosures with both USB and E-SATA port. It features on-chip SATA switch that provides both E-SATA to SATA and USB to SATA data path in one single chip. 4. LQFP 64 pin (B) supports dual LUN operation. It can connect to one ATA device and one SATA device. Main application is USB to PATA & SATA Combo Devices 5. LQFP 128 pin integrates USB, PATA and SATA interface into one single chip. PATA interface can be configured as host or device that meet system requirement of various applications. For example, when PATA is in device mode, GL830 can be connected to embedded system’s legacy IDE port to serve as a multi-IO bridge for USB and SATA connection. When PATA is in host mode, GL830 is a USB to PATA and SATA bridge that enable concurrent data transfer on both USB to PATA and USB to SATA path. Table 1.1 - 48/46/64/128 pin feature comparison Applications USB host to SATA HDD / ODD USB / E-SATA host to SATA HDD 48 pin LQFP 46 pin LQFN 64 pin LQFP (A) 64 pin LQFP (B) 128 pin LQFP ■ ■ ■ ■ ■ ■ ■ USB / E-SATA / PATA host to SATA HDD USB host to PATA + SATA HDD ©2012 Genesys Logic, Inc. - All rights reserved. ■ ■ ■ Page 3 GL830 Product Overview FEATURES · Complies with Universal Serial Bus specification rev. 2.0 (USB-IF test ID – 40000391) · Complies with USB Storage Class specification ver.1.0 (Bulk only protocol) · Operating system supported: Windows Vista32&64/XP/2000/Me/98/98SE, Mac OS 9.X/10.X, Linux Kernel 2.4.X/2.6.X. (Windows Submission ID : 1273643) · Integrated USB 2.0 Transceiver Macrocell Interface (UTMI) transceiver and Serial Interface Engine (SIE) · Support 4 endpoints: Control (0) / Bulk Read (1) / Bulk Write (2) / Interrupt (3) · 64 / 512 bytes Data Payload for full / high speed Bulk Endpoint · Complies with Serial ATA specification rev. 2.6 · Support SATA II asynchronous signal recovery feature(hot-plug) . Compliance with Serial ATA II Electrical Specification 1.0 . Complies with ATA/ATAPI-6 rev. 1.0 (only available for 128pin package) · On-chip SATA switch for E-SATA to SATA data path (only available for 64/128pin package) · Support Spread Spectrum Clocking to reduce EMI · Support Partial/Slumber power management (optional) . Support hard-disk power management feature (optional) . Support hard-disk write-protect function (only available for Windows XP/Vista, supported on 830-12 and later version) . Support hard-disk lock/unlock by EEPROM Key feature (complementary feature with Genesys Secured Backup software) · Provide adjustable TX signal amplitude and pre-emphasis level · Provide specified OOB signal detection and transmission · Embedded Turbo 8051 . On-chip Watch Dog Timer for auto error recovery (Supported on 830-12 and later version) · ROM size: 24K bytes; Bulk Buffer: 1K · Supports Power Down mode and USB suspend indicator · Supports USB 2.0 TEST mode features · Supports 4 PIO and 4 GPIO for programmable AP · Provides LED indicator for Full Speed and High Speed · Single 25 MHz external clock input · 3.3V power input; 5V tolerance pad · Embedded Regulator (3.3V to 1.8V) · Embedded Regulator (5V to 3.3V) · Provides SPI interface for Finger Print (only for 128 pin package) · Available in 48/64/128 pin LQFP and 46 pin LQFN ©2012 Genesys Logic, Inc. - All rights reserved. Page 4 GL830 Product Overview BLOCK DIAGRAM PATA Transport Layer Bulk FIFO Turbo 8051 ROM RAM WDT PWM logic Swtich USB PHY (UTM) PLL LDO SATA TX/RX USB D+/D- 25MHz CLK Link Layer SATA PHY eSATA Operation Register Application Layer ©2012 Genesys Logic, Inc. - All rights reserved. GPIO SPI NVRAM SIE 5V PW Page 5