IS31FL3193 3-CHANNEL FUN LED DRIVER January 2012 GENERAL DESCRIPTION FEATURES IS31FL3193 is a 3-channel fun LED driver which features two-dimensional auto breathing mode. It has One Shot Programming mode and PWM Control mode for RGB lighting effects. The maximum output current can be adjusted in 5 levels (5mA~42mA). In PWM Control mode, the PWM duty cycle of each output can be independently programmed and controlled in 256 steps to simplify color mixing. In One Shot Programming mode, the timing characteristics for output current - current rising, holding, falling and off time, can be adjusted individually so that each output can independently maintain a pre-established pattern achieving mixing color breathing or a single color breathing without requiring any additional interface activity, thus saving valuable system resources. IS31FL3193 is available in DFN-10 (3mm × 3mm). It operates from 2.7V to 5.5V over the temperature range of -40°C to +85°C. One group RGB, single color LED breathing system-free pre-established pattern 3 independently controlled automatic and semiautomatic breathing system-free pre-established pattern I2C interface, automatic address increment function 3 independently controlled outputs of 256 PWM steps 2.7V to 5.5V supply voltage 5 levels programmable output current Over-temperature protection Operating temperature TA = −40°C ~ +85°C DFN-10 (3mm × 3mm) package APPLICATIONS Mobile phones and other hand-held devices for LED display LED in home appliances TYPICAL APPLICATION CIRCUIT Figure 1 Typical Application Circuit Note: The IC should be placed far away from the mobile antenna in order to prevent the EMI. Integrated Silicon Solution, Inc. – www.issi.com Rev.A, 12/21/2011 1 IS31FL3193 PIN CONFIGURATION Package Pin Configuration (Top View) DFN-10 SDB 1 10 V_BM VCC 2 9 SDA OUT1 3 8 SCL OUT2 4 7 AD OUT3 5 6 GND PIN DESCRIPTION No. Pin Description 1 SDB Shutdown the chip when pulled to low. 2 VCC Power supply. 3~5 OUT1~OUT3 Current source outputs. 6 GND Ground. 7 AD I2C address setting. 8 SCL I2C serial clock. 9 SDA I2C serial data. 10 V_BM Breathing mark signal output. Thermal Pad Connect to GND. Copyright © 2011 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized; b.) the user assume all such risks; and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. – www.issi.com Rev.A, 12/21/2011 2 IS31FL3193 ORDERING INFORMATION Industrial Range: -40°C to +85°C Order Part No. Package QTY/Reel IS31FL3193-DLS2-TR DFN-10, Lead-free 2500 Integrated Silicon Solution, Inc. – www.issi.com Rev.A, 12/21/2011 3 IS31FL3193 ABSOLUTE MAXIMUM RATINGS Supply voltage, VCC Voltage at any input pin Maximum junction temperature, TJMAX Operating temperature range, TA Storage temperature range, TSTG ESD (HBM) -0.3V ~ +6.0V -0.3V ~ VCC+0.3V 150°C -40°C ~ +85°C -65°C ~ +150°C 7kV Note: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS TA = -40°C ~ +85°C, VCC = 5V, unless otherwise noted. Typical value are TA = 25°C. Symbol Parameter VCC Supply voltage ICC Quiescent current ISD Shutdown current IOUT Output current VHR Current voltage Min. Typ. 2.7 power sink Condition supply VSDB = VCC Unit 5.5 V 0.8 mA VSDB = 0V 2.5 VSDB = VCC, software shutdown 3.5 PWM Control mode, VDS = 0.5V PWM Register(04h~06h) = 0xFF Current Register(03h) = 0x00 headroom Max. 42 mA (Note 1) IOUT = 42mA μA 500 mV Logic Electrical Characteristics (SDA, SCL, SDB, AD) VIL Logic “0” input voltage VCC = 2.7V VIH Logic “1” input voltage VCC = 5.5V IIL Logic “0” input current IIH Logic “1” input current Integrated Silicon Solution, Inc. – www.issi.com Rev.A, 12/21/2011 0.4 1.4 V V 5 (Note 2) 5 (Note 2) nA nA 4 IS31FL3193 DIGITAL INPUT SWITCHING CHARACTERISTICS (Note 3) Symbol Parameter Condition Min. Typ. Max. Unit 400 kHz fSCL Serial-Clock frequency tBUF Bus free time between a STOP and a START condition 1.3 μs tHD, STA Hold time (repeated) START condition 0.6 μs tSU, STA Repeated START condition setup time 0.6 μs tSU, STO STOP condition setup time 0.6 μs tHD, DAT Data hold time tSU, DAT Data setup time 100 ns tLOW SCL clock low period 1.3 μs tHIGH SCL clock high period 0.7 μs 0.9 μs tR Rise time of both SDA and SCL signals, receiving (Note 4) 20+0.1Cb 300 ns tF Fall time of both SDA and SCL signals, receiving (Note 4) 20+0.1Cb 300 ns Note 1: IOUT represents the average output current of each individual output. See PWM Register, Table 7. Note 2: All LEDs are on. Note 3: Guaranteed by design. Note 4: Cb = total capacitance of one bus line in pF. ISINK ≤ 6mA. tR and tF measured between 0.3 × VCC and 0.7 × VCC. Integrated Silicon Solution, Inc. – www.issi.com Rev.A, 12/21/2011 5 IS31FL3193 DETAILED DESCRIPTION The 8-bit chip address is sent next, most significant bit first. Each address bit must be stable while the SCL level is high. I2C INTERFACE The IS31FL3193 uses a serial bus, which conforms to the I2C protocol, to control the chip’s functions with two wires: SCL and SDA. The IS31FL3193 has a 7-bit slave address (A7:A1), followed by the R/W bit, A0. Since IS31FL3193 only supports write operations, A0 must always be “0”. The value of bits A1 and A2 are decided by the connection of the AD pin. After the last bit of the chip address is sent, the master checks for the IS31FL3193’s acknowledge. The master releases the SDA line high (through a pull-up resistor). Then the master sends an SCL pulse. If the IS31FL3193 has received the address correctly, then it holds the SDA line low during the SCL pulse. If the SDA line is not low, then the master should send a “STOP” signal (discussed later) and abort the transfer. The complete slave address is: Table 1 Slave Address (Write only): Bit A7:A3 A2:A1 Value 11010 AD AD connected to GND, AD = 00; AD connected to VCC, AD = 11; AD connected to SCL, AD = 01; AD connected to SDA, AD = 10; Following acknowledge of IS31FL3193, the register address byte is sent, most significant bit first. IS31FL3193 must generate another acknowledge indicating that the register address has been received. A0 0 Then 8-bit of data byte are sent next, most significant bit first. Each data bit should be valid while the SCL level is stable high. After the data byte is sent, the IS31FL3193 must generate another acknowledge to indicate that the data was received. The SCL line is uni-directional. The SDA line is bi-directional (open-collector) with a pull-up resistor (typically 4.7kΩ). The maximum clock frequency specified by the I2C standard is 400kHz. In this discussion, the master is the microcontroller and the slave is the IS31FL3193. The “STOP” signal ends the transfer. To signal “STOP”, the SDA signal goes high while the SCL signal is high. ADDRESS AUTO INCREMENT To write multiple bytes of data into IS31FL3193, load the address of the data register that the first data byte is intended for. During the IS31FL3193 acknowledge of receiving the data byte, the internal address pointer will increment by one. The next data byte sent to IS31FL3193 will be placed in the new address, and so on (Figure 5). The timing diagram for the I2C is shown in Figure 2. The SDA is latched in on the stable high level of the SCL. When there is no interface activity, the SDA line should be held high. The “START” signal is generated by lowering the SDA signal while the SCL signal is high. The start signal will alert all devices attached to the I2C bus to check the incoming address against their own chip address. Figure 2 Interface Timing SDA SCL DATA LINE STABLE; CHANGE OF DATA DATA VALID ALLOWED Figure 3 Integrated Silicon Solution, Inc. – www.issi.com Rev.A, 12/21/2011 Bit Transfer 6 IS31FL3193 Figure 4 Writing to IS31FL3193(Typical) Figure 5 Writing to IS31FL3193(Automatic Address Increment) REGISTERS DEFINITIONS Table 2 Register Function Address Name Function Table Default 0000 0001 00h Shutdown Register Set software shutdown mode 3 01h Breathing Control Register Set the breathing function 4 02h LED Mode Register Set operation mode 5 03h Current Setting Register Set output current 6 PWM Register 3 channels PWM duty cycle data registers 7 Data Update Register Load PWM Registers and LED Control Register’ data - 0Ah ~ 0Ch T0 Register Set the T0 time 8 10h ~ 12h T1&T2 Register Set the T1&T2 time 9 16h ~18h T3&T4 Register Set the T3&T4 time 10 1Ch Time Update Register Load time registers’ data - xxxx xxxx 1Dh LED Control Register OUT1~ OUT3 enable bit 11 0000 0111 2Fh Reset Register Reset all registers to default value - xxxx xxxx 04h~06h 07h Table 3 00h Shutdown Register Bit D7:D6 D5 D4:D1 D0 Name - EN - SSD Default 00 0 0000 1 The Shutdown Register sets software shutdown mode of IS31FL3193. Integrated Silicon Solution, Inc. – www.issi.com Rev.A, 12/21/2011 EN 0 1 Channel Control All channel disable All channel enable SSD 0 1 Software Shutdown Enable Software shutdown mode Normal operation 0000 0000 xxxx xxxx 0000 0000 7 IS31FL3193 Table 4 01h Breathing Control Register Table 7 04h~06h PWM Register(OUT1~OUT3) Bit D7:D6 D5 D4 D3 D2 D1:D0 Name - RM HT - BME CSS Name PWM Default 00 0 0 0 0 00 Default 0000 0000 The Breathing Control Register sets the breathing function. Ramping Mode Enable Disable Enable RM 0 1 D7:D0 The value in the PWM Registers modulate the RGB LEDs in 256 steps. The value of the PWM Registers decide the average output current of OUT1~OUT9. The average output current may be computed using the Formula (1): I OUT HT 0 1 Hold Time Selection Hold on T2 Hold on T4 BME 0 1 Breathing Mark Enable Disable Enable CSS 00 01 10 Channel Selection OUT1 OUT2 OUT3 Table 5 02h LED Mode Register D7:D6 D5 D4:D0 Name - RGB - Default 00 0 00000 The LED Mode Register sets operation mode of IS31FL3193. RGBx 0 1 RGB Mode Selection PWM Control Mode One Shot Programming Mode Table 6 03h I MAX 7 D[n] * 2 n 256 n0 (1) Where D[n] stands for the individual bit value, 1 or 0, in location n. For example: if D7:D0 = 10110101, IOUT = IMAX (20+22+24+25+27)/256 IMAX is set by Current Setting Register. Bit 07h PWM Update Register The data sent to the PWM Registers and the LED Control Registers will be stored in temporary registers. A write operation of any 8-bit value to the Update Register is required to update the registers (04h~06h, 1Dh). Table 8 0Ah~0Ch T0 Register (OUT1~OUT3) Bit D7:D4 D3:D0 Name T0 - Default 0000 0000 The T0 Registers set the T0 time in One Shot Programming mode. Current Setting Register Bit D7:D5 D4:D2 D1:D0 Name - CS - Default 000 000 00 The Current Setting Register stores the maximum current setting, IMAX, for all of the LED output channels. CS 000 001 010 011 1xx Bit Current Setting 42mA 10mA 5mA 30mA 17.5mA Integrated Silicon Solution, Inc. – www.issi.com Rev.A, 12/21/2011 T0 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 T0 Setting 0s 0.13s 0.26s 0.52s 1.04s 2.08s 4.16s 8.32s 16.64s 33.28s 66.56s 8 IS31FL3193 Table 9 10h~12h T1&T2 Register (OUT1~OUT3) Bit D7:D5 D4:D1 D0 Name T1 T2 - Default 000 0000 0 The T1&T2 Registers set the T1&T2 time in One Shot Programming mode. T1 000 001 010 011 100 101 110 111 T1 Setting 0.13s 0.26s 0.52s 1.04s 2.08s 4.16s 8.32s 16.64s T2 0000 0001 0010 0011 0100 0101 0110 0111 1000 T2 Setting 0s 0.13s 0.26s 0.52s 1.04s 2.08s 4.16s 8.32s 16.64s Table 10 T4 Setting 0s 0.13s 0.26s 0.52s 1.04s 2.08s 4.16s 8.32s 16.64s 33.28s 66.56s 1Ch Time Update Register The data sent to the PWM Registers and the LED Control Register will be stored in temporary registers. A write operation of any 8-bit value to the Update Register is required to update the registers (0Ah~0Ch, 10h~12h, 16h~18h). Table 11 1Dh LED Control Register (OUT1~OUT3) Bit D7:D3 D2:D0 Name - OUT3:OUT1 Default 00000 111 The LED Control Registers store the on or off state of each channel LED. 16h~18h T3&T4 Register (OUT1~OUT3) Bit D7:D5 D4:D1 D0 Name T3 T4 - Default 000 0000 0 The T3&T4 Registers set the T3&T4 time in One Shot Programming mode. T3 000 001 010 011 100 101 110 111 T4 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 OUTx 0 1 LED State LED off LED on 2Fh Reset Register Once user writes any 8-bit data to the Reset Register, IS31FL3193 will reset all registers to their default value. On initial power-up, the IS31FL3193 registers are reset to their default values for a blank display. T3 Setting 0.13s 0.26s 0.52s 1.04s 2.08s 4.16s 8.32s 16.64s Integrated Silicon Solution, Inc. – www.issi.com Rev.A, 12/21/2011 9 IS31FL3193 TYPICAL APPLICATION GENERAL DESCRIPTION IS31FL3193 is a 3-channel LED driver with two-dimensional auto breathing and PWM Control mode. It can drive three individual LEDs or one group of RGB. PWM CONTROL By setting the RGBx bits of the LED Mode Register (03h) to “0”, the IS31FL3193 will operate in PWM Control mode. The PWM Registers (04h~06h) can modulate LED brightness of 3 channels with 256 steps. For example, if the data in PWM Register is “0000 0100”, then the PWM is the fourth step, with a duty cycle of 4/256. In PWM control mode, a new value must be written to the PWM registers to change the output PWM duty cycle. Writing new data continuously to the registers can modulate the brightness of the LEDs to achieve a breathing effect, blinking, or any other effects that the user defines. RGB BREATHING CONTROL WITH AUTO COLOR CHANGING By setting the RGBx bits of the LED Mode Register (03h) to “1”, the IS31FL3193 will operate in One Shot Programming mode. In this mode, the RGB intensity is automatically modulated in a breathing cycle, independently controlled by T0~T4. T0 is an offset time period which runs only once at the start of the cycle. The full cycle is T1 to T4 (Figure 6). Setting different T0~T4 can achieve RGB breathing with auto color changing. The maximum intensity of each RGB is adjusted independently by the PWM Registers (04h~06h). should be same for each of the RGB LEDs, otherwise the pre-established color will change. SEMIAUTOMATIC BREATHING By setting the RGBx bits of the LED Mode Register (03h) to “1” and the RM bit of the Breathing Control Register (01h) to “1”, the ramping function is enabled. HT is the time select bit. When HT bit is set to “0”, T2 will be held forever, and the LED will remain at the programmed maximum intensity. When HT bit is set to “1”, T3 will continue and T4 will be held, causing the LED to complete one breathing cycle and then remain off. BREATHING MARK FUNCTION By setting the BME bit of the Breathing Control Register (01h) to “1”, the breathing mark function is enabled. V_BM is an output pin. The breathing mark function is useful as a signal to notify the MCU when to update the color data. At the end of time period T1, V_BM will induce a falling edge and hold logic low, so the new data can be sent by MCU at this time. At the end of T3, V_BM will induce a rising edge and the MCU can send an update command to update all data simultaneously (Figure 7). The marking channel (OUT1~OUT3) is selected by the CSS bits of the Breathing Control Register (01h). Figure 7 V_BM Signal SHUTDOWN MODE Figure 6 Breathing Timing RGB AUTO BREATHING CONTROL WITH COLOR SETTING IS31FL3193 can pre-establish pattern achieving mixing color breathing. There is one group RGB. The RGB consists of three channels. Every channel has an 8-bit PWM data register. The color can be set by the PWM data register. By adjusting the individual intensity of the red, green and blue LED, different colors are perceived. For example, the three PWM data: 20h, 80h, C8h, will determine one particular color. After setting the color, T0~T4 time register will be set to control the LED breathing panel. And T0~T4 time Integrated Silicon Solution, Inc. – www.issi.com Rev.A, 12/21/2011 Shutdown mode can either be used as a means of reducing power consumption or generating a flashing display (repeatedly entering and leaving shutdown mode). During shutdown mode all registers retain their data. SOFTWARE SHUTDOWN By setting SSD bit of the Shutdown Register (00h) to “0”, the IS31FL3193 will operate in software shutdown mode, wherein they consume only 1μA (typ.) current. When the IS31FL3193 is in software shutdown mode, all current sources are switched off. HARDWARE SHUTDOWN The chip enters hardware shutdown mode when the SDB pin is pulled low, wherein they consume only 1μA (typ.) current. 10 IS31FL3193 CLASSIFICATION REFLOW PROFILES Profile Feature Pb-Free Assembly Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) 150°C 200°C 60-120 seconds Average ramp-up rate (Tsmax to Tp) 3°C/second max. Liquidous temperature (TL) Time at liquidous (tL) 217°C 60-150 seconds Peak package body temperature (Tp)* Max 260°C Time (tp)** within 5°C of the specified classification temperature (Tc) Max 30 seconds Average ramp-down rate (Tp to Tsmax) 6°C/second max. Time 25°C to peak temperature 8 minutes max. Figure 8 Classification Profile Integrated Silicon Solution, Inc. – www.issi.com Rev.A, 12/21/2011 11 IS31FL3193 TAPE AND REEL INFORMATION Integrated Silicon Solution, Inc. – www.issi.com Rev.A, 12/21/2011 12 IS31FL3193 PACKAGE INFORMATION DFN-10 Note: All dimensions in millimeters unless otherwise stated. Integrated Silicon Solution, Inc. – www.issi.com Rev.A, 12/21/2011 13