IXYS CPC9909

CPC9909
High Efficiency, Off-Line,
High Brightness LED Driver
INTEGRATED CIRCUITS DIVISION
Features
Description
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The CPC9909 is a low cost, high-efficiency, offline,
high-brightness (HB) LED driver manufactured using
IXYS Integrated Circuits Division’s high voltage
BCDMOS on SOI process. This driver has an internal
regulator that allows it to operate from 8VDC to
550VDC . This wide input operating voltage range
enables the driver to be used in a broad range of HB
LED applications.
8VDC to 550VDC Input Voltage Range
>90% Efficiency
Stable Operation at >50% Duty Cycle
Drives Multiple LEDs in Series/Parallel
Regulated LED Current
Linear or PWM Brightness Control Inputs
Resistor-Programmable Minimum Off-Time
SOIC-8 RoHS Compliant Package
Buck or Boost Configuration
The CPC9909 features pulse frequency modulation
(PFM) with a constant peak-current control scheme.
This regulation scheme is inherently stable, allowing
the driver to be operated above 50% duty cycle
without open loop instability or sub-harmonic
oscillations. LED dimming can be implemented by
applying a small DC voltage to the LD pin, or by
applying a low frequency PWM signal to the PWMD
pin.
Applications
• Flat-Panel Display RGB Backlighting
• Signage and Decorative LED Lighting
• DC/DC or AC/DC LED Driver Applications
The CPC9909 is available in a standard 8-lead SOIC
package and a thermally enhanced 8-lead SOIC
package with an exposed thermal pad (EP).
Ordering Information
Part
Pb
e3
Description
CPC9909N
CPC9909NTR
CPC9909NE
CPC9909NETR
SOIC-8 (100/Tube)
SOIC-8 Tape & Reel (2000/Reel)
SOIC-8 EP (Exposed Pad) (100/Tube)
SOIC-8 EP (Exposed Pad)Tape & Reel
(2000/Reel)
CPC9909 Block Diagram
VDD
Voltage
Regulator
VIN
RT
Voltage
Reference
+
LD
RT Minimum Off-Time
One Shot TRIG
Q
S
GATE
Q
R
+
CS
PWMD
GND
DS-CPC9909-R03
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CPC9909
INTEGRATED CIRCUITS DIVISION
1. Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
1.2
1.3
1.4
1.5
1.6
Package Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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2. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 LED Driver Theory of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3 Input Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4 Current Sense Resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.5 Current Sense Blanking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.6 Enable/Disable Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.7 Minimum Off-Time One-Shot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.8 Inductor Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.9 Gate Output Drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.10 Linear Dimming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.11 PWM Dimming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12 Combination Linear and PWM Dimming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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3. Manufacturing Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1
3.2
3.3
3.4
3.5
3.6
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Moisture Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ESD Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Board Wash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mechanical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Packaging Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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R03
CPC9909
INTEGRATED CIRCUITS DIVISION
1. Specifications
1.1 Package Pinout
1.2 Pin Description
VIN
1
8
RT
CS
2
7
LD
GND
3
6
VDD
GATE
4
5
PWMD
Pin#
Name
1
VIN
Input voltage
LED Current Sense input. Internal current
sense threshold is set at VCS(high). The
external sense resistor sets the maximum LED
current.
Device Ground
External MOSFET gate driver output
Low-frequency PWM dimming control input with
internal pull-down resistor.
Regulated supply voltage output. Requires a
storage capacitor to GND. Can be overdriven by
external voltage applied to VDD .
2
CS
3
4
GND
GATE
5
PWMD
6
VDD
7
LD
Linear Dimming. Apply a voltage less than
VCS(high) to dim the LED(s).
8
RT
Resistor to GND sets the minimum off-time.
EP
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Description
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-
Electrical and thermal conductive pad on the
bottom of CPC9909NE. Connect this pad to
ground and provide sufficient thermal coupling
to remove heat from the package.
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CPC9909
INTEGRATED CIRCUITS DIVISION
1.3 Absolute Maximum Ratings
Parameter
Input Voltage to GND
Inputs and Outputs Voltage to GND
VDD , Externally Applied
Symbol
Maximum
Unit
VIN
-0.5 to +560
V
CS, LD, PWMD, GATE
-0.3 to VDD+0.3
V
VDD.EXT
15
V
2.5
W
0.975
W
Power Dissipation:
SOIC-8 With Thermal Tab
SOIC-8 W/O Thermal Tab
PD
Junction Temperature, Operating
TJ
-55 to +150
°C
Operating Temperature
TA
-55 to +85
°C
TSTG
-55 to +150
°C
Storage Temperature
Electrical absolute maximum ratings are at 25ºC.
Absolute maximum ratings are stress ratings.
Stresses in excess of these ratings can cause
permanent damage to the device. Functional
operation of the device at conditions beyond those
indicated in the operational sections of this data sheet
is not implied.
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R03
CPC9909
INTEGRATED CIRCUITS DIVISION
1.4 Recommended Operating
Parameter
Conditions
Symbol
Minimum
Typical
Maximum
Unit
VIN
12
-40
500
-
550
+85
VDC
Input Voltage Range
PWMD Frequency
Operating Temperature
fPWMD
TA
Hz
°C
1.5 Electrical Characteristics
Unless otherwise specified, all electrical specifications are provided for TA=25C.
Parameter
Input
Input Voltage Range
Shut-Down Mode Supply Current
Regulator
Voltage Regulator Output
VDD Current Available
for External Circuitry
VDD Load Regulation
PWM Dimming
PWMD Input Low Voltage
PWMD Input High Voltage
PWMD Pull-Down Resistance
Current Sense Comparator
Current Sense Input Current
Input Low
Input High
Current Sense Threshold Voltage
Current Sense Blanking Interval
Delay from CS Trip to Gate Low
Minimum Off-Time One-Shot
Minimum Off-Time
Gate Driver
Gate High Output Voltage
Gate Low Output Voltage
Gate Output Rise Time
Gate Output Fall Time
Conditions
Symbol
Minimum
Typical
Maximum
Unit
DC Input Voltage
VIN=8 to 550V, PWMD to GND
VIN
IIN
8
-
0.3
550
0.6
VDC
VIN=15V to 550V, IDD=0, IGATE=0
VDD
7.2
7.8
8.4
VDC
-
IDD
-
-
2
mA
VIN=15V, IDD=1mA
VDD
-
150
200
mV
VIN=8V to 550V
VIN=8V to 550V
-
VPWMD(low)
VPWMD(high)
RPWMD
2.4
80
115
0.5
150
CS=0V
CS=VDD
-40°C < TA < 85°C, VIN=15V to 550V
-55°C < TA < -40°C, VIN=15V to 550V
RT=400k
RT=400k
IIL
IIH
VCS(high)
0
250
400
300
5
5
300
300
-
mV
tBLANK
tDELAY
-5
-5
200
180
-
RT=400k
toff
6
-
8
s
IOUT=-10mA
IOUT=+10mA
CGATE=500pF
CGATE=500pF
VGATE(high)
VGATE(low)
tRISE
tFALL
VDD-0.3
-
VDD-0.06
0.03
16
7
0.3
-
mA
V
k
A
ns
ns
V
ns
1.6 Thermal Characteristics
Parameter
Thermal Resistance,
Junction-to-Ambient
1
Package
SOIC-8 With Thermal Pad (NE)
SOIC-8 W/O Thermal Pad (N)
1
Symbol
Minimum
Typical
Maximum
Unit
RJA
-
50
128
-
°C/W
Use of a four-layer PCB can improve thermal dissipation (reference EIA/JEDEC JESD51-5).
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5
CPC9909
INTEGRATED CIRCUITS DIVISION
2. Functional Description
Figure 1 Typical Application Circuit
8 - 550V
VDD
VDD
VIN
CPC9909
Voltage
Regulator
RT
Voltage
Reference
L1
RT Minimum Off-Time
TRIG
One Shot
Q
Q1
S
+
LD
D1
GATE
Q
R
+
CS
PWMD
CVDD
RT
RSENSE
GND
Buck Configuration
2.1 Overview
The CPC9909 drives the LEDs via a minimum
off-time, peak-current-limited, pulse-frequency
modulation scheme. This control scheme is inherently
stable, and the driver can be operated above a 50%
duty cycle without any open-loop instability or
sub-harmonic oscillations. Since the switching
frequency depends on the LED load current, it results
in a high efficiency operation.
2.2 LED Driver Theory of Operation
The typical application circuit is as shown in Figure 1
When PWMD is high, the control circuit is enabled and
the gate driver turns on the external power MOSFET
(Q1), causing the inductor (L1) current to ramp up until
the voltage across the current sense resistor (RSENSE)
exceeds VCS(high). When the voltage at the CS pin
exceeds this threshold, the gate driver turns Q1 off.
Q1 remains off for the duration of the fixed minimum
off-time. While the switch is off, the inductor continues
to deliver the current to the load though the diode
(D1). When the off-time expires, Q1 turns on again
until the peak current limit is reached, and the process
repeats.
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The peak current limit threshold is set by the external
sense resistor, RSENSE, and the internal voltage
threshold, VCS(high). This internal voltage threshold can
also be set externally via the LD pin. The lower of
these two thresholds and RSENSE set the peak current
in the inductor.
A soft start function can be implemented by ramping
up the DC voltage at the LD pin from 0V to VCS(high) at
the desired rate. To utilize the soft start function,
connect a resistor divider from VDD to ground and a
capacitor from the LD pin to ground, as shown in
Figure 2 Soft-Start Circuit
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51kΩ
CPC9909
VIN
CS
GND
GATE
RT
LD
VDD
PWMD
2.2kΩ
0.1μF
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CPC9909
INTEGRATED CIRCUITS DIVISION
2.3 Input Voltage Regulator
The CPC9909 has an internal voltage regulator that
can work with input voltages ranging from 12VDC to
550VDC. When a DC voltage greater than 12V is
applied at the VIN pin, the internal voltage regulator
regulates the voltage down to a typical 7.8V. The VDD
pin is the internal voltage regulator output pin and
must be bypassed by a low-ESR capacitor to provide
a low impedance path for high frequency switching
noise.
The CPC9909 driver does not require the bulky
start-up resistors typically needed for off-line
controllers. The internal voltage regulator provides
sufficient voltage and current to power internal IC
circuits. This voltage is also available at the VDD pin,
and can be used as a bias voltage for external
circuitry.
The internal voltage regulator can be bypassed by
applying an external DC voltage to the VDD pin that is
slightly higher than the internally generated regulator
voltage. This reduces the power dissipation of the
integrated circuit, and it is more suitable in isolated
applications where an auxiliary winding can be used to
drive the VDD pin.
The total input current drawn from the VIN pin is equal
to the quiescent current drawn by the internal circuitry
(which is specified at 0.6mA maximum) plus the gate
driver current. See “Shut-Down Mode Supply Current”
in Section 1.5 “Electrical Characteristics” on
page 5.
The current draw of the gate driver depends on the
switching frequency and the gate charge of the
external power MOSFET. The total input current can
be calculated by:
I IN  0.6mA +  Q GATE  f S 
Where QGATE is the total gate charge of the MOSFET
and fS is the oscillator external frequency.
2.4 Current Sense Resistor
The current sense resistor value can be found by:
V CS  high 
R SENSE = ---------------------------------I LED + 0.5I L
Where:
• VCS(high) = current sense threshold =0.25V (or VLD)
• ILED = average LED/inductor current
• IL = inductor ripple current = 0.3*ILED
Combining terms:
V CS  high 
R SENSE = ---------------------------1.15  I LED
2.5 Current Sense Blanking
The CPC9909 has an internal current sense blanking
circuit. When the power MOSFET is turned on, the
external inductor can cause an undesired spike at the
current sense pin, initiating a premature termination of
the gate pulse. To avoid this condition, a typical 400ns
internal leading edge blanking time is implemented,
thereby eliminating the need for external RC filtering,
and simplifying the design. During the current sense
blanking time, the current limit comparator is disabled,
preventing the gate-drive circuit from terminating the
gate-drive signal.
2.6 Enable/Disable Function
Connecting the PWMD pin to VDD enables the gate
driver. Connecting PWMD to GND disables the gate
driver and sets the device in standby mode. In standby
mode, the quiescent current is 0.6mA maximum.
2.7 Minimum Off-Time One-Shot
The CPC9909 uses a fixed off-time control scheme.
The minimum off-time is set by an external resistor
connected between the RT and GND terminals.
The off-time can be determined by:
The peak LED current is set by an external sense
resistor (RSENSE) connected from the CS pin to
ground.
t off  s  =    R T  k    66  + 0.8 
The value of the current sense resistor is calculated
based on the average LED current desired, the current
sense threshold, and the inductor ripple current.
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The peak-to-peak difference in the inductor current
waveform is referred to as inductor ripple current (the
inductor is typically selected to be large enough to
keep this ripple within 30% of the average). Factor in
the ripple current when calculating the sense resistor.
Off-time selection indirectly determines the switching
frequency of the LED driver.
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CPC9909
INTEGRATED CIRCUITS DIVISION
The switching frequency is determined by:
The minimum inductor value for a given ripple current
is:
1–D
F S = ------------t off
V LEDstring
L MIN = --------------------------  t off
I L
Where:
• D = duty cycle
• toff = Off-time
Where:
In general, switching frequency selection is based on
the inductor size, controller power dissipation, and the
input filter capacitor.
The inductor peak current is given by:
• IL = Ripple Current
The typical off-line LED driver switching frequency, fS,
is between 30 kHz and 120 kHz.
This operating range gives the designer a reasonable
compromise between switching losses and inductor
size. The internal off-time one-shot has an accuracy of
±20%. The figure below shows the RT resistor
selection for the desired off-time.
I LPeak = I LED + 0.5I L
2.9 Gate Output Drive
The CPC9909 uses an internal gate drive circuit to
turn on and off an external power MOSFET. The gate
driver can drive a variety of MOSFETs. For a typical
off-line application, the total MOSFET gate charge will
be less than 25nC.
RT vs Off-Time
45
40
35
t o f f (u S )
30
25
20
toff (μS)
15
10
5
0
0
500
1000
1500
RT (KΩ)
2000
2500
3000
2.8 Inductor Design
The inductor value is defined by the LED/inductor
ripple current, minimum off time, and the output
voltage. The minimum off time is determined by the
duty cycle and switching frequency. The duty cycle is
given by:
V LEDstring
D = -------------------------V in  min 
Where:
• VLEDstring is the LED string voltage at the desired
average LED current.
• Vin(min) is the minimum DC input voltage.
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R03
CPC9909
INTEGRATED CIRCUITS DIVISION
2.10 Linear Dimming
A linear dimming function can be implemented by
applying a DC control voltage to the LD pin. By varying
this voltage from 0V to VCS(high), the user can adjust
the current level in the LEDs which in turn will increase
or decrease the light intensity. The control voltage to
the LD pin can be generated from an external voltage
divider network from VDD. This function is useful if the
user requires LED current of a particular level, and
there is no exact RT value available. Note that applying
a voltage higher than the current sense threshold
voltage to the LD pin will not change the output current
due to the fixed internal threshold setting. When the
LD pin is not used, it should be connected to VDD.
Figure 3 Typical Linear Dimming Application Circuit
Fuse F2
2A
LD
Monitor
BR1
AC
AC
AC Input
90 - 265Vrms
+
D1
BYV26B
NTC1
R1
402kΩ
C1
22μF
400V
C1
0.1μF
400V
VIN
CS
GND
GATE
L1
4.7mH
HB LEDs
350mA
R2
51kΩ
CPC9909
RT
LD
VDD
PWMD
RA1
5.0kΩ
IXTA8N50P
C1
2.2μF
16V
R4
0.56Ω
C1
0.1μF
25V
2.11 PWM Dimming
the PWM gate driver output pin GATE. The signal can
be generated by a microcontroller or a pulse generator
with a duty cycle proportional to the amount of desired
light output.
Pulse width modulation dimming can be implemented
by driving the PWMD pin with a low frequency square
wave signal in the range of a few hundred Hertz. The
PWMD signal controls the LED brightness by gating
Figure 4 Buck Driver for PWM Dimming Application Circuit
VIN
12 - 30VDC
D1 Schottky
40V
10μF
50V
Q1
220μH
HB LEDs
900mA Max
ASMT-Mx00
CPC9909
VIN
CS
GND
GATE
402kΩ
RT
LD
VDD
PWMD
CPC1001N*
0.1μF
50V
R1
0.27Ω
PWM
*Optional Isolation
2.12 Combination Linear and PWM Dimming
A combination of linear and PWM dimming techniques
can be used to achieve a large dimming ratio.
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9
CPC9909
INTEGRATED CIRCUITS DIVISION
3. Manufacturing Information
3.1 Moisture Sensitivity
All plastic encapsulated semiconductor packages are susceptible to moisture ingression. IXYS Integrated
Circuits Division classified all of its plastic encapsulated devices for moisture sensitivity according to the
latest version of the joint industry standard, IPC/JEDEC J-STD-020, in force at the time of product
evaluation. We test all of our products to the maximum conditions set forth in the standard, and guarantee
proper operation of our devices when handled according to the limitations and information in that standard as well as
to any limitations set forth in the information or standards referenced below.
Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced
product performance, reduction of operable life, and/or reduction of overall reliability.
This product carries a Moisture Sensitivity Level (MSL) rating as shown below, and should be handled according to
the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033.
Device
Moisture Sensitivity Level (MSL) Rating
CPC9909N / CPC9909NE
MSL 1
3.2 ESD Sensitivity
This product is ESD Sensitive, and should be handled according to the industry standard
JESD-625.
3.3 Reflow Profile
This product has a maximum body temperature and time rating as shown below. All other guidelines of
J-STD-020 must be observed.
Device
Maximum Temperature x Time
CPC9909N / CPC9909NE
260°C for 30 seconds
3.4 Board Wash
IXYS Integrated Circuits Division recommends the use of no-clean flux formulations. However, board washing to
remove flux residue is acceptable, and the use of a short drying bake may be necessary. Chlorine-based or
Fluorine-based solvents or fluxes should not be used. Cleaning methods that employ ultrasonic energy should not be
used.
Pb
10
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CPC9909
INTEGRATED CIRCUITS DIVISION
3.5 Mechanical Dimensions
3.5.1 8-Pin SOIC Package
1.270 REF
(0.050)
Pin 8
PCB Land Pattern
0.60
(0.024)
0.762 ± 0.254
(0.030 ± 0.010)
3.937 ± 0.254
(0.155 ± 0.010)
5.994 ± 0.254
(0.236 ± 0.010)
1.55
(0.061)
5.40
(0.213)
Pin 1
0.406 ± 0.076
(0.016 ± 0.003)
1.346 ± 0.076
(0.053 ± 0.003)
4.928 ± 0.254
(0.194 ± 0.010)
1.27
(0.050)
0.559 ± 0.254
(0.022 ± 0.010)
Dimensions
mm
(inches)
0.051 MIN - 0.254 MAX
(0.002 MIN - 0.010 MAX)
3.5.2 8-Pin SOIC EP Package
3.80
(0.150)
3.937 ± 0.254
(0.155 ± 0.010)
5.994 ± 0.254
(0.236 ± 0.010)
0.762 ± 0.254
(0.030 ± 0.010)
5.40
2.75
(0.209) (0.108)
1.55
(0.061)
Pin 1
0.406 ± 0.076
(0.016 ± 0.003)
1.27
(0.050)
1.270 REF
(0.050)
4.928 ± 0.254
(0.194 ± 0.010)
0.60
(0.024)
Recommended PCB Land Pattern
1.346 ± 0.076
(0.053 ± 0.003)
2.540 ± 0.254
(0.100 ± 0.010)
7º
0.051 MIN - 0.254 MAX
(0.002 MIN - 0.010 MAX)
3.556 ± 0.254
(0.140 ±0.010)
Dimensions
mm
(inches)
Note: Thermal pad should be electrically connected to GND, pin 3.
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11
CPC9909
INTEGRATED CIRCUITS DIVISION
3.6 Packaging Information
For both the SOIC-8 and the SOIC-8 EP Packages.
330.2 DIA.
(13.00 DIA.)
Top Cover
Tape Thickness
0.102 MAX.
(0.004 MAX.)
W=12.00
(0.472)
B0=5.30
(0.209)
K0= 2.10
(0.083)
A0=6.50
(0.256)
P=8.00
(0.315)
User Direction of Feed
Embossed Carrier
Embossment
Dimensions
mm
(inches)
NOTE: Tape dimensions not shown comply with JEDEC Standard EIA-481-2
For additional information please visit www.ixysic.com
IXYS Integrated Circuits Division makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and
reserves the right to make changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses or indemnity are expressed
or implied. Except as set forth in IXYS Integrated Circuits Division’s Standard Terms and Conditions of Sale, IXYS Integrated Circuits Division assumes no liability
whatsoever, and disclaims any express or implied warranty relating to its products, including, but not limited to, the implied warranty of merchantability, fitness for a
particular purpose, or infringement of any intellectual property right.
The products described in this document are not designed, intended, authorized, or warranted for use as components in systems intended for surgical implant into
the body, or in other applications intended to support or sustain life, or where malfunction of IXYS Integrated Circuits Division’s product may result in direct physical
harm, injury, or death to a person or severe property or environmental damage. IXYS Integrated Circuits Division reserves the right to discontinue or make changes
to its products at any time without notice.
Specifications: DS-CPC9909-R03
© Copyright 2012, IXYS Integrated Circuits Division
All rights reserved. Printed in USA.
12/18/2012
12
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