MICREL SM802101

SM802101
ClockWorks™ PCI-e Octal 100MHz/200MHz
Ultra-Low Jitter, HCSL Frequency
Synthesizer
General Description
Features
The SM802101 is a member of the ClockWorks™ family of
devices from Micrel and provides an extremely low-noise
timing solution for PCI-Express clock signals. It is based
upon a unique patented RotaryWave® architecture that
provides very-low phase noise.
The device operates from a 3.3V or 2.5V power supply
and synthesizes eight HCSL output clocks at 100MHz or
200MHz. The SM802101 accepts a 25MHz crystal or
LVCMOS reference clock.
Data sheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.
• Generates eight HCSL clock outputs at 100MHz or
200MHz
• 2.5V or 3.3V operating range
• Typical phase jitter @ 100MHz
(1.875MHz to 20MHz): 105fs
• Industrial temperature range (–40°C to +85°C)
• Green, RoHS, and PFOS compliant
• Available in 44-pin 7mm × 7mm QFN package
Applications
• PCI-Express
Block Diagram
ClockWorks is a trademark of Micrel, Inc
RotaryWave is a registered trademark of Multigig, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
July 2011
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Micrel, Inc.
SM802101
Ordering Information(1)
Part Number
Marking
Shipping
Temperature Range
Package
SM802101UMG
802101
Tray
–40°C to +85°C
44-Pin QFN
SM802101UMGR
802101
Tape and Reel
–40°C to +85°C
44-Pin QFN
Note:
1. Devices are Green, RoHS, and PFOS compliant.
Pin Configuration
44-Pin QFN
(Top View)
Pin Description
Pin Number
Pin Name
1, 2
/Q5, Q5
4, 5
/Q6, Q6
7, 8
/Q7, Q7
25, 26
/Q0, Q0
28, 29
/Q1, Q1
32, 33
/Q2, Q2
35, 36
/Q3, Q3
41, 42
/Q4, Q4
July 2011
Pin Type
Pin Level
O, (DIF)
HCSL
2
Pin Function
Differential Clock Output
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SM802101
Pin Description (Continued)
Pin Number
14
Pin Name
Pin Type
FSEL
I, (SE)
Pin Level
Pin Function
LVCMOS
Frequency Select, 1 = 100MHz, 0 = 200MHz,
45KΩ pull-up
12, 13
VDD
PWR
Power Supply
31, 37, 38
VDDO1
PWR
Power Supply for Outputs Q0 – Q3
16, 43, 44
VDDO2
PWR
Power Supply for Outputs Q4 – Q7
21, 23
(Exposed
Pad)
PWR
Core Power Supply Ground. The exposed pad must
be connected to the VSS ground plane.
VSS
24, 39
VSSO1
PWR
Power Supply Ground for Q0 – Q3
3, 6, 40
VSSO2
PWR
Power Supply Ground for Outputs Q4 – Q7
PLL Bypass, Selects Output Source
9
PLL_BYPASS
I, (SE)
LVCMOS
0 = Normal PLL Operation
1 = Output from Input Reference Clock or Crystal
45KΩ pull-down
I, (SE)
LVCMOS
Selects PLL Input Reference Source
10
XTAL_SEL
11, 20, 27, 30, 34
TEST
17
REF_IN
I, (SE)
LVCMOS
18
XTAL_IN
I, (SE)
12pF crystal
Crystal Reference Input, no load caps needed (see
Figure 5).
19
XTAL_OUT
O, (SE)
12pF crystal
Crystal Reference Output, no load caps needed
(see Figure 5).
15
OE1
I, (SE)
LVCMOS
22
OE2
I, (SE)
LVCMOS
PLL_BYPASS
XTAL_SEL
OE2
OE1
INPUT
OUTPUT
0
−
1
1
−
PLL
1
−
1
1
−
XTAL/REF_IN
−
0
1
1
REF_IN
−
−
1
1
1
XTAL
−
−
−
−
1
0
−
−
0
1
Q4-Q7 Tri-state
Q0-Q3 Tri-state
0 = REF_IN, 1 = XTAL, 45KΩ pull-up
Factory Test pins, Do not connect anything to these
pins.
Reference Clock Input
Output Enable, Outputs Q0 – Q3 disable to tri-state,
0 = Disabled, 1 = Enabled, 45KΩ pull-up
Output Enable, Outputs Q4 – Q7 disable to tri-state,
0 = Disabled, 1 = Enabled, 45KΩ pull-up
Truth Tables
FSEL
Output Frequency
(MHz)
0
200
1
100
July 2011
3
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SM802101
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage (VDD, VDDO1/2) ......................................+4.6V
Input Voltage (VIN) .............................. −0.50V to VDD + 0.5V
Lead Temperature (soldering, 20s)............................ 260°C
Case Temperature ..................................................... 115°C
Storage Temperature (Ts) ......................... −65°C to +150°C
Supply Voltage (VDD, VDDO1/2)............ +2.375V to +3.465V
Ambient Temperature (TA).......................–40°C to +85°C
Junction Thermal Resistance(3)
QFN (θJA)
Still-Air......................................................24°C/W
QFN (ψJB)
Junction-to-Board ......................................8°C/W
DC Electrical Characteristics(4)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5%
VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5%
TA = −40°C to +85°C.
Symbol
Parameter
VDD, VDDO1/2
VDD, VDDO1/2
IDD
Min.
Typ.
Max.
Units
2.5V Operating Voltage
2.375
2.5
2.625
V
3.3V Operating Voltage
3.135
3.3
3.465
V
Eight Outputs enabled, 100MHz
Outputs 50Ω to VSS
217
270
Eight Outputs enabled, 200MHz
Outputs 50Ω to VSS
229
285
Supply current VDD + VDDO
Condition
mA
Four Outputs enabled, 100MHz
Outputs 50Ω to VSS, OE1 or OE2 = 0
149
185
Four Outputs enabled, 200MHz
Outputs 50Ω to VSS, OE1 or OE2 =0
158
197
Min
Typ.
Max.
Units
HCSL DC Electrical Characteristics(4)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5%
VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5%
TA = −40°C to +85°C. RL = 50Ω to VSS
Symbol
Parameter
Condition
VOH
Output High Voltage
660
700
850
mV
VOL
Output Low Voltage
−150
0
27
mV
VCROSS
Crossing Point Voltage
250
350
550
mV
Notes:
1.
Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
2.
The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3.
Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB.
4.
The circuit is designed to meet the AC and DC specifications shown in the above table(s) after thermal equilibrium has been established.
July 2011
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SM802101
LVCMOS (PLL_BYPASS, XTAL_SEL, FSEL, OE1, OE2) DC Electrical Characteristics(4)
VDD = 3.3V ±5%, or 2.5V ±5%, TA = −40°C to +85°C.
Symbol
Parameter
Condition
VIH
Input High Voltage
VIL
Input Low Voltage
IIH
Input High Current
VDD = VIN = 3.465V
IIL
Input Low Current
VDD = 3.465V, VIN = 0V
Min.
Typ.
Max.
Units
2
VDD + 0.3
V
−0.3
0.8
V
150
μA
−150
μA
REF_IN DC Electrical Characteristics(4)
VDD = 3.3V ±5%, or 2.5V ±5%, TA = −40°C to +85°C.
Symbol
Parameter
VIH
Input High Voltage
VIL
Input Low Voltage
IIN
Input Current
Condition
Min.
XTAL_SEL = VIL, VIN = 0V to VDD
Max.
Units
1.1
VDD + 0.3
V
−0.3
0.6
V
−5
5
XTAL_SEL = VIH, VIN = VDD
Typ.
20
μA
Crystal Characteristics
Parameter
Condition
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitor, C0
Correlation Drive Level
12pF Load
July 2011
Min.
Typ.
Max.
Units
Fundamental, Parallel Resonant
25
1
10
5
50
5
100
MHz
Ω
pF
uW
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SM802101
AC Electrical Characteristics(4, 5)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5%
VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5%
TA = −40°C to +85°C. RL = 50Ω to VSS
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
FOUT1
Output Frequency
FSEL=1
100
MHz
FOUT2
Output Frequency
FSEL=0
200
MHz
FREF
Reference Input Frequency
25
MHz
TR/TF
LVPECL Output Rise/Fall Time
ODC
Output Duty Cycle
TSKEW
Output-to-Output Skew
TLOCK
PLL Lock Time
20% – 80%
RMS Phase Jitter
300
450
ps
48
50
52
%
Note 6
100MHz
Integration Range (1.875MHz – 20MHz)
Integration Range (12kHz – 20MHz)
Tjit(∅)
150
ps
20
ms
105
250
(7)
Spurious Noise Components
45
fs
200MHz
Integration Range (1.875MHz – 20MHz)
Integration Range (12kHz – 20MHz)
100
250
25MHz using 100MHz
25MHz using 200MHz
-85
-90
dBc
Notes:
5.
All phase noise measurements were taken with an Agilent 5052B phase noise system.
6.
Defined as skew between outputs at the same supply voltage and with equal load conditions; Measured at the output differential crossing points.
7.
Measured using 25MHz crystal as the input reference source. If using an external reference input, use a low phase noise source. With an external
reference, the phase noise will follow the input source phase noise up to about 1MHz.
July 2011
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Micrel, Inc.
SM802101
Application Information
Input Reference
When operating with a crystal input reference, do not
apply a switching signal to REF_IN.
HCSL Outputs
HCSL outputs are to be terminated with 50Ω to VSS. For
best performance load all outputs. If you want to ACcouple or change the termination, contact Micrel’s
application group at: [email protected].
Crystal Layout
Keep the layers under the crystal as open as possible
and do not place switching signals or noisy supplies
under the crystal.
Crystal load capacitance is built inside the die so no
external capacitance is needed. See the Selecting a
Quartz crystal for the Clockworks Flex I Family of
Precision Synthesizers application note for further
details.
Contact Micrel’s HBW applications group if you need
assistance on selecting a suitable crystal for your
application at: [email protected].
July 2011
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SM802101
Phase Noise Plots
Phase Noise Plot: 100MHz, 1.875MHz − 20MHz 101fS
Phase Noise Plot: 100MHz, 12kHz − 20MHz 254fS
July 2011
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SM802101
Phase Noise Plots (Continued)
Phase Noise Plot: 200MHz, 1.875MHz − 20MHz 94fS
Phase Noise Plot: 200MHz, 12kHz − 20MHz 253fS
July 2011
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SM802101
Figure 1. Duty Cycle Timing
Figure 2. All Outputs Rise/Fall Time
Figure 3. RMS Phase/Noise Jitter
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SM802101
Figure 4. HCSL Output Load and Test Circuit
Figure 5. Crystal Input Interface
July 2011
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SM802101
Package Information
44-pin QFN
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability
whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties
relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product
can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant
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indemnify Micrel for any damages resulting from such use or sale.
© 2011 Micrel, Incorporated.
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