MH89626C OPS/DID SLIC Preliminary Information Features ISSUE 3 Ordering Information • Transformerless 2-4 wire conversion • Constant current with constant voltage fallback for long loops • Long length capability (R Loop > 1850Ω) • Input impedance • 200Ω + 560Ω // 0.1µF (MH89626C-02) • 200Ω + 680Ω // 0.1µF (MH89626C-04) • Ring trip filter with auto ring trip • Three relay drivers • Built-in Tip/Ring reversal capability on the hybrid • Serial control interface • External or software programmable receive gain, -3.5 or -7.0dB MH89626C-02 MH89626C-04 38 Pin SIL Package 38 Pin SIL Package 0°C to 70°C Description The MH89626C SLIC provides all of the functions required to interface 2-wire off premise subscriber loops to a serial TDM, PCM, switching network of a modern PBX. The MH89626C is manufactured using thick film hybrid technology which offers high voltage capability, reliability and high density resulting in significant printed circuit board area saving of the line cards. A complete line card can be implemented with very few external components. Applications • • • May 1995 Off-Premise PBX Line Cards DID (Direct Inward Dial) Line Cards Central Office Line Cards LGND VDD VEE The SLIC has a simple serial control interface to control the receive gain setting, relay drivers for ringing, and Tip/Ring reversal for DID operation. LCA AGND RGND VREF F1i C2i TF TIP Tip Drive MT8967 A-Law Filter/Codec 2W/4W Conversion Constant Current & Voltage Control Current & Voltage Sensing RING RF2 SD2 SD3 Tip/Ring Reversed SD0 SD1 RF VBat Auto Ring Line Supervision LED SHK Trip Filter VAC VRLY Relay Drive 1 RD1 Di GS Gain Adjust Ring Drive Do Relay Driver 2 RD2 8-Bit Shift Register CS SDi SD4 Relay Driver 3 RD3 SD5 SD6 SD7 Figure 1 - Functional Block Diagram 2-285 MH89626C Preliminary Information TIP RING RF TF LPND VBat RF1 RF2 VEE AGND VDD IC VAC IC CS SHK LED LCA SD1 VREF D1 C2i Do F1i IC IC IC GS IC SD7 SD6 SD5 IC VRLY RGND RD2 RD3 RD1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 Figure 2 - Pin Connections Pin Description Pin # Name 1 TIP 2 RING 3 RF Ring Feed. 4 TF Tip Feed. 5 LGND 6 VBat Battery Supply Voltage: Normally -48V. 7 RF1 Ring Feed 1: Ringing input. 8 RF2 Ring Feed 2: Ringing output. 9 VEE Negative Supply Voltage. (-5V). 10 AGND 11 VDD 12 IC 13 VAC 14 IC Internal Connection. 15 CS Chip Select (Input): A TTL compatible digital input to enable the SDi to control all the functions of the driver. 16 SHK Switch Hook Detect (Output): A logic low indicates an off-hook condition. 17 LED LED Drive (Output).: Drives an LED directly through an internal 2.2kΩ resistor. A logic low indicates an off-hook condition. 18 LCA Loop Current Adjust (input): If this pin is left open, the constant current will be set at 23mA. The loop current can be adjusted by connecting a resistor to VEE. 2-286 Description Tip Lead: Connects to the TIP lead of the telephone line. Ring Lead: Connects to the Ring lead of the telephone line. Loop Ground: Return path for the battery (VBat) supply voltage. Connects to System Ground. Analog Ground: Analog and Digital Ground. Connects to system ground. Positive Supply Voltage. (+5V). Internal Connection. Battery AC Component (input). AC noise present in the VBat supply isolated from the DC components, can be applied to this pin to reduce longitudinal noise on TIP and RING. To implement this feature, connect a 0.1µF 100V capacitor from VBat to VAC, and 1kΩ resistor from VAC to AGND. This pin must be tied to AGND when not used. MH89626C Preliminary Information Pin Description (Continued) Pin # Name Description 19 SDi Serial Data in (input): A TTL compatible digital input. The 8-bit serial input enables the drivers. See Table 1 and Figure 3b. 20 VRef Voltage Reference (Input) +2.5V for the internal codec. 21 Di Data in (Input). A TTL compatible digital input which accepts the 8-bit PCM word from the incoming PCM bus. 22 C2i Clock input (input). A TTl compatible digital input which accepts the 2048 kHz clock. 23 Do Data Out (Output) A three state TTL compatible digital output which drives the 8-bit PCM word to the outgoing PCM bus. 24 F1i Synchronization input (Input). A TTL compatible, active low digital output input enabling the PCM input, PCM output and digital control input. It is internally sampled on every positive edge of the clock, C2i and provides frame and channel synchronization. See fig 3a. 25-27 IC Internal Connection. 28 GS Gain setting (Input). A logic ‘0’ at this input will set the receiving gain to -7.0dB and a logic ‘1’ will set the receiving gain to -3.5dB. If this pin is left open, the receiving gain can be set by SDi, bit 2. 29 IC Internal Connection. 30 SD7 Serial Data (Output). A TTL compatible output coming from the SDi, bit 7. Bit inverted. 31 SD6 Serial Data (Output). A TTL compatible output coming from the SDi, bit 6. Bit inverted. 32 SD5 Serial Data (Output). A TTL compatible output coming from the SDi, bit 5. Bit inverted. 33 IC 34 VRLY 35 RGND 36 RD2 Relay Driver 2 (Output). Connects to a user provided external relay coil. A logic ‘0’ from the SDi, bit 1 will activate this driver. This relay driver is typically used for system in-test. 37 RD3 Relay Driver 3 (Output). Connects to a user provided external relay coil. A logic ‘0’ from the SDi, bit 4 will activate this driver. This relay driver is typically used for system in-test. 38 RD1 Relay Driver 1 (Output). Connects to a user provided external relay coil. A logic ‘0’ from the SDi, bit 0 will activate this driver. This relay driver is typically used for ringing. Internal Connection. Relay Positive Supply Voltage. Normally +5V. Connects to the relay coil and the relay supply voltage. Relay Ground. Return path for relay supply voltage. 2-287 MH89626C Preliminary Information Absolute Maximum Ratings*- All voltages are with respect to AGND unless otherwise specified. Parameter Symbol Min Max Units 1 DC Supply Voltage VDD VEE -0.3 0.3 7 -7 V V 2 DC Battery Voltages ➀ VBat 0.3 -65 V 3 DC Ring Relay Voltage VRLY -0.3 7 V VREF -0.3 VDD V 150 VRMS 4 DC Reference Voltage 5 AC Ring Generator Voltage 6 DC Digital Input Voltage 7 Storage Temperature GS,SDi,Di, C2i,F1i -0.3 VDD V TS -40 +125 °C * Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied. Recommended Operating Conditions Parameter Symbol Min TYP* Max Units 1 DC Supply Voltage VDD VEE 4.75 -4.75 5.0 -5.0 5.25 -5.25 V V 2 DC Battery Voltage ➀ VBat -39.8 -48 -60 V 3 DC Ring Relay Voltage VRLY 5.0 7.0 V 4 DC Reference Voltage ② VREF 2.488 2.500 2.512 V 5 AC Ring Generator Voltage Ringing Generator Frequency 22 90 25 130 28 VRMS Hz 6 Operating Temperature 0 25 70 °C TOP ➀ LGND is connected to AGND ② Temperature coefficient of VREF should be better than 100ppm/C 2-288 Comments MH89626C Preliminary Information DC Electrical Characteristics* 1 Characteristics Sym Min Typ† Max Units Supply and Battery Current 5 5 Short Loop IDD IEE IBat 12.5 11.7 23.5 15 15 28 mA mA mA Open Loop IBat 0 1.5 2 mA Power Consumption On Hook (VBat) Powerdown (VDD and VEE) Off-Hook (VDD, VEE, VBat) PC 100 150 1500 mW mW mW ➀ 2 3 VRef DC Reference Voltage Mean Current 4 SHK Low Level Output Voltage High Level Output Voltage VOL VOH -0.3 3.7 5 LED Low Level Output Voltage② High Level Output Voltage VOL VOH Sink Current, Relay to VDD Clamp Diode Current 6 RD1 RD2 RD3 7 RLoop = 0Ω, LCA =Open RLoop = Open RLoop = Open RLoop = 0Ω µA 2 0 5 Test Comments 0.5 5.25 V V IOL = 2mA IOH = 2mA 3.0 2.0 V V IOL = 1.1mA IOH = 0.7mA IOL ICD 65 100 mA mA VOL = 1.0V Low Level Input Voltage High Level Input Voltage VIL VIH 2.0 0.8 V V 8 GS Low Level Input Current High Level Input Current IIL IIH 1 1 µA µA VIL = 0V VIH = 5.0V 9 SDi RD Low Level Input Current Intermediate Input Current High Level Input Current IIL IIM IIH 10 10 10 µA µA VIL = 5.0V VIM = 0.5V VIH = 5.0V 10 Do Low Level Output Voltage High Level Output Voltage Tri-State Leakage Current VOL VOH IOZ 0.4 V V mA IOL = 1.6mA IOH = 0.1mA Low Level Input Current High Level Input Voltage VIL VIH 0.8 V V Low Level Input Current High Level Input Current IIL IIH 10 10 µA µA 11 12 SDi Di C2i F1i 4.0 0.1 2.4 VIL = 0V VIH = 5.0V * DC Electrical Characteristics are over Recommended Operating Conditions with VDD at + 5.0V + 5% unless otherwise stated. † Typical figures are at 25°C with nominal + 5V supplies and are for design aid only. ① Supply current and power consumption characteristics are over Recommended Operating Conditions with VDD at 5.0V, VEE at -5.0V and V Bat at -48.0V. ② The LED output consists of a 2.2K Ω resistor in series with the SHK HCT output. 2-289 MH89626C Preliminary Information Loop Electrical Characteristics* Characteristics 1 Maximum AC Ringing ➀ Current Rejection 2 Ring Trip Detect Time ② 3 Hook Switch Detect Time: Off-Hook to On-Hook On-Hook to Off-Hook Sym Min Typ† Max 33 Operating Loop Current IIP 18 5 Operating Loop Resistance RIP 0 0 6 Loop Current at Off-Hook ③ Detect Threshold Ish 7 22 10 125 ms 20 20 ms ms 50 mA 1900 2300 Ω Ω 13 mA Test Comments 25Hz, VBat = -48V mA 100 4 Units LCA = Adjustable VBat = -39.8V VBat = -48V * Loop Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated. † Typical figures are at 25°C with nominal + 5V supplies and are for design aid only. ① The SLIC can be loaded with an AC impedance as low as 4000Ω without generating a false SHK output. Since each REN represents 8kΩ, the SLIC can drive a REN of 2 without generating a false SHK output. ② This parameter is over Recommended Operating Conditions as well as the specified Operating Loop Resistance. ③ Off-Hook Detect (SHK) will be detected for loop lengths of 2900Ω or less. AC Electrical Characteristics* Characteristics 1 2- Wire input (200Ω + 560Ω // 0.1µF) −2 Variant (200Ω + 680Ω // 0.1µF) −4 Variant Sym Min Typ† Max Units Zin Test Comments 720 Ω 1020 Hz 813 Ω 1020 Hz 2 Return Loss at 2-Wire 14 18 14 51 40 32 dB dB dB 300 Hz 500-2000 Hz 3400 Hz 3 Longitudinal to Metallic Balance 40 46 65 65 dB dB 300-600 Hz 600-3400 Hz 4 Transhybrid Loss 16 20 16 36 24 24 dB dB dB 300 Hz 500-2500 Hz 3400 Hz 5 Power Supply Rejection Ratio at 2-wire and Do: VDD VEE VBat PSRR Ripple 50mV 1020 Hz 20 20 20 40 30 40 * AC Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated. † Typical figures are at 25°C with nominal +5V supplies and are for design aid only. 2-290 dB dB dB MH89626C Preliminary Information AC Electrical Characteristics* - Transmit (A/D path) Characteristics 1 Absolute Gain Default (codec odB) 2 Transmit Gain 3 Loss Distortion with frequency (relative to level at 1020Hz with codec at 0dB) 4 5 Gain variation with Input Level (relative to gain at 1020Hz with -6dBm input) 6 Signal Input Overload Level at 2-Wire Signal Output Overload Level at Do 7 Signal to Total Distortion Ratio at Do 8 Sym Min Typ† Max Units -0.5 0 0.5 dB 1.0 0.75 0.35 0.55 1.5 dB dB dB dB dB dB dB 0-200 Hz 200-300 Hz 300-400 Hz 400-600 Hz 600-2400 Hz 2400-3000 Hz 3000-3400 Hz 0.25 0.25 0.5 1.5 dB dB dB dB Input 1020 Hz 0 to +3dBm -40 to 0dBm -50 to -40dBm -55 to -50dBm 0 0.0 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 0.39 0.22 -0.25 -0.25 -0.5 -1.5 Harmonic Distortion (2nd or 3rd Harmonic) at DSTo 10 Idle Channel Noise at Do Input -6dB 1020 Hz dB 3.14 dBm THD < 5% Input 1020Hz 3.14 dBm0 THD < 5% Input 1020Hz 35 33.8 28.8 19.5 14.5 dB dB dB dB dB Out-of-Band Discrimination at Do: Signals in 4.6 -72 kHz band Signals in 300-3400 Hz band other than 1020 Hz Signals in 4.6 -72 kHz band 9 Test Comments -70 Input at 2-Wire 0 to -10dB -20dBm -30dBm -40dBm -50dBm -50 -40 dBm0 dBm0 Input at 2-wire -25dBm, 4.6 -72kHz 0dbm, 1020Hz -25 dBm0 0dBm, 300 -3400 Hz -41 dB -64 dBm0p † Typical figures are at 25°C with nominal +5V supplies and are for design aid only. * AC Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated. 2-291 MH89626C Preliminary Information AC Electrical* - Receive (D/A) path Characteristics 1 Absolute Gain (Codec 0dB, GS = 5V) 2 Gain programmable Range GS = 5V GS = 0V 3 4 Loss Distortion with Frequency (relative to level at 1020 Hz with codec at 0dB and GS = 5V) Gain Variation with Input Level (relative to gain to 1020Hz with -10dBm0 input) Sym Min Typ† Max Units -0.5 0.0 0.5 dB -0.09 -0.08 -0.25 -0.25 -0.5 -1.5 Input -10dBm0 1020 Hz dB dB Input - 10dBm0 1020 Hz 1020 Hz 1.0 0.75 0.35 0.55 1.5 dB dB dB dB dB dB dB Input -10dBm0 0-200 Hz 200-300 Hz 300-400 Hz 400-600 Hz 600-2400 Hz 2400-3000 Hz 3000-3400 Hz 0.25 0.25 0.5 1.5 dB dB dB dB Input 1020 Hz 0 to +3dBm -40 to 0dBm -50 to -40dBm -55 to -55dBm -3.5 -7.0 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 Test Comments 5 Signal Input Overload Level at Di 3.14 dBm THD < 5% Input 1020Hz 6 Signal Output Overload Level at 2-wire 3.14 dBm0 THD < 5% Input 1020Hz 7 Signal Output to Total Distortion Ratio at 2-Wire 35 32.9 24.9 19.9 dB dB dB dB 8 Out-of-Band Discrimination at 2-Wire: Signals in 4.6 -72 kHz band Signals in 300-3400 Hz band other than 1020 Hz Signals in 4.6 -72 kHz band 9 Harmonic Distortion (2nd or 3rd Harmonic) at 2-Wire 10 Idle Channel Noise at 2-Wire Input at Di -73 -73 -50 -40 dBm dBm -25dBm0, 4.6 -72kHz 0dBm0, 1020 Hz -25 dBm 0dBm0, 300-3400 Hz -41 dB -67 -67 dBmp dBmp * AC Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated. † Typical figures are at 25°C with nominal +5V supplies and are for design aid only. 2-292 Input at 2-Wire 0 to -20dB -30dBm -40dBm -50dBm Gain Setting -3.5dB -7dB MH89626C Preliminary Information Loop Electrical Characteristics Characteristics 1 Clock Frequency 2 3 4 5 6 D I G I T A L Sym Min Typ* Max Units C2i fC 2.046 2.048 2.05 MHz Clock Rise Time C2i tCR 50 ns Clock Fall Time C2i tCF 50 ns Clock Duty Cycle C2i 60 % Chip Enable Rise Time F1i tER 100 ns 40 50 Chip Enable Fall Time F1i tEF 100 ns Propagation Delay Clock to Output Enable Do tPZL tPZH 122 122 ns ns 8 Input Setup Time Di tISH tISL 25 0 ns ns 9 Input Hold Time Di tIH 60 ns 7 Test Comments RL = 10kΩ to VCC CL = 100pF * Typical figures are at 25°C with nominal +5V supplies. For design aid only: not guaranteed and not subject to production testing. Bit Name Description 0 SD0 When Logic ‘0’ activates relay driver 1 to apply ringing to the line 1 SD1 When logic ‘0’ activates relay driver 2. Normally used for in-test 2 SD2 When logic ‘0’ it will set the receive gain to -7.0dB When logic ‘1’ it will set the receive gain to -3.5dB 3 SD3 When logic ‘0’ reverses the TIP and RING. 4 SD4 When logic ‘0’ activates relay driver 3. Normally used for out-test 5 SD5 The output of the serial data stream SDi, bit 5. Bit inverted 6 SD6 The output of the serial data stream SDi, bit 6. Bit inverted 7 SD7 The output of the serial data stream SDi, bit 7. Bit inverted Table 1 - Control of SLIC Functions through SD 2-293 MH89626C Preliminary Information Functional Description TIP/RING Reversal The MITEL MH89626C OPS SLIC (Off-Premise Subscriber Line Interface Circuit) provides a complete interface between an off-premise telephone line and a digital switching system. All BORSCHT functions are provided requiring only a few external components. The input impedance conforms with Chinese standard requirements. For a Direct Inward Dialling (DID) operation, the MH89626C provides a TIP and RING reversal function on the hybrid. This built-in line polarity reversal capability will eliminate the use of an external bulky mechanical relay and provides fast and reliable Tip and Ring reversed function. The serial control stream, SDi, bit 3 at logic low will reverse the polarity of the Tip and Ring. Refer to Table 1 for control of the SLIC functions. Overvoltage Protection The MH89626C is protected from short term (20ms) transients (+250V) between TIP and RING, TIp and Ground, and RING and Ground. However, if the MH89626C is used in conjunction with MH80626C, protection sip, it will meet all CCITT K.20 requirements. The applications circuit is shown in Figure 2. Ringing The MH80626C has two battery feed resistors (50 ohms) and one ringing feed resistor (560 ohms), that are required to be used with the MH89626C as a complete line interface. All resistors on the hybrid are specially designed to withstand high power. The two battery feed resistors are accurately trimmed to achieve good longitudinal balance. Two fuses and current limited resistors (5 ohms) are provided on the hybrid for lightning and high voltage surge protection. Supervision Battery Feed The MH89626C powers the telephone set with constant DC loop current for short lines and automatically reverts to constant voltage for long lines. If the LCA pin is left open, the constant current is set at 23 mA. The Constant current can also be set by adding a resistor connected fro the LCA pin to VEE. The resistance (R) can be calculated as: 147.2 - ILoop R= (0.0001176 X ILoop) - 0.002586 Where ILoop is the desired constant loop current in mA, and R is the resistance from pin LCA to pin VEE in ohms. R(kΩ) 348K 200K 80K 50K 30K ILoop (mA) 25.0 27.1 34.0 40.2 49.7 2-294 The ringing insertion circuitry has the capability to provide ringing voltage to a telephone set by simply adding an external relay, ring generator. The serial control stream, SDi, bit 0 at logic low will activate the Refer to Table 1 for the control of SLIC functions. The loop detection circuit determines whether a low enough impedance is across Tip and Ring to be recognized as an off-hook condition. When an off-hook condition occurs, the SHK and the LED outputs toggle to a low level. These outputs also toggle with incoming dial pulses. During applied ringing, the loop detection circuit engages a ringing filter. This filter prevents a false off-hook detection due to the current associated with the AC ringing voltage as well as current transients that occur when the ringing voltage is switched in and out. The Ring trip detection circuitry deactivates the ring driver after an off-hook condition is detected. Transmit and Receive Gain The Transmit Gain (Tip-Ring to Do) is fixed at 0dB. The Receive Gain (Di to Tip-Ring) is programmable in -3.5 or -7.0dB, either using software (SDi, bit 2) or external hardware (GS pin). MH89626C Preliminary Information MH80626C MH89626C K1A 5 D1 TOUT T Test In Test Out TF R 14 4 12 3 7 2 D4 D2 TIN K3A K2A 8 R1 ROUT Q1 K1B 20 RIN RF2 K2B K3B RF1 -48V F1i TIP RF 23 Do RING 7 30 31 32 RF2 RF1 17 LED SD7 SHK SD6 SD5 16 VAC LGND 13 5 36 6 RD2 18 RD3 K3 RELAY -48V VBat 371 34 R1 = 10k Ω +5% 1/4W 15 CS RD1 K1 RELAY K2 RELAY Components D1,D2,D3,D4 IN4004 Q1 = FET BUZ 22 or equivalent 19 SDi 38 -48V 28 GS Heat sink 9oC/W 16 PTC 21 Di 8 90VRMS 25Hz 22 C2i to other circuit 18 +5V 20 VRef TF C1 R2 Ring 24 1 RF 1 Tip D3 6 LCA VRLY VDD VEE 31 9 AGND 30 RGND 18 290V TISP R2 = 1k Ω + 5% 1/4W C1 = 0.01µF + 10% 100V +5V -5V PTC = 55Ω, 50mA Figure 3 - Application Circuit C2i F1i tPHZ tES tES Do tPZH tPLH tPHL tPZL Di tISL tISH tIH Figure 4a - Control Timing Diagram 2-295 MH89626C Preliminary Information C2i CS SD1 b7 b5 b6 b2 b0 b1 Figure 4b -Control Timing Diagram 0.12 Max (3.0 Max) 3.80 + 0.015 (9.652 + 1.4) Side View 0.58+0.02 (14.7+0.5) 1 2 3 4 37 38 0.010 + 0.002 (0.25 + 0.05) 0.27 Max (6.9 Max) * 0.05 + 0.01 (1.3 + 0.5) Notes: 1) Not to scale 2) Dimensions in inches). 3) (Dimensions in millimetres). *Dimensions to centre of pin & tolerance non accumulative. * 0.25 + 0.02 (6.4 + 0.05) * 0.020 + 0.005 (0.51 + 0.13) Figure 5 - Mechanical Data 2-296 * 0.18 + 0.02 (4.6 + 0.5) 0.100 + 0.010 (2.54 + 0.26)