MH88632B Central Office Interface Circuit Preliminary Information Features • • • • • • • • ISSUE 3 Supports Loop Start and Ground Start protocols 2-4 Wire conversion Programmable Input Impedance, Network Balance Impedance and gains Three relay drivers Line state detection outputs 15mA operation allowing long line length capability On-hook reception for Caller Line Identification Meets FCC Part 68 Leakage Current Requirements Applications Interface to Central Office telephone line for • • • • • PBX Key Telephone System Terminal Equipment Digital Loop Carrier Wireless Local Loop RV FL RL RG TG September 1997 Ordering Information MH88632B 40 Pin SIL Package MH88632BT 40 Pin 90˚ Package 0°C to 70°C Description The Mitel MH88632B Central Office Interface Circuit provides a complete analog and signalling link between audio switching equipment and a subscriber line. The device is available in a single in line package for high packing densities or in a 90˚ package for reduced card clearance. The device is fabricated using thick film hybrid technology for optimum circuit design and very high reliability. VCC VEE AGND GRD GRC BRD BRC LRD LRC Status VRLY Detection Relay Driver Circuit RGND RING Dummy Ringer Line RX GRX1 GRX0 Transmit Gain TX GTX1 GTX0 2-4 Wire Hybrid Termination TIP Impedance Matching XLA XLB XLC XLD Receive Gain Z1 Z2 Z600 Z900 Network Balance NS N1 N2 NATT Figure 1 - Functional Block Diagram 2-239 MH88632B Preliminary Information TIP RING XLA XLB XLC XLD IC GRD IC IC RGND VRLY LRD BRD LRC BRC GRC AGND NATT N1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 N2 Z900 Z1 Z2 TX RX GTX0 GTX1 GRX0 GRX1 IC Z600 NS TG RL RV FL RG VEE VCC 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 Figure 2 - Pin Connections Pin Description Pin # Name 1 TIP 2 RING 3 XLA Loop Relay Contact A. Connects to XLB through relay contacts (K1A) when the relay is energized. 4 XLB Loop Relay Contact B. Connects to XLA through relay contacts (K1A) when the relay is energized. 5 XLC Loop Relay Contact C. Connects to XLD through relay contacts (K1B) when the relay is energized. 6 XLD Loop Relay Contact D. Connects to XLC through relay contacts (K1B) when the relay is energized. 7 IC 8 GRD 9 IC Internal Connection. No connection should be made to this pin. 10 IC Internal Connection. No connection should be made to this pin. 11 RGND Relay Ground. Return path for relay supply voltage. 12 VRLY Relay Positive Supply Voltage. Normally +5V. Connects to all relay coils and the relay supply voltage. 13 LRD Loop Relay Drive (Output). Connects to the Loop Relay coil (K1) and is controlled by LRC. 14 BRD Bias Relay Drive (Output). Connects to the Bias Relay coil (K2) and is controlled by BRC. 15 LRC Loop Relay Control (Input). A logic 1 activates LRD. The Loop Relay (K1) is used for placing the Line Termination across Tip and Ring. 2-240 Description Tip Lead. Connects to the Tip lead of a telephone line usually via an external protection circuit. Ring Lead. Connects to the Ring lead of a telephone line usually via an external protection circuit. Internal Connection. No connection should be made to this pin. Ground Ring Lead Relay Drive (Output). Connects to the Ground Ring Lead Relay coil (K3) and is controlled by GRC. Preliminary Information MH88632B Pin Description (continued) 16 BRC Bias Relay Control (Input). A logic 1 activates BRD. The Bias Relay (K2) is used to connect Tip and Ring to -48V via bias resistors. This input should be connected to logic 0 when not used. 17 GRC Ground Ring Relay Control (Input). A logic 0 activates GRD. The Ground Ring Lead Relay (K3) is used to connect Ring to AGND via a bias resistor. This input should be connected to logic 1 when not used. 18 AGND Analog Ground. 4-Wire Ground. Normally connects to system ground. This pin must be connected to the system ground in Ground Start applications. 19 NATT Network Balance AT&T Node. Used when setting the Network Balance Impedance to AT&T compromise network. 20 N1 Network Balance Node 1. Used when a Network Balance Impedance which differs from the Input Impedance is required or when NATT is used. 21 N2 Network Balance Node 2. Used when a Network Balance Impedance which differs from the Input Impedance is required. 22 Z900 23 Z1 Input Impedance Node 1. Used when setting the Input Impedance. 24 Z2 Input Impedance Node 2. Used when a user defined Input Impedance is required. 25 TX Transmit (Output). 4-Wire ground (AGND) referenced analog output. 26 RX Receive (Input). 4-Wire ground (AGND) referenced analog input. 27 GTX0 Transmit Gain Node 0. Connects to GTX1 for 0dB transmit gain. 28 GTX1 Transmit Gain Node 1. Connects to GTX0 for 0dB transmit gain or via a resistor to AGND for transmit gain programming. 29 GRX0 Receive Gain Node 0. Connects to GRX1 for 0dB receive gain. 30 GRX1 Receive Gain Node 1. Connects to GRX0 for 0dB receive gain or via a resistor to AGND for receive gain programming. 31 IC 32 Z600 33 NS Network Balance Setting (Input). Used to select the Network Balance impedance. 34 TG Tip Lead Ground Detect (Output). A logic 0 output indicates that the Tip lead is at ground (AGND) potential. 35 RL Reverse Loop Detect (Output). In the on-hook state, a logic 0 output indicates that reverse loop battery is present. In the off-hook state, a logic 0 output indicates that reverse loop current is present. 36 RV Ringing Voltage Detect (Output). A logic low indicates that ringing voltage is across the Tip and Ring leads. 37 FL Forward Loop Detect (Output). In the on-hook state, a logic 0 output indicates that forward loop battery is present. In the off-hook state, a logic 0 output indicates that forward loop current is present. 38 RG Ring Lead Ground Detect (Output). A logic 0 output indicates that the Ring lead is at ground (AGND) potential. 39 VEE Negative Supply Voltage. -5V DC 40 VCC Positive Supply Voltage. +5V DC Input Impedance 900Ω Node. Connects to Z1 when selecting an Input Impedance of 900Ω. Internal Connection. No connection should be made to this pin. Loop Impedance 600Ω Node. Connects to Z1 when selecting an Input Impedance of 600Ω. 2-241 MH88632B Functional Description The MH88632B is a Central Office Interface Circuit (COIC). It is used to correctly terminate a Central Office 2-Wire telephone line. The device provides a signalling link and a 2-4 Wire line interface between the telephone line and subscriber equipment. The subscriber equipment can include Private Branch Exchanges (PBX's), Key Telephone Systems, Terminal Equipment, Digital Loop Carriers and Wireless Local Loops. All descriptions assume that the device is connected as in the application circuit shown in Figure 3. Isolation Barrier The MH88632B provides an isolation barrier which is designed to meet FCC Part 68 (November 1987) Leakage Current Requirements. Preliminary Information at a logic 0, the Line Termination is removed from across Tip and Ring. An internal Dummy Ringer is permanently connected across Tip and Ring which is a series AC load of (17kΩ+330nF). This represents a mechanical telephone ringer and allows ringing voltages to be sensed. This load can be considered negligible when the line has been terminated. Depending on the Network Protocol being used the line termination can seize the line for an outgoing call, terminate an incoming call, or if applied and disconnected at the correct rate can be used to generate dial pulse signals. The DC line termination circuitry provides the line with an active DC load which is equivalent to a DC resistance of between 190Ω and 290Ω dependant on the loop current. AC Input Impedance External Protection An external protection circuit may be required to assist in preventing overvoltage damage to the device and the subscriber equipment in which it is incorporated. The type of protection required is dependant on the application and the regulatory standards. Please contact the governing regulatory body and local approvals testing houses for more assistance. This protection is shown in block form in Figure 3. The Input Impedance (Zin) is the AC impedance that the MH88632B places across Tip and Ring in order to terminate the telephone line. It can be user defined, set to 600Ω or set to 900Ω. To select a 600Ω Input Impedance, Z1 should be connected directly to Z600. No connection should be made to Z2 or Z900. To select a 900Ω Input Impedance, Z1 should be connected directly to Z900. No connection should be made to Z2 or Z600. Suitable Markets The programmability offered by the MH88632B enhances its suitability for use throughout the world. However, care should be taken that all regulatory requirements, e.g. isolation and DC termination, are being fulfilled for the particular application in which the device is intended to be used. Line Termination In order to user define the Input Impedance an impedance network should be placed between Z1 and Z2. This should be equivalent to 10 times the required Input Impedance and must be greater than 100Ω at 3.4kHz. No connection should be made to Z600 or Z900. For example, to implement an Input Impedance of 220Ω+(820Ω//115nF) an impedance network of 2200Ω+(8200Ω//11.5nF) should be connected between Z1 and Z2 as shown below. 2200Ω When LRC is at a logic 1, LRD is taken to a logic 0 which energizes the Loop Relay (K1), connecting XLA to XLB and XLC to XLD. This places a line termination across Tip and Ring. The device can be considered to be in an off-hook state and DC loop current will flow. The line termination consists of a DC resistance and an AC impedance. When LRC is 2-242 Z1 8200Ω Z2 11.5nF MH88632B Preliminary Information User defined Input Impedances can be used to satisfy most national requirements. See Table 1. The 4-Wire side (TX and RX) can be interfaced to a filter/codec, such as the Mitel MT896X, for use in digital voice switched systems. All connections should be kept as short as possible. Network Balance Impedance The MH88632B’s Network Balance Impedance can be selected to mirror the Input Impedance, to be AT&T compromise or set to a user defined value. Thus, the Network Balance Impedance can comply with most national requirements. With NS at logic 0, the Network Balance Impedance is selected to mirror the Input Impedance of the device. No connection should be made to NATT, N1 and N2. To select a Network Balance Impedance equal to AT&T Compromise (i.e. 350Ω+(1kΩ//210nF) ), NS should be set to a logic 1 and a direct connection made between NATT and N1. No connection should be made to N2. To set a user defined Network Balance Impedance NS is set to a logic 1. An impedance network which is 10 times the required Network Balance Impedance must be placed between N1 and AGND. Another impedance network must be placed between N1 and N2 which is 10 times the selected input impedance of the device. For example, to implement a Network Balance Impedance of 220Ω+(820Ω//115nF), an impedance network of 2200Ω+(8200Ω//11.5nF) must be connected between N1 and AGND. An impedance network equal to 10 times the selected Input Impedance must be connected between N1 and N2. See Table 2. All connections should be kept as short as possible. During full duplex transmission, the signal at Tip and Ring consists of both the signal from the device to the line and the signal from the line to the device. The signal input at RX, being sent to the line, must not appear at the output TX. In order to prevent this, the device has an internal cancellation circuit. The measure of attenuation is Transhybrid Loss (THL). Programmable Transmit and Receive Gain The Transmit Gain (GTX) of the MH88632B is the gain from the balanced signal across Tip and Ring to the ground referenced signal at TX. It is programmed by making a connection to GTX1. A direct connection from GTX1 to GTX0 selects a gain of 0dB. A direct connection from GTX1 to AGND selects a gain of +6dB. Other gains can be programmed by connecting a resistor (RTX) between GTX1 and AGND. The value of resistor is selected using the following formulae. RTX = 5000 10 (-GTX/20) - 0.5 GTX = - 20 log(0.5+5000) RTX The Receive Gain (GRX) of the MH88632B is the gain from the ground referenced signal at RX to the balanced signal across Tip and Ring. It is programmed by making a connection to GRX1. A direct connection from GRX1 to GRX0 selects a gain of 0dB. A direct connection from GRX1 to AGND selects a gain of +6dB. Other gains can be programmed by connecting a resistor (RRX) between GRX1 and AGND. The value of resistor is selected using the following formulae. 2-4 Wire Conversion RRX = The device converts the balanced 2-Wire input, presented by the line at Tip and Ring, to a ground referenced signal at TX. This circuit operates with or without loop current; signal reception with no loop current is required for on-hook reception enabling the detection of Caller Line Identification signals. GRX = -20 log(0.5+5000) RRX Conversely the device converts the ground referenced signal input at RX, to a balanced 2-Wire signal across Tip and Ring. 5000 10(-GRX/20) - 0.5 For the correct programming of Transmit and Receive Gains the selected Input Impedance must match the specified telephone line characteristic impedance. 2-243 MH88632B Both Gains are programmable in the range -12dB to +6dB. This wide range is capable of accommodating most system loss plans. See Tables 3 and 4. Caller Line Identification Caller Line Identification (CLI) provides the called party with the calling party telephone number. The Central Office will utilise the voice path of a regular loop-start telephone line when the MH88632B is in the on-hook state. The CLI information is typically a Frequency Shift Keyed (FSK) data signal which is output at TX. Supervisory Features Line Status Detection Outputs The MH88632B supervisory circuitry provides the signalling status outputs which are monitored by the system controller. The supervisory circuitry is capable of detecting: ringing voltage; forward and reverse loop battery; forward and reverse loop current; grounded tip lead; and grounded ring lead. If these Supervisory Features and the Control Features are used as indicated in Figure 3 they can implement common Network Protocols such as Loop-Start Signalling and Ground-Start Signalling. 1. Ringing Voltage Detect Output (RV) The RV output provides a logic 0 when ringing voltage is detected across Tip and Ring. This detector includes a filter which ensures that the output toggles at the ringing cadence and not at the ringing frequency. Typically this output switches to a logic 0 after 50ms of applied ringing voltage and remains at a logic 0 for 50ms after ringing voltage is removed. 2. Forward Loop and Reverse Loop Detect Outputs (FL & RL) The FL output provides a logic 0 when either forward loop battery or forward loop current is detected, that is the Ring pin voltage is negative with respect to Tip pin voltage. The RL output provides a logic 0 when either reverse loop battery or reverse loop current is detected, that is the Tip pin voltage is negative with respect to Ring pin voltage. 2-244 Preliminary Information 3. Tip Ground and Ring Ground Detect Outputs (TG & RG) The TG output provides a logic 0 when the Tip pin is at ground (AGND) potential. The RG output provides a logic 0 when the Ring pin is at ground (AGND) potential. Control Inputs The MH88632B accepts control signals from the system controller at the inputs Loop Relay Control (LRC), Bias Relay Control (BRC) and Ground Ring Relay Control (GRC). These energize the relay drive outputs Loop Relay Drive (LRD), Bias Relay Drive (BRD) and Ground Ring Relay Drive (GRD) respectively. Each output is active low and has an internal clamp diode to VRLY. The intended use of each of these relay drivers is shown in Figure 3. LRC is being used to add and remove the Line Termination from across Tip and Ring. BRC is used to connect Tip and Ring to -48V via external bias resistors. GRC is controlling the connection of Ring to AGND via an external bias resistor. If these Control Features and the Supervisory Features are used as intended they can be used to implement common Network Protocols such as Loop-Start Signalling and Ground-Start Signalling. Mechanical Information See Figure 9 for mechanical specifications for the MH88632B and Figure 10 for mechanical specifications for the MH88632BT. MH88632B Preliminary Information R1 K2A R2 K2B 48V Battery +5V MH88632B 1 Tip Ring Protection Circuit 2 VCC TIP GTX1 GTX0 TX +5V K1 K2 13 14 8 K3 LRD GRX1 BRD GRX0 GRD RX 12 11 VRLY Z1 RGND 15 Loop relay Control C1 28 RING R3 K3 40 Z600 LRC 27 25 Analog Out 30 29 26 Analog In 23 32 16 Bias Relay Control BRC 17 Ground Relay Control NS 33 GRC K1A 3 4 K1B 1) Configured for 0dB Gain, 600Ω Input Impedance and 600Ω Network Balan ce Impedance RL XLB RV 34 35 Reverse Loop Detect Ringing Voltage Detect FL RG Tip Ground Detect 36 37 5 XLC 6 NOTES: TG XLA 38 Forward Loop Detect Ring Ground Detect XLD AGND 18 C2 VEE 39 2) K1, K2 are E/M FORM C 3) K3 is E/M 1 FORM C -5V 4) R1 = R2 = 30.9kΩ, 1%, 5W 5) R3 = 470Ω, 5%, 5W 6) K2, K3, R1, R2, R3 are required for Ground Start only 7) C1, C2 are decoupling capacitors Figure 3 - Typical Combined Loop Start and Ground Start Appliation Circuit 2-245 MH88632B Preliminary Information Input Impedance Settings Z2 Z1 Z600 NA NA Connect Z1 to Z600 Connect Z1 NA to Z900 Connect network from Z1 to Z2 NA Z900 Resulting input impedance (Zin) NA Connect Z1 to Z900 NA 600Ω 900Ω 0.1 x impedance between Z1 & Z2 Note: NA indicates high impedance (10kΩ) connection to this pin does not effect the resulting Input Impedance Network Balance Settings NS (Input) N2 N1 Low High NA NA NA NA Connect N1 to NATT High Connect network from N1 to AGND equivalent to 10 x NETBAL. Connect network from N1 to N2 equivalent to 10 x Zin. NATT Resulting input impedance (Zin) Equivalent to Zin AT&T compromise (350Ω + 1kΩ // 210nF) Zin must be 600Ω NA 0.1 x impedance between N1 & N2 Notes: NA indicates high impedance (10kΩ) connection to this pin does not effect the resulting Network Balance Impedance. Low indicates Logic 0. High indicates Logic 1. Transmit Gain Programming Transmit Gain (dB) RTX Resistor Value (Ω) +6.0 +4.0 +3.7 0.0 -3.0 -6.0 -12.0 No Resistor 38.3k 32.4k GTX0 to GTX1 5.49k 3.32k 1.43k Notes Results in 0dB overall gain when used with Mitel A-law codec (i.e. MT8967) Results in 0dB overall gain when used with Mitel µ-law codec (i.e. MT8966) Note: Overall gain refers to the receive path of PCM to 2-Wire. Receive Gain Programming Receive Gain (dB) RRX Resistor Value (Ω) +6.0 0.0 -3.0 -3.7 -4.0 -6.0 -12.0 No Resistor GRX0 to GRX1 5.49k 4.87k 4.64k 3.32k 1.43k Notes Results in 0dB overall gain when used with Mitel A-law codec (i.e. MT8967) Results in 0dB overall gain when used with Mitel µ-law codec (i.e. MT8966) Note: Overall gain refers to the transmit path of 2-wire to PCM. 2-246 MH88632B Preliminary Information * Absolute Maximum Ratings* Parameter 1 DC Supply Voltage 2 3 4 DC Relay Voltage Storage Temperature Ring Trip Current Sym Min Max Units VCC VEE VRLY TS -0.3 0.3 -0.3 -55 7 -7 20 +125 180 V V V °C mArms ITRIP Comments 250ms 10% duty cycle or 500ms single shot *Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied. Recommended Operating Conditions Parameter Sym Min Typ‡ Max Units 1 DC Supply Voltage 4.75 -4.75 5 -5 5.25 -5.25 V V 2 DC Relay Voltage VCC VEE VRLY 3 Operating Temperature TOP 0 5 25 15 70 V °C Comments ‡Typical figures are at 25 C with nominal 5V supplies and are for design aid only. DC Electrical Characteristics† Characteristics Sym Min Typ‡ Max Units 14 10 120 15 13 147 0.5 1 Supply Current IDD IEE 2 3 Power Consumption Low Level Output Voltage High Level Output Voltage PC VOL VOH 2.4 mA mA mW V V Sink Current, Relay to VCC Clamp Diode Current IOL ICD 100 150 mA mA Low Level Input Voltage High Level Input Voltage VIL VIH 2 High Level Input Current Low Level Input Current IIH IIL FL RL RG TG RV 4 LRD BRD GRD 5 NS LRC BRC GRC 6 NS LRC BRC GRC 0.8 V V 1 1 µA µA Test Conditions IOL = 4mA IOH = 0.4mA VOL = 0.35V † Electrical Characteristics are over recommended operating conditions unless otherwise stated. ‡ Typical figures are at 25°C with nominal 5V supplies and are for design aid only. 2-247 MH88632B Preliminary Information Loop Electrical Characteristics† Characteristics 1 2 4 5 6 7 8 9 Ringing Voltage Ringing Frequency Operating Loop Current Off-Hook DC Resistance Leakage Current (Tip-Ring to AGND) FL Threshold Tip-Ring Voltage Detect (On-hook) Tip-Ring Current Detect (Off-hook) RL Threshold Tip-Ring Voltage Detect (On-hook) Tip-Ring Current Detect (Off-hook) TG and RG Detect Threshold Sym Min Typ‡ Max Units VR 20 17 15 190 90 20 130 68 90 290 7 Vrms Hz mA Ω mArms 12 6 21 12 V mA LRC = 0V LRC = 5V -12 -6 -21 -12 -14 V mA V LRC = 0V LRC = 5V 275 -12 Test Conditions @1000VAC ✝Electrical Characteristics are over recommended operating conditions unless otherwise stated. ‡Typical figures are at 25°C with nominal 5V supplies and are for design aid only. AC Electrical Characteristics† Characteristics Sym 1 2-wire Input Impedance 2 Return Loss at 2-Wire (Zin = 600Ω) RL 3 Return Loss at 2-Wire (Zin = 900Ω) RL 4 Longitudinal to Metallic Balance Min 20 26 20 22 26 24 40 48 46 dB dB dB dB dB dB 58 58 55 53 51 64 63 61 57 54 dB dB dB dB dB 60 40 18 21 18 21 18 21 62 62 25 33 5 dB dB dB dB dB dB dB dB kΩ Ω 0.2 6 dB dB Metallic to Longitudinal Balance Note 2 6 7 8 9 10 11 2-248 Units Ω Ω Ω Note 1 5 Max 600 900 Ext. Zin Note 2 Typ‡ Transhybrid Loss (Zin = Net = 600Ω) Note 2 & 3 Transhybrid Loss (Zin = Net = 900Ω) Note 2 & 3 Transhybrid Loss (Zin =600Ω, Net = AT&T) Note 2 & 3 Input Impedance At RX Output Impedance at TX Transmit Gain, (2-Wire/TX): Default Gain(0dB) Programmable Range THL THL THL -0.2 -12 30 10 0 Test Conditions Test Circuit Fig. 6 200-500 Hz 500-1000 Hz 1000-3400 Hz 200-500 Hz 500-1000 Hz 1000-3400 Hz Test Circuit Fig. 8 200 Hz 1000 Hz 2000 Hz 3000 Hz 4000 Hz Test Circuit Fig. 7 200-1000 Hz 1000 -4000 Hz 200-3400 Hz 500-2500 Hz 200-3400 Hz 500 -2500 Hz 200-3400 Hz 500-2500 Hz Test Circuit Fig. 5 Input 0.5V 1000Hz 1000Hz MH88632B Preliminary Information AC Electrical Characteristics† (continued) Characteristics 12 Sym 14 0.1 0.1 0.1 0.1 dB dB dB dB Default Gain (0dB) -0.2 0 0.2 dB Programmable Range Frequency response gain (relative to gain at 1kHz) -12 6 dB 0.1 0.1 0.1 0.1 dB dB dB dB Receive Gain, (RX/2-Wire): -1.3 -0.3 -0.3 -0.7 Total Harmonic Distortion 4 4 Idle Channel Noise Common Mode Rejection Ratio CMRR 19 Power Supply Rejection Ratio at 2-Wire and TX PSRR VCC VEE 21 0.2 0.4 1 1 % % 10 11 13 13 Test Conditions Test Circuit Fig. 5 Input 0.5V 200 Hz 300 Hz 3000 Hz 3400 Hz Test Circuit Fig. 4 Input 0.5V 1000Hz 1000Hz Test Circuit Fig. 4 Input 0.5V 200 Hz 300 Hz 3000 Hz 3400 Hz THD < 5% Ref. 600Ω Ref. 600Ω Input 0.5V, 1kHz Nc 18 On-Hook Transmit Gain (2-Wire/TX) Default Gain 0dB Programmable Range On-Hook frequency Response Gain (relative to off-hook gain) dBm dBm THD at 2-Wire at TX 20 0 0 0 0 Signal Output Overload Level at 2-Wire at TX 17 Units 0 0 0 0 at 2-wire at TX 16 Max -1.3 -0.3 -0.3 -0.7 Note 2 15 Typ‡ Frequency response gain (relative to gain at 1kHz) Note 2 13 Min 48 65 dBrn C dBrn C dB 20 20 42 28 dB dB -1 0 1 dB 1000Hz 0 6 1 dB dB 1000Hz Input 0.5V, 1kHz -12 -1 540Hz Test Circuit Fig. 8 Ripple 0.1V, 1kHz ✝Electrical Characteristics are over recommended operating conditions unless otherwise stated ‡Typical figure are at 25°C with nominal 5V supplies and are for design aid only *All test conditions use a test source impedance which matches the device’s input impedance dBm is referenced to 600Ω unless otherwise stated Notes: Impedance set by external network equal to 10 times the required input impedance Test conditions use a transmit and receive gain set to 0dB default "Net" indicates network balance impedance 2-249 MH88632B Preliminary Information +5V -5V VCC VEE -V 10H 650Ω Z1 100µF Z600 RING + I = 15mA GRX0 XLA GRX1 GTX0 XLC GTX1 Vs = 0.5V ~ XLB 600Ω XLD TX + TIP RX NS 100µF AGND 10H 650Ω Gain = 20 x Log (Vtx/Vs) Figure 4 - 2-4 Wire Gain Test Circuit +5V -5V VCC VEE -V 10H 650Ω Z1 100µF Z600 RING I = 15mA + GRX0 XLA GRX1 XLB Z = 600Ω GTX0 XLC GTX1 XLD TX + TIP RX Vs = 0.5V ~ NS AGND 10H 650Ω Gain = 20 x Log (Vz/Vs) Figure 5 - 4-2 Wire Test Circuit 2-250 100uF MH88632B Preliminary Information -V +5V -5V VCC VEE 10H 650Ω Z1 100µF Z600 RING 600Ω + I = 15mA 368Ω GRX0 XLA GRX1 XLB ~ V1 GTX0 XLC GTX1 368Ω XLD Vs = 0.5V TX + TIP RX NS 100µF AGND 10H 650Ω Return Loss = 20 x Log (V1\Vs) Figure 6 - Return Loss Test Circuit +5V -5V VCC VEE -V 10H 650Ω Z1 100µF Z600 RING I = 15mA + 368Ω GRX0 XLA GRX1 ~ XLB GTX0 510Ω XLC GTX1 V1 Vs = 0.5V 368Ω XLD TX + TIP RX NS AGND 100µF 10H 650Ω Met to Long. Balance = 20 x Log (V1/Vs) Figure 7 - Metallic to Longitudinal Balance Test Circuit 2-251 MH88632B Preliminary Information +5V -5V VCC VEE -V 10H 650Ω Z1 100µF Z600 RING + I = 15mA 368Ω GRX0 XLA GRX1 V1 XLB Vs = 0.5V GTX0 XLC 368Ω GTX1 XLD ~ TX + TIP RX NS 100µF AGND 10H 650Ω Long. to Met. Balance = 20 * Log (V1/Vs) CMRR = 20 * Log (Vtx/Vs) Figure 8 - Longitudinal to Metallic Balance and CMRR Test Circuit 4.23 Max (107.5 Max) 1 0.125 Max (3.18 Max) 0.125 Max (3.18 Max) 0.64 +0.02 (16.25 +5.1) 1 Notes: 1) Not to scale 0.180 +0.020 (4.57 +0.51) 2) Dimensions in inches. (Dimensions in millimetres) 3) Pin tolerances are non-accumulative. 4) Recommended soldering conditions: Wave Soldering Max temp at pins 260˚ for 10 secs. * Dimensions to centre of pin. 0.010 +0.002 (0.25 +0.05) * 0.250 +0.020 (6.35 +0.51) * 0.100 +0.010 (2.54 +0.25) Figure 9 - MH88632B Mechanical Information 2-252 0.020 +0.005 (0.5 +0.13) MH88632B Preliminary Information 4.23 Max (107.5 Max) 0.62 Max (15.75 Max) 1 0.080 +0.020 (2.03 +0.51) 0.170 Max (4.32 Max) 0.080 Max (2.03 Max) Notes: 0.260 +0.015 (6.60 +0.38) 1) No t to scale 2) Dimensions in inches. (Dimensions in millimetres) 3) Pin tolerances are non-accumulative. 4) Recommended soldering conditions: Wave Soldering Max temp at pins 260˚ for 10 secs. * Dimensions to centre of pin. * 0.250 +0.020 (6.35 +0.51) * 0.100 +0.010 (2.54 +0.25) 0.020 +0.005 (0.51 +0.13) Figure 10 - MH88632BT Mechanical Information 2-253 MH88632B Notes: 2-254 Preliminary Information http://www.mitelsemi.com World Headquarters - Canada Tel: +1 (613) 592 2122 Fax: +1 (613) 592 6909 North America Tel: +1 (770) 486 0194 Fax: +1 (770) 631 8213 Asia/Pacific Tel: +65 333 6193 Fax: +65 333 6192 Europe, Middle East, and Africa (EMEA) Tel: +44 (0) 1793 518528 Fax: +44 (0) 1793 518581 Information relating to products and services furnished herein by Mitel Corporation or its subsidiaries (collectively “Mitel”) is believed to be reliable. However, Mitel assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use. Neither the supply of such information or purchase of product or service conveys any license, either express or implied, under patents or other intellectual property rights owned by Mitel or licensed from third parties by Mitel, whatsoever. Purchasers of products are also hereby notified that the use of product in certain ways or in combination with Mitel, or non-Mitel furnished goods or services may infringe patents or other intellectual property rights owned by Mitel. This publication is issued to provide information only and (unless agreed by Mitel in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other information appearing in this publication are subject to change by Mitel without notice. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user’s responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to Mitel’s conditions of sale which are available on request. M Mitel (design) and ST-BUS are registered trademarks of MITEL Corporation Mitel Semiconductor is an ISO 9001 Registered Company Copyright 1999 MITEL Corporation All Rights Reserved Printed in CANADA TECHNICAL DOCUMENTATION - NOT FOR RESALE