HR2000 Fluorescent Lamp HB Driver with PFC The Future of Analog IC Technology DESCRIPTION FEATURES The HR2000 is a fluorescent lamp ballast controller with PFC function and high voltage half-bridge driver. Only 16pin is used to offer cost effective solutions with minimized external components. PFC PART • Only four pins realize PFC function. • Ton control. • Boundary Conduction Mode operation. • Less peripheral components. • Over voltage and over current protection. The HR2000 can properly drive the two MOSFETs of half-bridge to control fluorescent lamp, ensuring all the features at the same time. The operating frequency is programmable and the sweeping frequency is controlled to limit the preheat current. The preheat time and ignition time can be smartly set up for types of lamps and applications. Sufficient protection functions are provided for different fault modes such as over voltage, over current, over temperature, capacitive mode, end of life (EOL). Preheat driving signal is offered in preheat state to meet low power loss application which usually needs a MOSFET to cut off filament transformer. The PFC part only uses 4 pins to realize PFC function with On-time (Ton) control at boundary conduction mode (BCM). It is suitable for wide input range. Over voltage protection and over current protection are integrated for the PFC part. HALF-BRIDGE PART • 600V bootstrap half-bridge driver. • Programmable preheat current. • Programmable preheat time. • Programmable ignition time. • Single ignition attempt. • Over voltage protection. • Over current protection. • End-Of-Life protection • Capacitive mode protection. • Minimized external components. • Over temperature protection APPLICATIONS • • Tube fluorescent lamp ballast Compact fluorescent lamp ballast All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. The HR2000 is available in the 16-pin SOIC16 package. HR2000 Rev. 1.0 2/20/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 1 HR2000 — FLUORESCENT LAMP HB DRIVER WITH PFC TYPICAL APPLICATION D105 D103 D101 D106 T101 * R108 * C101 Mains Q101 C102 R104 D102 D104 R105 R111 R106 D107 R103 R109 R101 R102 R110 R107 C103 D201 C210 R206 C208 VO ZCD OVC CT FC CP/EOL REF Pre/FT C104 C201 C202 C203 R201 HR2000 16 1 15 2 3 14 4 13 5 12 6 11 7 10 8 9 Z201 GATE GND VCC LG CS SW UG BST C206 Q201 C209 L201 Lamp Q202 C204 R204 C207 C205 R203 R208 C211 C213 R207 R205 R202 D202 D203 C212 R209 Figure 1 HR2000 Rev. 1.0 2/20/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 2 HR2000 — FLUORESCENT LAMP HB DRIVER WITH PFC ORDERING INFORMATION Part Number* Package Top Marking HR2000GS SOIC16 HR2000 * For Tape & Reel, add suffix –Z (e.g. HR2000GS–Z). PACKAGE REFERENCE HR2000 SOIC16 PACKAGE (TOP VIEW) HR2000 Rev. 1.0 2/20/2013 VO 1 16 GATE ZCD 2 15 GND OVC 3 14 VCC CT 4 13 LG FC 5 12 CS CP/EOL 6 11 SW REF 7 10 UG Pre/FT 8 9 BST www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 3 HR2000 — FLUORESCENT LAMP HB DRIVER WITH PFC LIMITING VALUE (1) A B C D E F G H I I J K L Condition Operation High side floating supply voltage Voltage at SW Voltage at pin CS Current in pin CS Voltage at pin UG Voltage at pin LG Low voltage supply Low voltage supply Clamp current in pin VCC Voltage at pin ZCD Voltage at pin OVC Current in pin VO Current in pin CT Note7 t<1.0µs, note4 Note7 Note7 t<0.5s over lifetime In fault state Vvcc=0 to Vvccmax Vvcc=0 to Vvccmax Vvcc=0 to Vvccmax Note9 With respect to ground M Current in pin CP/EOL N Slew rate at pins SW,HG and BST O Junction temperature P Ambient temperature Q Storage temperature HBM electrostatic handling voltage SW,HG,BST,VCC and LG R VO, OVC, CT, FC, CP/EOL, REF, Pre/FT, CS, ZCD, GATE S T U MM electrostatic handling voltage Pins Pre/FT Pins VO, OVC, CT, FC, CP/EOL, REF, CS, ZCD, GATE, SW,HG,BST,VCC and LG Charge coupling at pins REF and CT Reference resistor (4) θJA IEOL -1 1 mA SR -4 4 V/ns Tj Tamb Tstg -40 -55 150 125 150 °C °C °C 2000 V V 150 V Note6 Vesd(MM) Min. -3 -0.5 -10 Vsw-VBE -VBE 0 0 200 (3) θJC SOIC16 ...................................80....... 35 ...°C/W HR2000 Rev. 1.0 2/20/2013 Unit V V V mA V V V V mA V V µA µA Vesd(HBM) Supply Voltage VCC ........................ 10V to 12V Analog inputs and outputs ............ -0.3V to 6.5V Operating Junction Temp (TJ) . -40°C to + 125°C Thermal Resistance -7 0 0 0 Max. 630 630 VBE 10 VBST Vvcc 15 14 5 7 5 200 200 Note5 Operating Recommended Operating Conditions Symbol Vbst Vsw Vcs Ics VUG VLG Vvcc Vvcc Ivcc Vzcd VOVC Ivo ICT Qcoupl RREF -8 36 8 91 V pC kΩ Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by D(MAX)=(TJ(MAX)TA)/ θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB 5) In accordance with the Human Mody Model (HBM), i.e. equivalent to discharging a 100pF capacitor through a 1.5kΩ series resistor 6) In accordance with the Mancine Model (MM), i.e. equivalent to discharging a 200pF capacitor through a 10Ω series resistor and a 0.75µH inductor. 7) At Tamb=25°C the typical VBE IS 0.7V. 8) At negative CS currents (typ<-5mA) the capacitive mode protection can be triggered. 9) When EOL detection is enabled www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 4 HR2000 — FLUORESCENT LAMP HB DRIVER WITH PFC ELECTRICAL CHARACTERICS Ta=25OC; Vvcc=13.0V; CCT=100pF; RREF=51kohm; referenced to ground; unless otherwise specified. No High voltage supply Leakage current high voltage 1.0 pins Start-up state 2.0 Start of oscillation 2.1 Stop of oscillation 2.2 Non-oscillating current 2.3 Clamp voltage VCC 2.4 Reset voltage Preheat State 3.0 Starting frequency 3.1 Preheat time 3.2 Charge current at CP/EOL pin Discharge current at CP/EOL 3,3 pin Peak voltage difference at 3.4 CP/EOL pin 3.5 CP comparator level low 3.6 Control voltage at CS pin Maximum voltage at Pre/FT 3.7 pin Ignition state 4.0 Ignition time Saturation current detection 4.1 level 4.2 over current feedback gain 4.3 Pre/FT pin reset level Burn State 5.0 Bottom frequency 5.1 Non-overlap time 5.2 Symmetry half-bridge 5.3 Symmetry non-overlap time 5.4 Total supply current 5.5 Charge current at FC pin 5.6 Discharge current at FC pin 5.7 FC transconductance Capacitive mode control 5.8 voltage 5.9 Reference voltage 5.10 On voltage at pin UG 5.11 Off voltage at pin UG 5.12 On voltage at pin LG HR2000 Rev. 1.0 2/20/2013 Condition SW,HG,BST=630V, Vvcc=0 CCP/EOL=100n, Symbol CFC=100nF; MIN. TYP. ILeak all voltage MAX. UNIT 15 µA VCC(start) VCC(low) Ivcc(nonosc) 11.2 7.7 230 12 8.2 285 12.8 8.7 340 V V µA VCC(clamp) 14.5 16 17 V VCC(reset) 4.5 5.5 6.5 V VFC=0, note1 CCP=100nF Vcpeol=1.0V, note10 Fstart Tph ICP(charge) 96 540 102 620 6.0 108 700 kHz ms µA Vcpeol=3.5V, note10 ICP(disch) 6.0 µA ∆CcPEOL(pk) 2.25 V Vvcc=11V;note2 At 5mA nonoscillating Note8 When timing Note3 VCP(min) Vcs(pre) 1.15 375 Vpre CCP=100n At ICS(ig)=0.1mA Note4 After preheat, Pre/FT will be dropped to this level. Then detecting the voltage at Pre/FT is active. Tig 1.25 410 445 VCC 500 Vcs(clamp) 600 V mV V 700 0.75 ms V koc 0.9 1 1.1 A/A Vfault(reset2) 150 200 250 mV 42 0.85 0.9 43.5 1.20 1.0 1.0 1.7 50 100 10 45 1.55 1.1 kHz µs Note1,7 Note 9 Notes 1,5 VFC=1.5V VFC=1.5V VFC=1.5V fB TNO SYM fB SYM TNO Itot IFC(ch) IFC(disch) ∆ICT/∆VFC 2.5 57 116 mA µA µA µA/V Note6 Vcs(cap) -32 -14 0 mV Vref VUG(on) VUG(off) VLG(on) 2.425 2.500 12.96 16 12.96 2.575 |IUG|=1mA |IUG|=1mA |ILG|=1mA V V mV V Note1 43 84 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 5 HR2000 — FLUORESCENT LAMP HB DRIVER WITH PFC ELECTRICAL CHARACTERICS (continued) Ta=25OC; Vvcc=13.0V; CCT=100pF; RREF=51kohm; referenced to ground; unless otherwise specified. No 5.13 5.14 5.15 5.16 5.17 Off voltage at pin LG Up side driver on resistance Up side driver off resistance Low side driver on resistance Low side driver off resistance Voltage drop at bootstrap 5.18 switch On resistance of the 5.19 discharge switch at CP/EOL pin On resistance connected 5.20 Pre/FT pin and VCC pin Fault and End of Life 6.0 Fault reference level 6.1 Fault reset level 6.2 Fault charge current source 6.3 Fault discharge current On resistance discharge 6.4 switch 6.5 High level EOL comparator 6.6 Low level EOL comparator Power Factor Control Output voltage reference 7.0 current 7.1 OVC reference level 7.2 Delay OVC comparator 7.3 VO offset voltage 7.4 VO dynamic range 7.5 Maximum on time 7.6 ZCD reference 7.7 Duration off pulse 7.8 OVC low voltage 7.9 VO low reference 7.10 Off-voltage PFC 7.11 Active VO clamp voltage 7.12 Passive VO clamp voltage 7.13 Gate pull down resistance Condition |ILG|=1mA Symbol VLG(off) RUG(on) RUG(off) RLG(on) RLG(off) 10mA source current MIN. CFC=100nF; TYP. 16 33 16 33 16 all MAX. voltage UNIT mV Ω Ω Ω Ω Vdrop 1.7 V Rcp(disch) 14 kΩ Rpre 16 kΩ Note8 VPreFT=0.75V VPreFT=0.75V Vfault(ref) Vfault(reset1) Ifault(ch) Ifault(disch) 1.22 0.9 3.2 0.62 V V µA µA VPreFT=0.5V Rfault(disch) 16 kΩ Veol(high) Veol(low) 2.9 1.9 3.0 2.0 3.1 2.1 V V Ivo(ref) 97 102 107 µA Vovc(ref) Tovc Vvo(low) ∆Vvo Ton(max) Vzcdref Toff Vovc(low) Ivo(low) Vvo(off) Vvo(clamp) 1.22 1.27 100 0.72 3.1 1.32 V ns V V µs V µs mV µA V V Vvo=3.0V Vvo=Vvo(low) Ivo=200µA Ivo=200µA, Vvcc=0V NOTES 1) Excluding situations where the over current protection is active. 2) The non oscillation current is specified in a temperature range of 0 to 100 0C. For Tj < 0 0C and Tj > 100 0C the maximum start-up current is 350 mA. 3) Data sampling of VCS(ph) is performed at the end of conduction of T2. 4) Gain is defined as ICT/ICS with VCS>VCS(clamp). 5) Total supply current is specified in a Tj temperature range of 20 0C to 125 0C at fB, excluding gate drive charge. 6) Data sampling of VCS(cap) is performed at the start of HR2000 Rev. 1.0 2/20/2013 CCP/EOL=100n, 20 80 2 1.4 94 90 3.8 6.2 100 Vvo(pas) 3.5 V Rgate_pull_down 14 Ω 7) 8) conduction of T2. The symmetry SYM fB is calculated from the quotient SYM fB = T1tot/T2tot, with T1tot the time between turn-off of G2 and the turn-off of G1, and T2tot the time between turn-off of G1 and the turn-off of G2. 9) Not measured, guaranteed by design. 10) The symmetry SYM TNO is defined as the ratio between deadtime1 and deadtime2. Deadtime1 is the time between turning off G1 and turning on G2. Deadtime2 is the time between turning off G2 and turning on G1. 11) Preheat & ignition states. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 6 HR2000 — FLUORESCENT LAMP HB DRIVER WITH PFC TYPICAL CHARACTERISTICS 12.15 8.30 400 12.10 8.28 350 8.26 300 8.24 250 8.22 200 11.85 8.20 150 11.80 8.18 100 11.75 8.16 50 11.70 -50 -30 -10 10 30 50 70 90 110130 8.14 -50 -30 -10 10 30 50 70 90 110130 12.05 12.00 11.95 11.90 0 -50 -30 -10 10 30 50 70 90 110130 120 6.25 412.5 100 6.20 412.0 6.15 411.5 6.10 411.0 60 6.05 410.5 40 6.00 410.0 5.95 409.5 5.90 409.0 5.85 -50 -30 -10 10 30 50 70 90 110130 408.5 -50 -30 -10 10 30 50 70 90 110130 80 20 0 -50 -30 -10 10 30 50 70 90 110130 1 5.85 44 0.9 5.80 43.8 0.8 5.75 5.70 0.7 43.6 0.6 43.4 0.5 5.65 0.4 5.60 0.3 43.2 43 0.2 5.55 5.50 -50-30-10 10 30 50 70 90 110130 HR2000 Rev. 1.0 2/20/2013 42.8 0.1 0 -50 0 50 100 150 42.6 -50 0 50 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 100 150 7 HR2000 — FLUORESCENT LAMP HB DRIVER WITH PFC TYPICAL CHARACTERISTICS (continued) Non-overlapTime vs. Temperature 1.200 1.190 1.180 1.170 1.160 1.150 1.140 1.130 1.120 1.110 1.100 1.090 -50 -30 -10 10 30 50 70 90 110 130 FC Transconductance vs.Temperature -5.000 2.500 14.000 12.000 2.495 10.000 2.490 8.000 6.000 2.485 4.000 2.480 2.000 0.000 -50 -30 -10 10 30 50 70 90 110 130 CS Capacitive Mode Detection Threshold vs.Temperature 0.000 V REF vs. Temperature 2.475 -50 -30 -10 10 30 50 70 90 110130 Voltage Drop at Bootstrap Fault Reference Level Switch vs. Temperature vs.Temperature 3.000 1.222 2.500 1.221 1.220 2.000 -10.000 1.219 1.500 1.218 -15.000 1.000 1.217 -20.000 0.500 -25.000 -50 -30 -10 10 30 50 70 90 110130 0.000 -50 -30 -10 10 30 50 70 90 110 130 OutputVoltage Reference Current vs. Temperature 102.400 102.200 1.216 OVC ReferenceVoltage vs.Temperature Gate Maximum onTime vs.Temperature 1.232 27.4 1.231 27.35 1.230 102.000 1.215 -50 -30 -10 10 30 50 70 90 110 130 1.229 27.3 27.25 27.2 101.800 1.228 1.227 101.600 101.400 101.200 -50 -30 -10 10 30 50 70 90 110130 HR2000 Rev. 1.0 2/20/2013 27.15 27.1 1.226 27.05 1.225 27 26.95 -50 1.224 -50 -30 -10 10 30 50 70 90 110130 0 50 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 100 150 8 HR2000 — FLUORESCENT LAMP HB DRIVER WITH PFC TYPICAL CHARACTERISTICS (continued) Duration Off Time vs.Temperature 1.800 1.600 V OUT Low Reference Current vs. Temperature 92.000 91.500 1.400 1.200 91.000 1.000 90.500 0.800 90.000 0.600 0.400 89.500 0.200 89.000 0.000 -50 -30 -10 10 30 50 70 90 110130 88.500 -50 -30 -10 10 30 50 70 90 110130 HR2000 Rev. 1.0 2/20/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 9 HR2000 — FLUORESCENT LAMP HB DRIVER WITH PFC TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board of the Application Example. VIN = 220VAC, 18W FL load, CCT=100pF, RREF=51kohm, CCP/EOL=100n, CFC=33nF, TA = 25°C, unless otherwise noted. V G ATE 10V/di v. V IN 100V/di v. V PFC_OU T 100V/di v. IIN 200mA/di v. V G ATE 10V/di v. V G ATE 10V/di v. V VO 2V/di v. V OVC 500mV/di v. V PFC_OU T 100V/di v. IL 200mA/di v. V SENSE 1V/di v. IL 200mA/di v. V LG 10V/di v. V CC 10V/di v. V PFC_OU T 100V/di v. ILAM P 500mA/di v. V LG 10V/di v. V BUS 200V/di v. V CC 10V/di v. ILAM P 500mA/di v. HR2000 Rev. 1.0 2/20/2013 V LAM P 100V/di v. V FC 2V/di v. V PRE/FT 10V/di v. IPREHE AT 1A/di v. V LAM P 100V/di v. V CS 500mV/di v. V LG 10V/di v. ILAM P 1A/di v. V LG 10V/di v. V LG 10V/di v. V LAM P 400V/di v. V CS 500mV/di v. V PRE/FT 5V/di v. V PRE/FT 5V/di v. V CP/EO L 2V/di v. V LAM P 200V/di v. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 10 HR2000 — FLUORESCENT LAMP HB DRIVER WITH PFC TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board of the Application Example. VIN = 220VAC, 18W FL load, CCT=100pF, RREF=51kohm, CCP/EOL=100n, CFC=33nF, TA = 25°C, unless otherwise noted. Open Lamp Protection V LG 10V/di v. Short Lamp and Recover V LG 10V/di v. V LAM P 500V/di v. V CS 500mV/di v. V FT 10V/di v. V LAM P 200V/di v. V CS 1V/di v. ISHO RT 1A/di v. HR2000 Rev. 1.0 2/20/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 11 HR2000 — FLUORESCENT LAMP HB DRIVER WITH PFC PIN FUNCTIONS Pin # Name 1 VO PFC output control pin. Connect a resistor from this pin to the PFC output to set the PFC output voltage. Connect a capacitor (or a R-C-C network) from this pin to GND for the compensation of the PFC regulation loop. 2 3 4 ZCD OVC CT 5 FC 6 CP/EOL PFC inductor zero current detection pin. PFC over voltage/current protection pin. Frequency setting capacitor pin. Connect a capacitor from this pin to GND to set the frequency. Frequency control pin. It is voltage controlled oscillator (VCO) pin for controlling half bridge frequency. Preheat/ignition timing pin and EOL detector. A capacitor from this pin to GND sets the preheat time and ignition time. Before half-bridge works, it is discharged internally to GND. In the preheat state and ignition state, a triangle waveform is generated on this pin and used as a timer. The voltage of the blocking capacitor is sensed to this pin to indicate the EOL condition. After preheat and ignition state, the voltage at this pin is internally discharged to the middle of the EOL window comparator’s reference, and then the lamp’s EOL information is under monitoring. If EOL condition is confirmed, an internal current source charges the Pre/FT pin’s capacitor. 7 REF Internal reference current setting resistor pin. Connect a resistor from this pin to GND to set the frequency. 8 Pre/FT 9 BST 10 11 12 13 UG SW CS LG In the preheat state, this pin outputs a high level voltage to drive the external preheating MOSFET. After this period, it is discharged to Vfault (reset2). Then it is used as a fault timer to stop IC at fault condition. At fault condition, an internal current source charges up this pin, and when its voltage hits the fault reference threshold, IC latches up. Connect a capacitor on this pin to set the fault timer. Bootstrap voltage supply for half bridge level shifter. Connect a capacitor (usually 10nF to 100nF) between this pin and SW pin. Half bridge up side MOSFET driver. Half bridge floating middle point. Half bridge current sensor. Half bridge low side MOSFET driver. 14 15 16 VCC GND GATE HR2000 Rev. 1.0 2/20/2013 Description Supply voltage of the IC. Ground PFC GATE driver pin. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 12 HR2000 — FLUORESCENT LAMP HB DRIVER WITH PFC Figure 2— Block Diagram HR2000 Rev. 1.0 2/20/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 13 HR2000 — FLUORESCENT LAMP HB DRIVER WITH PFC FUNCTIONAL DESCRIPTION HR2000 includes Half-bridge part and PFC part. Half-bridge part In the typical application, the half-bridge can be defined to two basic states: Oscillating state and None-oscillating state. In EOL protection and Capacitive Mode protection, a current source Ifault(ch) will charge the capacitor at this pin such as C213 in Fig1. In PFC VO-low state a current source Ifault(disch) will discharge C213. Before Vvcc>Vvcc(reset), this pin will be detected. If VPreFT>Vfault(reset), IC will not start up. Non oscillating state: VCC under voltage state In non-oscillating state, IC stops to work. There are 4 sub-states: Start up state; Fault state; There is a hysteresis for Vcc detection. When power on, HR2000 begin’s to work after Vvcc>Vvcc(start). If Vvcc<Vvcc(low) & low side drive is high in oscillation state, the device will get into VCC under voltage state. VCC under voltage state; OTP state Over temperature protection (OTP) state The temperature is monitor by IC internal circuit. If detected temperature is higher than Thigh, then IC will get into non-oscillation state. When temperature is lower than Tlow, the oscillation is enabled again. Start-up state When Vcc<Vcc(reset), HR2000 will get into Startup state. Initially, the IC can be supplied from the outside resistor such as R207 in Figure1. Oscillating State All internal circuit is reset in this state. After start-up state, once the VCC pin gets to the level VCC(start), IC begins to work. In this state, CP/EOL, Pre/FT, FC pin are discharged by the internal switches. In oscillating state, there are 3 sub-states: Fault state There are two conditions resulting in Fault state. The first one is before Vvcc>Vvcc(reset), if VPreFT>Vfault(reset), then IC will not start up. The second one is after Pre/FT pin’s detection function is active in all oscillating sub-states, HR2000 will get into Fault state if Pre/FT pin voltage VPreFT>Vfault(ref) & low side drive is high. The following items will affect Pre/FT pin in oscillation state. The voltage detected by the sample circuit such as C211, C212, C213, D202, R204, R205 in Fig1. Preheat state; Ignition state; Burn state; Half-bridge oscillator The oscillating frequency is programmed by the capacitor on CT pin. The capacitor on CT pin is charged by internal current source which is related to REF pin resistor and FC pin voltage which is voltage controlled current source for CT pin. The waveform of CT pin is saw-tooth and its frequency is twice of the half-bridge operating frequency. There is a dead time between UG and LG for ensuring their non-overlap operating. The dead time is defined by REF resistor. FC pin controls the operating frequency directly. Higher Vfc results in a lower frequency. HR2000 Rev. 1.0 2/20/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 14 HR2000 — FLUORESCENT LAMP HB DRIVER WITH PFC Preheat State When Vvcc>Vvcc(start) & VPreFT<Vfault(reset), HR2000 gets into Preheat state from the start up state. During this state, Pre/FT pin’s detection function will be disabled. High voltage will be sent out in this state. window Veol(middle). Then the EOL detection function is active instead of the timing function. Voltage on FC pin will continue to increase until it reaches a clamping level. CS pin over current protection mentioned in ignition state is still used to limit CS voltage (power stage current). During this state, CP/EOL pin will disable EOL detection function and only take the timing function. Protection In oscillation state, the half-bridge protection includes: In this state, only CS pin has a current limit function. If Vcs>Vcs(pre) in a switching period, the FC pin will be discharged by an internal current source IFC(disch) cycle-by-cycle. This controls the working frequency. EOL protection Capacitive mode protection Current limit VCC low protection Ignition State Over temperature protection Ignition state follows preheat state closely. In this state, EOL protection and CS(pre) limit are disabled. FC voltage increases which results in frequency decreasing. Then the voltage on lamp gets higher and higher to ignite the lamp. EOL protection ‘End of Life’(EOL) protection is enabled after CP/EOL is dropped to Veol(middle). There is a window comparator for this protection. If the voltage on CP/EOL pin get out of Veol(low)~Veol(high), then the current source Ifault(ch) will charge the capacitor at Pre/FT pin. If VPreFT>Vfault(ref), then HR2000 will get into fault state. CP/EOL pin also only takes timing function in this state. Once preheat state is over, Pre/FT pin is dropped to Vfault(reset2), and then the detection function is active. If Pre/FT pin VPreFT>Vfault(ref) & low side drive is high, then HR2000 will consider it is fault state. After preheat state, CS pin over current protection is active and limits CS voltage (power stage current). When Vcs>Vcs(clamp) @ low side drive=high, the impedance of CS pin will become very small and a current flows into this pin. The koc of this current will charge the CT pin to increase frequency. The low side MOSFET will be turned off quickly while high side MOSFET will not be affected. This results in a narrow turn on time of low side MOSFET and a relatively larger turn on time of high side MOSFET. This asymmetric operation of half bridge limits the output power. Burn state After ignition state, Burn state is entered. At the beginning of burn state, CP/EOL pin will be dropped to the middle level of the EOL detection HR2000 Rev. 1.0 2/20/2013 This protection is disabled in PFC Vo-low state. Capacitive mode protection The capacitive mode protection is active during all oscillating states. It is detected by the voltage on CS at the moment of turning on of low side MOSFET. If at this moment, Vcs>Vcs(cap), then capacitive mode is confirmed and FC pin is discharged at this switching cycle. VFC will decrease towards zero which means the maximum frequency if the capacitive mode always exists. If capacitive mode @ fmax is detected, then Ifault(ch) is actived to charge the capacitor at Pre/FT pin. Current limit The current limit is realized on CS pin. There are three kinds of limitation on CS pin. Vcs(pre) in preheat state; Vcs(clamp) of over current protection function in oscillating states; www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 15 HR2000 — FLUORESCENT LAMP HB DRIVER WITH PFC Capacitive protection in oscillating states. They have been described in the related states above. VCC low protection It is mentioned in VCC under voltage state. Over temperature protection (OTP) It is described in OTP state. PFC part In the typical application, PFC can be defined to 3 states: Normal state; VO-low state; OVC state; The Ton is set by the voltage at Vo pin. Higher Vvo, shorter Ton. The circuit in Fig1 shows the example. ZCD pin detects the inductor current zero-crossing point. When The Vzcd<Vzcdref, Gate will be high and the external MOSFET will be turned on. In the range of Vvo(low)~Vvo(off), Ton varies linearly from Ton(max) to zero. When Vvo> Vvo(off), Ton is zero, and GATE pin is low. The minimum turn off time is set internally to 1.4µs. Vo-low state In case of main voltage too low, PFC may not maintain its intended output voltage. In order to keep on working, the current sunk into Vo pin is monitored. If it is lower than Ivo(low) the IC will get into Vo-low state. Normal state In Vo-low state: PFC works at boundary conduction mode (BCM) with Ton control. Fig3 shows the internal block. There is a current Ifault(disch) to discharge Pre/FT pin. This can increase the protection level. EOL protection is disabled. Vovc<Vovc(low) will overrule Vo-low condition. OVC state OVC pin monitors PFC output voltage and Boost PFC MOSFET current. Fig1 shows the example. If Vovc>Vovcref or Vovc<Vovclow, then PFC will stop immediately. Vovclow is set to prevent the absence of PFC output detection. Figure 3— PFC part block HR2000 Rev. 1.0 2/20/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 16 HR2000 — FLUORESCENT LAMP HB DRIVER WITH PFC APPLICATION INFORMATION PFC Part Setting the PFC Output Voltage The Vo pin is used to set the PFC output voltage. Connect a resistor (R105, R106, R107 in figure 1) between the PFC output and Vo pin, its value is set by: RPFC _ OUT = VO _ PFC − 2V IVO(REF) Where Ivo(ref)=102µA is the reference sink current through Vo pin. Connect a capacitor in range of 0.47µF to 10µF (C103 in figure 1) or a R-C-C network from Vo pin to GND to compensate the PFC regulation loop. Setting the Over Voltage and Over Current Protection The OVC pin is used for the over voltage and over current protection for the PFC stage. Connect this pin to the voltage divider (R108, R109, R110 and R102 in figure 1) of the PFC output to set the over voltage protection point. ROV _ H ROV _ L = Vo _ PFC _ pro VOVC(ref ) Where VOVC(ref)=1.26V is the OVC protection threshold voltage, and Vo_PFC_pro is protection point of the PFC output voltage. ROV_H is the upper side resistor of the divider and ROV_L is the low side resistor of the voltage divider. The over current protection senses the peak current through the PFC MOSFET. the sensing resistor (R101 in figure 1) is set by: Roc = VOVC(ref ) + Vf _ diode Half Bridge Part Setting the Oscillator of Half Bridge The capacitor on CT pin (C201 in figure 1) and the resistor on REF pin (R201 in figure 1) determine the bottom operating frequency. The resistor on REF pin also determines the nonoverlap time of the half bridge. Estimate the frequency set resistor on REF pin with the desired non-overlap time: Tno = 0.15 + 1.127 × Setting the ZCD Detection An auxiliary winding of the PFC inductor is used to sense the voltage across the inductor to indicate the zero inductor current condition. Set the turn ratio of the auxiliary winding large RREF (µs) 51kΩ Note that the RREF resistor should not exceed the range in the limiting values. Choose a proper capacitor on CT pin to set the bottom operating frequency. fB = 2(RREF 0.5 + Rint ) * (CT + Cpar ) + 300ns Where CT is the capacitor on CT pin, Rint=0.3kΩ is the internal parasitic resistance on REF pin and Cpar=5pF is the internal parasitic capacitance on CT pin. Choose a proper capacitor on CT pin and then redesign the resistor on REF pin to make sure the bottom operating frequency is accurate. The start up frequency is: Ioc Where Vf_diode≈0.7V is the forward voltage of the diode (D107 in figure 1), and Ioc is the over current protection point. HR2000 Rev. 1.0 2/20/2013 enough to make sure the reflected voltage across the auxiliary winding is higher than the ZCD reference voltage Vzcdref. Usually, setting the reflected ZCD voltage at around 5V at maximum input voltage is recommended. A zener diode is integrated on ZCD pin. Add a resistor in 10kΩ to 100kΩ range between the auxiliary winding and the ZCD pin to limit the current sunk into ZCD pin, according to the input voltage range. fST = 0.5 2.5V × (CT + Cpar ) + 300ns 2.5V + 35µA 2(RREF + Rint ) Setting the Preheat time and Ignition Time The capacitor on CP/EOL pin (C203) and the resistor on REF pin determine the preheat time and ignition time. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 17 HR2000 — FLUORESCENT LAMP HB DRIVER WITH PFC Tpreheat = 600 × CCP R × REF (ms) 100nF 51kΩ Where ηis the efficiency of the PFC stage, usually in range of 0.95 to 0.98. Tignition = 562 × CCP R × REF (ms) 100nF 51kΩ The maximum turn on time of the PFC MOSFET occurs at the minimum AC input voltage: Setting the Preheat Current Limitation In the preheat stage, the CS pin limits the preheat current through the filament of the FL. The preheat current is limited by setting the sense resistor on CS pin (R202 in figure 1) through: Ipreheat _ pk = RCS Design the PFC Inductor The HR2000 operates the PFC in boundary conduction mode (BCM) with on-time (Ton) control. The frequency of the PFC stage is variable. The design of the PFC inductor relates to the output power, the range of the input AC voltage and the desired minimum operating frequency. It is also limited by the maximum turn on time of HR2000. The maximum peak current through this inductor is: HR2000 Rev. 1.0 2/20/2013 L × IL _ pk _ max = 2Vin _ min_ RMS L × 2Po _ max η × Vin _ min_ RMS 2 Then the inductor is restricted by the maximum on time limit of IC: L≤ η × Vin _ min_ RMS 2 × Ton _ limit VCS(pre) Where the VCS(pre)=410mV is the threshold voltage of CS pin to limit the preheat current. If using the filament transformer for preheating, this CS pin function will limit the resonant current in the preheat stage. The over current limitation function on CS pin limits the ignition voltage or ignition current in the ignition state and any exceeded output current/power condition. Add a diode (D203 in figure 1) like 1N4148 in parallel with the sense resistor and a 1k resistor (R203 in figure 1) between the CS pin and the current sense resistor to limit the negative voltage on CS pin. IL _ pk _ max = Ton _ max = 2Po _ max Where Ton_limit is the IC’s limit for maximum on time, design its value with 20µs. The minimum operating frequency occurs at the minimum AC input voltage or the maximum AC input voltage. fmin = min( 2Vin _ min_ RMS × (Vo − 2Vin _ min_ RMS ) L × Vo × IL _ pk _ max , 2Vin _ max_ RMS × (Vo − 2Vin _ max_ RMS ) L × Vo × IL _ pk _ max ) For most of the specifications, such as the universal input (85VAC to 265VAC) and 400V PFC output, the minimum frequency occurs at the maximum AC input voltage. Design the inductor value with the desired minimum operating frequency, and it should be in the restricted range by the IC’s limit of the maximum on time. Application Example This application example introduces the design of a 16W FL based on HR2000. It requires the PF (power factor) over 0.9. The boost PFC stage and resonant half bridge power structure is used for this FL driver. The integrated PFC control and half bridge driver of HR2000 fits for this type of application well. 2 2Po _ max η × Vin _ min_ RMS www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 18 HR2000 — FLUORESCENT LAMP HB DRIVER WITH PFC Specification: Parameter Input Supply Voltage AC Line Frequency Lamp Voltage Lamp Current Output Lamp Power Preheat Current Preheat time Ignition time Open circuit voltage Burning mode frequency Efficiency (Full Load) Line regulation Startup time Conducted EMI Power Factor Harmonics Ambient Temperature Symbol Vin fLINE Vlamp Ilamp Plamp Ipre tPre tign Voc Voc frun η Condition 2 Wire Min 198 47 Typ Max 264 63 50 55 0.29 16 0.18 Units VAC Hz Vrms A W A ms ms Vrms Vrms kHz % % s 0.3 Rref=51k, CCP=100nF Rref=51k, CCP=100nF t<te t>te 674 611 270 300 44.6 80 tST TAMB 1 Meets EN55015B 90 Meets IEC61000-3-2 Class C 40 Free convection, sea level % ℃ Schematic: D 11N 4007 R1 1M /1% VD D 1206 Vbus D 2 M U R 160 R 3 100k/0805 R 2 100k/0805 P1 R 4 47k/0805 AN T2 AN T1 C AT1 C AT2 L1 4.7m H D3 1N 4007 R5 499k D4 1N 4007 C1 R6 1M /1% 1206 D 51N 4148 1206 H eader4 R7 43k/1206 N p:N aux=264:44 R8 499k 1206 R 13 47k P2 F1 1 2 3 D6 C2 NS R9 1M /1% 1 2 3 4 BZT52C 12 D7 1N 4148 R 10 43k/1206 R 11 43k/1206 R 12 43k/1206 1206 L2 6.8m H C x1 100nF/275V R15 1M /1% R 14 499k C x2 1206 100nF/275V U1 C6 L5 2.2m H 100nF/400V R 16 499k 1 2 3 4 G ZC D 1206 C 11 3.3nF C 10 100pF LB1742792040 C 12 33nF D8 1N 4007 R 19 D9 1N 4007 M3 AP 03N70I 30 G ATE 600V/3A R 21 33k D 101N 4148 R 26 5.1 1206 R 27 5.1 1206 C 17 R 25 100 R 32 5.6k L3B C4 5 6 7 15 8 C 16 100nF R 22 51k/1% VO ZC D OV C CT G ATE VC C UG SW BST FC C P/EO L RE F GND Pre/FT R 231M /1% LG CS G ATE 16 14 10 11 9 1 330pF/1kV 1206 C5 12 D 111N 4148 C8 68nF/400V 220pF M1 AP03N 70I 2 L4 M2 AP03N 70I R 18 20 C9 8 2.2m C 1410nF/400V 1 4 2 3 fig=63kH z 220pF fb=44.6kH z R 24 5.1k C 18 22pF L3A C19 C 20 C 21 R 28 2.49k D 13 68nF/400V C 15 R 20 1k 100nF C 22 1nF 4.7nF/1000V C7 R 17 20 C 13 100nF 13 L3C C3 1206 G ZC D Header3 R 29 3.3 R 30 3.3 1206 1206 1N 4148 R31 3.3 1206 N 1:N 2:N 3=250:10:10 D 14 1N 5819 Vpre<150V Vig=300V Vbus R 34 100 R 35 1M /1% fpre=76kH z 220nF/400V 1 R 37 NS D 12M UR 160 M4 AP 4002 R 33 1M /1% 1206 TO -92 R 36 12.4k/1% Figure 4—HR2000 FL Driver for 16W Lamp Design Procedure: Please refer to the application note of HR2000 for the design procedure. HR2000 Rev. 1.0 2/20/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 19 HR2000 — FLUORESCENT LAMP HB DRIVER WITH PFC SOIC16 0.386( 9.80) 0.394(10.00) 0.024(0.61) 0.050(1.27) 9 16 0.063 (1.60) PIN 1 ID 0.150 0.228 (3.80) (5.80) 0.213 0.157 0.244 (5.40) (4.00) (6.20) 8 1 TOP VIEW RECOMMENDED LAND PATTERN 0.053(1.35) 0.069(1.75) 0.0075(0.19) SEATING PLANE 0.0098(0.25) 0.013(0.33) 0.050(1.27) 0.004(0.10) 0.020(0.51) BSC 0.010(0.25) SEE DETAIL "A" SIDE VIEW FRONT VIEW NOTE: 0.010(0.25) 0.020(0.50) o x 45 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. GAUGE PLANE 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, 0.010(0.25) BSC PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) o o 0 -8 0.016(0.41) 0.050(1.27) SHALL BE 0.004" INCHES MAX. 5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AC. 6) DRAWING IS NOT TO SCALE. DETAIL "A" NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. HR2000 Rev. 1.0 2/20/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 20