NJW4813 Dual Half Bridge Driver with Boost Converter GENERAL DESCRIPTION The NJW4813 is a dual half bridge driver with boost converter IC. Output voltage boost from Li-ion battery and a 5V power supply and can drive a piezo device by two half bridge drivers. The NJW4813 is able to stable startup by soft start function in boost SW.REG.. The dual half bridge driver improves control characteristics from a microcomputer in response to independent signal input in each channel. The input frequency operates to 300kHz and in the case of failure, it can output a fault flag. FEATURES Boost Converter Block Half Bridge Driver Block Under Voltage Lockout Built-in Thermal Shutdown Standby Function Package Outline Ver.2012-10-19 Output Switch Voltage Switching Current PWM Control Operating Voltage Range Oscillation Frequency Range Soft Start Function Over Current Protection Internal 2-Channnel Half Bridge Each Channel Operates Individually Output Switch Peak Current Operating Voltage Range Switching Frequency Output Shut Down Control Over Current Protection Fault Indicator Output ■ PACKAGE OUTLINE NJW4813SE3 40V max. 1A min. 2.7 to 5.5V 380k to 810kHz 17ms typ. +280 / -250mA typ. 8.0 to 35V 300kHz max. NJW4813SE3 : PCSP20-E3 -1- NJW4813 PIN CONFIGURATION 15 14 13 12 11 16 10 17 9 PAD (*1) 18 8 19 7 20 6 1 2 3 PIN FUNCTION 1. VDD_SW 2. STBYb 3. SHDNb 4. IN1 5. IN2 6. FLT 7. RT 8. GND 9. PGND 10.OUT2 4 11. VDD_HB 12. OUT1 13. PGND 14. PGND 15. SW 16. SW 17. NC 18. RADJ 19. FB 20. IN- 5 < Top View> (*1) The PAD is not connected to an IC chip electrically. NJW4813SE3 BLOCK DIAGRAM Under Voltage Lock Out STBYb VDD_SW Standby ON/OFF RT FB Error AMP Oscillator SW PWM IN- Buffer Vref 1V Soft Start Thrmal Shut Dow n RADJ Over Current Protection VDD_HB FLT Under Voltage Lock Out High Side Gate Driver High Side Gate Driver OUT1 Over Current Protection OUT2 IN1 Control Logic IN2 Control Logic Low Side Gate Driver Low Side Gate Driver SHDNb GND -2- PGND Ver.2012-10-19 NJW4813 ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL Boost Converter Block Supply Voltage SW pin Voltage RADJ pin Voltage IN- pin Voltage STBYb pin Voltage Half Bridge Driver Block Supply Voltage SHDNb pin Voltage Input Voltage (Ta=25°C) UNIT MAXIMUM RATINGS VDD_SW VSW VRADJ VINVSTBYb +6 +40 +6 (*2) -0.3 to +6 (*2) -0.3 to +6 (*2) V V V V V VDD_HB VSHDNb VIN1 VIN2 +40 -0.3 to +6 (*2) V V -0.3 to +6 (*2) V FLT pin Voltage VFLT Power Dissipation PD -0.3 to +6 The back pad is mounted. 560 (*3) 980 (*4) The back pad is not mounted. 550 (*3) 850 (*4) -40 to +150 -40 to +85 -40 to +150 V mW °C °C °C (*2): When Supply voltage is less than +6V, the absolute maximum voltage is equal to the Supply voltage. (*3): Mounted on glass epoxy board. (76.2×114.3×1.6mm:based on EIA/JDEC standard, 2Layers) (*4): Mounted on glass epoxy board. (76.2×114.3×1.6mm:based on EIA/JDEC standard, 4Layers), internal Cu area: 74.2×74.2mm Junction Temperature Range Operating Temperature Range Storage Temperature Range Tj Topr Tstg This product may be damaged with electric static discharge (ESD). Please handle with care to avoid these damages. RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL MIN. Boost Converter Block Supply Voltage STBYb pin Voltage Timing Resistor Oscillating Frequency Half Bridge Driver Block Supply Voltage Output Switch DC Current SHDNb pin Voltage Input Voltage FLT pin Voltage Ver.2012-10-19 TYP. MAX. UNIT VDD_SW VSTBYb RT fOSC 2.7 0 95 380 – – 100 700 5.5 VDD_SW 146 810 V V kΩ kHz VDD_HB IOM VSHDNb VIN1, VIN2 VFLT 8 0 0 0 0 – – – – – 35 20 V mA V V V VDD_SW VDD_SW 5.5 -3- NJW4813 ELECTRICAL CHARACTERISTICS Boost Converter Block (Unless otherwise noted, VDD_SW=VSTBYb=3.7V, RT=100kΩ, Ta=25°C) PARAMETER Under Voltage Lockout Block UVLO Release Voltage UVLO Operate Voltage UVLO Hysteresis Voltage Soft Start Block Soft Start Time Oscillator Block Oscillation Frequency Oscillation Frequency deviation (Supply voltage) Oscillation Frequency deviation (Temperature) SYMBOL TEST CONDITION VRUVLO_SW VDUVLO_SW ∆VUVLO_SW VRUVLO_SW - VDUVLO_SW TSS VB=0.95V fOSC MIN. TYP. MAX. UNIT 2.1 2.0 – 2.4 2.2 0.2 2.7 2.5 – V V V 8 17 28 ms 630 700 770 kHz fDV VDD_SW=3.0 to 5.5V – 1 – % fDT Ta= -40 to +85°C – 3 – % -1.0% 1.00 +1.0% V -0.1 – – – 80 1 +0.1 – – µA dB MHz 8 16 24 µA 0.9 1.4 4 mA 4.8 5.2 5.6 V Error Amplifier Block Short IN- and FB, Measuring IN- Pin VB=1.0V Reference Voltage VB Input Bias Current Open Loop Gain Gain Bandwidth IB AV GB Output Source Current IOM+ VFB=1V, VIN-=0.9V Output Sink Current IOM- VFB=1V, VIN-=1.1V VSTBYb=0V, VDD_SW=5.5V, ICLIN-=10µA IN- pin Clamp Voltage RADJ pin FET ON Resistance RADJ pin FET Leak Current VCLINRON_RADJ IRADJ=0.1mA – 200 280 Ω ILEAK_RADJ VSTBYb=0V, VRADJ=3.3V – – 1 µA PWM Comparate Block Maximum Duty Cycle MAXDUTY VIN-=0.9V 82 87 92 % Output Block Output ON Resistance Switching Current Limit Switching Leak Current RON_SW ILMT_SW ILEAK_SW ISW=100mA – 1 – 0.6 2 – 1.2 – 1 Ω A µA -4- VSTBYb=0V, VSW=40V Ver.2012-10-19 NJW4813 ELECTRICAL CHARACTERISTICS Half Bridge Driver Block (Unless otherwise noted, VDD_SW=3.7V, VDD_HB=25V, VSTBYb=VSHDNb=3.7V, RT=100kΩ, Ta=25°C) PARAMETER Under Voltage Lockout Block UVLO Release Voltage UVLO Operate Voltage UVLO Hysteresis Voltage Enable Control Block High Side SW ON Resistance Low Side SW ON Resistance Output Current Limit Circuit Over Current Detection Current Over Current Release Current Output Short Current Output Rise Time Output Fall Time Rise Dead Time Fall Dead Time Rise Delay Time Fall Delay Time Rise – Fall Delay Time Difference Input Frequency High Side SW OFF Leak Current Low Side SW OFF Leak Current OUT pin – VDD pin Potential Difference GND pin – OUT pin Potential Difference Shutdown Circuit Block SHDNb pin High Voltage (Operating Mode) SHDNb pin Low Voltage (Shutdown Mode) SHDNb pin Pull Down Resistance Input Circuit Block IN1, IN2 pin High Voltage IN1, IN2 pin Low Voltage IN1, IN2 pin Input Current Ver.2012-10-19 SYMBOL TEST CONDITION VRUVLO_HB VDUVLO_HB ∆VUVLO_HB VRUVLO_HB - VDUVLO_HB RDSH RDSL IDCTH IDCTL IRCVH IRCVL ISHTH ISHTL tr tf Dtr Dtf td_ON td_OFF IOSOURCE=20mA IOSINK=20mA High-Side Low-Side High-Side Low-Side VOUT1=VOUT2=0V VOUT1=VOUT2=VDD_HB VIN=0 to 3.3V VIN=0 to 3.3V VIN=0 to 3.3V VIN=0 to 3.3V VIN=0 to 3.3V VIN=0 to 3.3V td_ON ± td_OFF VIN=0 to 3.3V fIN IOLEAKOUTH IOLEAKOUTL VSHDNb=0V, VDD_HB=25V VOUT1=VOUT2=0V VSHDNb=0V, VDD_HB=25V VOUT1=VOUT2=25V MIN. TYP. MAX. UNIT 5.6 5.0 – 6.2 5.6 0.6 6.8 6.2 – V V V – – 230 200 2.5 5 10 10 – – – – – – 6.0 7.0 280 250 5 10 25 25 400 400 150 150 250 250 8.0 9.0 330 300 10 20 50 50 – – – – – – Ω Ω mA mA mA mA mA mA ns ns ns ns ns ns – 20 – ns – – 300 kHz – – 1 µA – – 1 µA VPDOV VSHDNb=0V, IORH=20mA – 0.7 1.0 V VPDGO VSHDNb=0V, IORL=20mA – 0.7 1.0 V VIHSHDNb 1.6 – VDD_SW V VILSHDNb 0 – 0.6 V 210 300 390 kΩ 1.6 0 – – – – VDD_SW 0.6 1 V V µA RPDSHDNb VSHDNb=3.3V VIHIN1, VIHIN2 VILIN1, VILIN2 IIIN1, IIIN2 VIN=3.3V -5- NJW4813 ELECTRICAL CHARACTERISTICS General Characteristics (Unless otherwise noted, VDD_SW=3.7V, VDD_HB=25V, VSTBYb=VSHDNb=3.7V, RT=100kΩ, Ta=25°C) PARAMETER STBYb pin High Voltage (Operating Mode) STBYb pin Low Voltage (Standby Mode) STBYb pin Pull Down Resistance FLT pin Low Level Output Voltage FLT pin OFF Leak Current Quiescent Current (Switching Regulator Block) Quiescent Current (Half Bridge Driver Block) Quiescent Current (Standby) -6- SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT VIHSTBYb 1.6 – VDD_SW V VILSTBYb 0 – 0.6 V RPDSTBYb VSTBYb=3.3V 210 300 390 kΩ VLFLT IFLT=500µA – 0.25 0.5 V IOLEAKFLT VFLT=5.5V – – 1 µA RT=100kΩ, No Load – 1.9 2.8 mA – 0.7 1.0 mA – 0.9 1.8 µA IQSW IQHB IQSTBY fIN1= fIN2=10kHz antiphase 50% Duty Cycle VDD_HB=0V, VSTBYb=VSHDNb=0V Ver.2012-10-19 NJW4813 TYPICAL CHARACTERISTICS (Boost Converter Block) Timing Resistor vs. Oscillation Frequency (VDD_SW=3.7V, Ta=25°C) Oscillation Frequency vs. Temperature (VDD_SW=3.7V, RT=100kΩ) 900 Oscillation Frequency fosc (kHz) 900 Oscillation Frequency fOSC (kHz) 850 800 750 700 650 600 550 500 450 850 800 750 700 650 600 550 500 450 400 400 90 100 110 120 130 140 Timing Resistor RT (kΩ) -50 150 Reference Voltage vs. Temperature (VDD_SW=3.7V) Output ON Resistance vs. Temperature (VDD_SW=3.7V, ISW=100mA) 1.2 Output ON Resistance RON_SW (Ω) 1.04 1.03 Reference Voltage VB (V) -25 0 25 50 75 100 125 150 Ambient Temperature Ta (°C) 1.02 1.01 1 0.99 0.98 0.97 0.96 1 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 150 Ambient Temperature Ta (°C) -50 -25 0 25 50 75 100 125 150 Ambient Temperature Ta (°C) Switching Current Limit vs. Temperature (VDD_SW=3.7V) Switching Current Limit I LMT_SW (A) 3 2.5 2 1.5 1 0.5 0 -50 Ver.2012-10-19 -25 0 25 50 75 100 125 150 Ambient Temperature Ta (°C) -7- NJW4813 TYPICAL CHARACTERISTICS (Half Bridge Driver Block) Output Current Limit Characteristics (High Side, VDD_HB=35V, Ta=25°C) Output Current Limit Characteristics (Low Side, VDD_HB=35V, Ta=25°C) 350 350 Over Current Detection Current: IDCTH 250 200 Over Current Release Current: IRCVH 150 100 Over Current Detection Current: IDCTL 300 Output Current IO (mA) Output Current IO (mA) 300 Output Short Current: ISHTH 50 250 200 Over Current Release Current: IRCVL 150 Output Short Current: ISHTL 100 50 0 0 0 10 20 30 VDD_HB pin - OUT pin Voltage (V) 40 0 Output Current Limit vs. Temperature (High Side, VDD_HB=35V) 350 Over Current Detection Current: IDCTH 250 200 150 Over Current Release Current: IRCVH 100 Output Short Current: ISHTH 50 0 Over Current Detection Current: IDCTL 300 Output Current IO (mA) 300 Output Current IO (mA) 40 Output Current Limit vs. Temperature (Low Side, VDD_HB=35V) 350 250 200 150 Over Current Release Current: IRCVL 100 Output Short Current: ISHTL 50 0 -50 -8- 10 20 30 OUT pin - GND pin Voltage (V) -25 0 25 50 75 100 125 150 Ambient Temperature Ta (°C) -50 -25 0 25 50 75 100 125 150 Ambient Temperature Ta (°C) Ver.2012-10-19 NJW4813 TYPICAL CHARACTERISTICS (Half Bridge Driver Block) Low Side SW ON Resistance vs. Temperature (VDD_HB=25V, IOSINK=20mA) 10 10 9 9 Low Side SW ON Resistance RDSL (Ω) High Side SW ON Resistance RDSH (Ω) High Side SW ON Resistance vs. Temperature (VDD_HB=25V, IOSOURCE=20mA) 8 7 6 5 4 3 2 8 7 6 5 4 3 2 1 1 0 0 -50 -25 0 25 50 75 100 125 150 Ambient Temperature Ta (°C) -50 Output Fall Time vs. Temperature (VDD_HB=25V, VIN=0 to 3.3V) 700 600 600 500 Output Fall Time tf (ns) Output Rise Time tr (ns) Output Rise Time vs. Temperature (VDD_HB=25V, VIN=0 to 3.3V) 500 400 300 200 -25 0 25 50 75 100 125 150 Ambient Temperature Ta (°C) 400 300 200 100 100 0 0 -50 Ver.2012-10-19 -25 0 25 50 75 100 125 150 Ambient Temperature Ta (°C) -50 -25 0 25 50 75 100 125 150 Ambient Temperature Ta (°C) -9- NJW4813 TYPICAL CHARACTERISTICS (General Characteristics) Quiescent Current vs. Supply Voltage (RT=100kΩ, No Load, Ta=25°C) Quiescent Current vs. Temperature (VDD_SW=3.7V, RT=100kΩ, No Load) 3 3 Switching Regulator Block Quiescent Current IQSW (mA) Quiescent Current IQSW (mA) Switching Regulator Block 2.5 2 1.5 1 0.5 0 2.5 2 1.5 1 0.5 0 2 3 4 5 Supply Voltage VDD_SW (V) 6 -50 Quiescent Current vs. Supply Voltage (VDD_SW=3.7V, fIN1=fIN2=10kHz, Ta=25°C) Quiescent Current vs. Temperature (VDD_SW=3.7V, VDD_HB=25V, fIN1=fIN2=10kHz) 1 1 Half Bridge Driver Block 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 0 10 20 30 Supply Voltage VDD_SW (V) 40 -50 Quiecent Current vs. Input Frequency (VDD_SW=3.7V, VDD_HB=25V, Ta=25°C) -25 0 25 50 75 100 125 150 Ambient Temperature Ta (°C) Standby Current vs. Temperature (VDD_SW=3.7V, VDD_HB=0V, VSTBYb=VSHDNb=0V) 10 1.4 Half Bridge Driver Block 9 Standby Current IQSTBY (µA) 1.2 Quiecent Current IQHB (mA) Half Bridge Driver Block 0.9 Quiescent Current IQHB (mA) Quiescent Current IQSW (mA) 0.9 1 0.8 0.6 0.4 0.2 8 7 6 5 4 3 2 1 0 0 0 - 10 - -25 0 25 50 75 100 125 150 Ambient Temperature Ta (°C) 50 100 150 200 250 Input Frequency fIN (kHz) 300 -50 -25 0 25 50 75 100 125 150 Ambient Temperature Ta (°C) Ver.2012-10-19 NJW4813 Switching Regulator Block Pin Operation Table INPUT STBYb VDD_SW FLT L H H – Hi-Z L Hi-Z < VDUVLO_SW ≥ VRUVLO_SW OUTPUT Feed back Switch OFF OFF ON Power MOS FET OFF OFF ON OUTPUT Feed back Power Tj ISW FLT Switch MOS FET – L OFF OFF >165°C L OFF OFF – ≥ ILMTSW (*4) After the TSD function operates, it returns by Tj < 125°C. (*5) Power MOSFET is controlled by a pulse-by-pulse after an OCP function. Mode Stand-by UVLO Active INPUT Mode TSD (*4) OCP (*5) Switching Regulator Block Pin Operation Table INPUT IN1 L L H H OUTPUT OUT1 OUT2 L L L H H L H H IN2 L H L H INPUT OUTPUT IN1, IN2 STBYb SHDNb VDD_HB FLT OUT1 OUT2 L or H L or H L or H L or H L or H L or H L L H H H H L H L L H H – – Hi-Z Hi-Z L Hi-Z L Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z L or H Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z L or H Tj >165°C – INPUT IOUT1 – ≥ IDCTH1, IDCTL1 < VDUVLO_HB ≥ VRUVLO_HB < VDUVLO_HB ≥ VRUVLO_HB IOUT2 – FLT L – Hi-Z OUTPUT OUT1 Hi-Z ISHTH1, ISHTL1 Ver.2012-10-19 – Mode OUT2 Hi-Z TSD (*4) L or H CC (*6) ISHTH2, ≥ IDCTH2, Hi-Z L or H ISHTL2 IDCTL2 (*6) After CC(Constant Current) function, an output is controlled by constant current. – Mode Half Bridge SW.REG. Driver Stand-by Stand-by Active UVLO Active Shutdown Active UVLO Active CC (*6) - 11 - NJW4813 Timing Chart tr IN1 IN2 OUT1 OUT2 tf 90 % 10 % 90 % 90 % 10 % 10 % td_OFF td_ON Fig. 1. Output Rise/Fall Time, Rise/Fall Delay Time IDSL IDSH IDCTL IDCTH ISHTL ISHTH IRCVL IRCVH VDD_HB VDD_HB VOUT1, VOUT2 (a) Low Side Power MOSFET VOUT1, VOUT2 (b) High Side Power MOSFET Fig. 2. Output Current Limit Circuit Power Dissipation vs. Ambient Temperature PCSP20-E3 Package Power Dissipation vs. Ambient Temperature PCSP20-E3 Package Power Dissipation vs. Ambient Temperature o o At on 4 layer PC Board 800 600 At on 2 layer PC Board 400 200 Power Dissipation P D (mW) At on 4 layer PC Board 800 0 600 At on 2 layer PC Board 400 200 0 0 - 12 - (The back pad is not mounted., Tj= ~150 C) 1000 (The back pad is mounted., Tj= ~150 C) D Power Dissipation P (mW) 1000 25 50 75 100 o Ambient Temperature Ta ( C) 0 25 50 75 100 o Ambient Temperature Ta ( C) Ver.2012-10-19 NJW4813 APPLICATION EXAMPLE V IN=3.7V CIN 10µF COUT 10µF RT RT 100kΩ C1 10nF R2 240kΩ SW R1 10kΩ PGND IN- NJW4813 Stand-by STBYb Shutdow n SHDNb FB RADJ RNF 2kΩ CNF 10nF Internal SW RON_RADJ = 200Ω typ. IN1 VDD_HB IN1 IN2 IN2 OUT1 FAULT FLT OUT2 Pull-Up RPULL 100kΩ Ver.2012-10-19 V OUT =24.53V CP_SW 0.1µF VDD_SW (Half-Bridge Driver) SBD L 6.8µH GND PGND CP_HB 0.1µF ⎞ ⎛ R2 240kΩ ⎞ ⎟ × VB = ⎛⎜1 + VOUT = ⎜1 + ⎟ ×1V = 24.53 [V] ⎟ ⎜ R1 + R ⎝ 10kΩ + 200Ω ⎠ ON _ RADJ ⎠ ⎝ - 13 - NJW4813 MEMO [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. - 14 - Ver.2012-10-19