LM1282 110 MHz RGB Video Amplifier System with On Screen Display (OSD) General Description The LM1282 is a full feature video amplifier with OSD inputs, all within a 28-pin package. This part is intended for use in monitors with resolutions up to 1280 x 1024. The video section of the LM1282 features three matched video amplifiers with blanking. All of the video amplifier adjustments feature high input impedance 0V to 4V DC controls, providing easy interfacing to bus controlled alignment systems. The OSD section features three TTL inputs and a DC contrast control. The switching between the OSD and video section is controlled by a single TTL input. Although the OSD signals are TTL inputs, these signals are internally processed to match the OSD logic low level to the video black level. When adjusting the drive controls for color balance of the video signal, the color balance of the OSD display will track these color adjustments. The LM1282 also features an internal spot killer circuit to protect the CRT when the monitor is turned off. For applications without OSD insertion please refer to the LM1205 or LM1208 data sheets. n n n n n n n n n TTL OSD inputs, 50 MHz bandwidth On chip blanking, outputs under 0.1 V when blanked High speed Video/OSD switch Independent drive control for each channel for color balance 0V to 4V, high impedance DC contrast control with over 40 dB range 0V to 4V, high impedance DC drive control (0 dB to −12 dB range) 0V to 4V, high impedance DC OSD contrast control with over 40 dB range Capable of 7 VPP output swing (slight reduction in bandwidth) Output stage directly drives most hybrid or discrete CRT drivers Applications n High resolution RGB CRT monitors requiring OSD capability Features n Three wideband video amplifiers 110 MHz @ −3 dB (4 VPP output) Block and Connection Diagram DS012519-1 FIGURE 1. Order Number LM1282N See NS Package Number N28B © 1998 National Semiconductor Corporation DS012519 www.national.com LM1282 110MHz RGB Video Amplifier System with On Screen Display (OSD) June 1998 Absolute Maximum Ratings (Note 1) Thermal Resistance to Case (θJC) Junction Temperature (TJ) ESD Susceptibility (Note 4) ESD Machine Model (Note 17) Storage Temperature Lead Temperature (Soldering, 10 sec.) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage Pins 6, 9, and 22 Peak Video Output Source Current (Any One Amp) Pins 18, 20, and 23 Voltage at Any Input Pin (VIN) Power Dissipation (PD) (Above 25˚C Derate based on θJA and TJ) Thermal Resistance to Ambient (θJA) 15V 28 mA VCC ≥ VIN ≥ GND 28˚C/W 150˚C 2 kV 200V −65˚C to 150˚C 265˚C Operating Ratings (Note 2) Temperature Range Supply Voltage (VCC) −20˚C to 70˚C 11.4V ≤ VCC ≤ 12.6V 2.5W 45˚C/W DC Electrical Characteristics See DC Test Circuit (Figure 2), TA = 25˚C; VCC1 = VCC2 = 12V; V13 = 4V; V14 = 4V; V16 = 4V; Vdrive = 4V; V4 = 0V; V15 = 0V; V25 = 1V unless otherwise stated Symbol Parameter Conditions Typical Limit (Note 5) (Note 6) Units 120 mA (max) V (max) IS Supply Current VCC1 + VCC2, RL = ∞ (Note 7) 95 RIN Video Input Resistance Any One Amplifier 100 V15l Clamp Gate Low Input Voltage Clamp Comparators On 1.2 0.8 V15h Clamp Gate High Input Voltage 2.0 Clamp Gate Low Input Current Clamp Comparators Off V15 = 0V 1.6 I15l −2.5 I15h Clamp Gate High Input Current V15 = 12V 0.01 1.0 µA (max) V16l Blank Gate Low Input Voltage Blank Gate On 1.2 0.8 V (max) V16h Blank Gate High Input Voltage 1.6 2.0 I16l Blank Gate Low Input Current I16h Blank Gate High Input Current Blank Gate Off V16 = 0V V16 = 12V V12 Reference Voltage Ivid-clamp Video Input Cap Charge Current Clamp Comparators On Video Input Cap Bias Discharge Ivid-bias kΩ −1.5 0.01 V (min) µA (max) V (min) µA (max) 1.0 µA (max) ± 450 µA (min) Clamp Comparators Off ± 900 ± 450 ± 450 2.0 V nA Current Iout-clamp Output Clamp Cap Charge Current Clamp Comparators On ± 850 Iout-bias Output Clamp Cap Bias Discharge Clamp Comparators Off 450 V25 = 0V V25 = 10V V25 = 1V 50 100 8.0 7.5 µA (min) nA Current VOL Video Output Low Voltage VOH Video Output High Voltage VO(1V) Video Black Level Output Voltage ∆VO(1V) Video ∆Black Level Output Voltage Between Any Two Amplifiers, V25 = 1V VOL (blanked) Video Output Blanked Voltage I13,14, 26, 27, or 28 Contrast/Drive Control Input Current I25 Cut-Off Control Input Current Blank Gate On (V16 ≤ 0.8V) Vcontrast = Vdrive = 0V to 4V V25 = 0V to 4V Vspot Spot Killer Voltage VCC Adjusted to Activate www.national.com 2 1.1 ± 20 mV (max) V (min) V (Note 8) ± 250 mV (max) 100 500 mV (max) −125 −500 nA (max) −0.25 −1.5 µA (max) 10.6 11.2 V AC Electrical Characteristics (Note 15) See AC Test Circuit (Figure 3) , TA = 25˚C, VCC1 = VCC2 = 12V; V4 = 0V. Manually adjust Video Output pins 18, 20, and 23 to 4V DC for the AC test unless otherwise stated Symbol AV max Parameter Video Amplifier Gain ∆AV 2V Contrast Attenuation @ 2V ∆AV 0.25V Contrast Attenuation @ 0.25V ∆Drive2V Drive Attenuation @ 2V ∆Drive0.25V Drive Attenuation @ 0.25V AV match Absolute Gain Match @ AV max Conditions Limit (Note 6) Units V13 = 4V, VIN = 400 mVPP Vdrive = 4V Ref: AV max, V13 = 2V 10.0 7.0 V/V (min) 20.0 16.9 dB (min) −6 dB Ref: AV max, V13 = 0.25V Ref: AV max, Vdrive = 2V −24 dB −4.5 dB Ref: AV max, Vdrive = 0.25V V13 = 4V, Vdrive = 4V (Note 9) V13 = 4V to 2V (Notes 9, 10) VO = 1 VPP, f = 10 kHz V13 = 4V, Vdrive = 3V, AV track Gain Change between Amplifiers THD Video Amplifier Distortion f(−3 dB) Video Amplifier Bandwidth tr (Video) Video Output Rise Time (Note 11) tf (Video) Video Output Fall Time (Note 11) Vsep 10 kHz Video Amplifier 10 kHz Isolation Vsep 10 MHz Video Amplifier 10 MHz Isolation tr (Blank) Blank Output Rise Time (Note 11) tf (Blank) Blank Output Fall Time (Note 11) tr-prop (Blank) End of Blanking Propagation Delay tf-prop (Blank) Start of Blanking Propagation Delay Blank Output = 1 VPP Blank Output = 1 VPP Blank Output = 1 VPP Tpw (Clamp) Back Porch Clamp Pulse Width (Note 14) (Notes 11, 12) Typical (Note 5) VO = 4 VPP VO = 4 VPP VO = 4 VPP V13 = 4V (Note 13) V13 = 4V (Notes 11, 13) Blank Output = 1 VPP −11 dB ± 0.3 ± 0.2 dB dB 1 % 110 MHz 3.0 ns 4.0 ns −70 dB −50 dB 8 ns 14 ns 23 ns 20 ns 200 ns (min) OSD Electrical Characteristics See DC Test Circuit (Figure 2), TA = 25˚C; VCC1 = VCC2 = 12V; V13 = 4V; V14 = 4V; V16 = 4V; VDrive = 4V; V4 = 4V; V15 = 0V; V25 = 1V unless otherwise stated Symbol Parameter Conditions Typical Limit (Note 5) (Note 6) Units VOSDI OSD Input Low Input Voltage 1.2 0.4 VOSDh OSD Input High Input Voltage 1.6 2.0 V (max) V (min) V4l OSD Select Low Input Voltage Video Inputs are Selected 1.2 0.8 V (max) V4h OSD Select High Input Voltage 2.0 V (min) OSD Select Low Input Current OSD Inputs are Selected V4 = 0V 1.6 I4l −3.0 −6.0 µA (max) I4h OSD Select High Input Current ∆VO-OSD(1V) OSD ∆Black Level Output Voltage, V4 = 12V V25 = 1V 0.01 1.0 µA (min) ± 45 ± 175 mV (max) V14 = 4V, VDrive = 2V V14 = 2V, VDrive = 2V V14 = 4V, VDrive = 2V V14 = 4V to 2V, VDrive = 2V V1 = V2 = V3 = 4V (Note 16) 5.0 30 % (min) Difference from Video Output VOSD-out OSD Output Voltage VPP ∆VOSD-out OSD Output VPP Attenuation ∆VOSD-out match Output Match between Channels VOSD-out track Output Variation between Channels tr (OSD S) Video to OSD Switch Time (Note 11) tf (OSD S) OSD to Video Switch Time (Note 11) tr-prop (OSD S) Video to OSD Propagation Delay tf-prop (OSD S) OSD to Video Propagation Delay tr (OSD) OSD Rise Time at VO (Note 11) tf (OSD) OSD Fall Time at VO (Note 11) tr-prop (OSD) Starting OSD Propagation Delay tf-prop (OSD) Ending OSD Propagation Delay V1 = V2 = V3 = 4V (Note 16) V1 = V2 = V3 = V13 = V14 = 4V V1 = V2 = V3 = V13 = V14 = 4V V14 = 4V; V25 = 1V V14 = 4V; V25 = 1V V14 = 4V; V25 = 1V V14 = 4V; V25 = 1V 3 50 VPP ± 2.0 ± 3.5 % 4 ns % 11 ns 11 ns 12 ns 4 ns 10 ns 6.5 ns 9 ns www.national.com OSD Electrical Characteristics (Continued) See DC Test Circuit (Figure 2), TA = 25˚C; VCC1 = VCC2 = 12V; V13 = 4V; V14 = 4V; V16 = 4V; VDrive = 4V; V4 = 4V; V15 = 0V; V25 = 1V unless otherwise stated Symbol Parameter Vfeed 10 kHz Video Feedthrough into OSD Vfeed 10 MHz Video Feedthrough into OSD Conditions V14 = 4V; V25 = 1V; V1 = V2 = V3 = 0V V14 = 4V; V25 = 1V; Typical Limit (Note 5) (Note 6) Units −70 dB −60 dB V1 = V2 = V3 = 0V Note 1: Absolute Maximum Rating indicate limits beyond which damage to the device may occur. Note 2: Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditons. Note 3: VCC supply pins 6, 9, and 22 must be externally wired together to prevent internal damage during VCC power on/off cycles. Note 4: Human body model, 100 pF discharged through a 1.5 kΩ resistor. Note 5: Typical specifications are specified at +25˚C and represent the most likely parametric norm. Note 6: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level). Note 7: The supply current specified is the quiescent current for VCC1 and VCC2 with RL = ∞, see Figure 5 ’s test circuit. The supply current for VCC2 (pin 22) also depends on the output load. With video output at 1V DC, the additional current through VCC2 is 8 mA for Figure 5 ’s test circuit. Note 8: Output voltage is dependent on load resistor. Test circuit uses RL = 390Ω. Note 9: Measure gain difference between any two amplifiers. VIN = 400 mVPP. Note 10: ∆AV track is a measure of the ability of any two amplifiers to track each other and quantifies the matching of the three attenuators. It is the difference in gain change between any two amplifiers with the contrast voltage (V13) at either 4V or 2V measured relative to an AV max condition, V13 = 4V. For example, at AV max the three amplifiers’ gains might be 17.1 dB, 16.9 dB, and 16.8 dB and change to 11.2 dB, 10.9 dB and 10.7 dB respectively for V13 = 2V. This yields the measured typical ± 0.1 dB channel tracking. Note 11: When measuring video amplifier bandwidth or pulse rise and fall times, a double sided full ground plane printed circuit board without socket is recommended. Video amplifier 10 MHz isolation test also requires this printed circuit board. The reason for a double sided full ground plane PCB is that large measurement variations occur in single sided PCBs. Note 12: Adjust input frequency from 10 MHz (AV max reference level) to the −3 dB corner frequency (f−3 dB). Note 13: Measure output levels of the other two undriven amplifiers relative to the driven amplifier to determine channel separation. Terminate the undriven amplifier inputs to simulate generator loading. Repeat test at fIN = 10 MHz for Vsep 10 MHz. Note 14: A minimum pulse width of 200 ns is guaranteed for a horizontal line of 15 kHz. This limit is guaranteed by design. If a lower line rate is used a longer clamp pulse may be required. Note 15: During the AC test the 4V DC level is the center voltage of the AC output signal. For example, if the output is 4 VPP the signal will swing between 2V DC and 6V DC. Note 16: When V1 = V2 = V3 = 0V and the video input is 0.7V, then tr (OSD) = 11 ns and tf (OSD) = 4 ns. The Video Output waveform will be inverted from the one shown in Figure 3. Thus tr (OSD) is actually a fall time and tf (OSD) is actually a rise time in this condition. Note 17: Machine Model ESD test is covered by specification EIAJ IC-121-1981. A 200 pF cap is charged to the specified voltage, then discharged directly into the IC with no external series resistor (resistor of discharge path must be under 50Ω). Typical Performance Characteristics VCC = 12V, TA = 25˚C unless otherwise specified Attenuation vs Contrast Voltage Attenuation vs Drive Voltage DS012519-3 DS012519-2 www.national.com 4 Typical Performance Characteristics VCC = 12V, TA = 25˚C unless otherwise specified (Continued) LM1282 Crosstalk vs Frequency DS012519-4 LM1282 Contrast vs Frequency DS012519-5 LM1282 Drive vs Frequency DS012519-6 5 www.national.com Timing Diagrams Blanking Propagation Delay and Rise/Fall Time DS012519-7 FIGURE 2. Video to OSD, OSD to Video Propagation Delay and Switching Time DS012519-8 FIGURE 3. www.national.com 6 Timing Diagrams (Continued) OSD Propagation Delay and Rise/Fall Times DS012519-9 FIGURE 4. Test Circuits DS012519-10 FIGURE 5. LM1282 OSD Video Preamp DC Test Circuit 7 www.national.com Test Circuits (Continued) DS012519-11 FIGURE 6. LM1282 OSD Video Preamp AC Test Circuit www.national.com 8 Test Circuits (Continued) DS012519-12 FIGURE 7. LM1282 OSD Video Preamp Demonstration Board Schematic 9 www.national.com Pin Descriptions Pin Pin No. Name Schematic Description 1 2 3 Red OSD Input Green OSD Input Blue OSD Input These inputs accept standard TTL inputs. Each color is either fully on (logic high) or fully off (logic low). Connect unused pins to ground with a 47k resistor. 4 Video/OSD Switch This input accepts a standard TTL input. H = OSD L = Video Connect to ground with a 47k resistor when not using OSD. 5 8 11 Red Video In Green Video In Blue Video In Video inputs. These inputs must be AC Coupled with a minimum of a 1 µF cap, 10 µF is perferred. DC restoration is done at these inputs. A series resistor of about 33Ω should also be used. 6 9 VCC1 Power supply pins (excluding output stage) 7 10 21 Ground Ground pins. All grounds are internally connected and must also be connected on the PCB. 12 VREF Pin used for additional filter capacitor to internal reference. The voltage at this pin is 2.0V. 13 14 26 27 28 Video Contrast OSD Contrast Blue Drive Green Drive Red Drive Contrast control pins: 4V — no attenuation 0V — over 60 dB attenuation Drive control pins: 4V — no attenuation 0V — 12 dB attenuation 15 16 Clamp Gate Blank Gate Both pins accept TTL inputs and are active low. The clamp gate provides DC restoration of the video signal. The blank gate forces the video outputs to below 200 mV. 17 19 24 Blue Clamp Cap Green Clamp Cap Red Clamp Cap The external clamp cap is charged and discharged to the correction voltage needed for DC restoration. 0.1 µF is the recommended value. www.national.com 10 Pin Descriptions Pin Pin No. Name (Continued) Schematic Description 18 20 23 Blue Video Out Green Video Out Red Video Out Video output. For proper black level the output must drive 390Ω impedance. 22 VCC2 Power supply pin for the output stage. There are no internal connections to VCC1. 25 RGB Cutoff Adjust Sets the black level of the video outputs to all three channels. Range is 0V to 4V. Minimum black level is limited to about 300 mV. Functional Description Figure 1 on the front page shows the block diagram of the LM1282 along with the pinout of the IC. Each channel receives both a video signal and an OSD signal at its input amplifier (−A1). The Video/OSD Switch signal also goes to the input amplifiers, controlling whether the video or the OSD signal passes through the LM1282. Both the OSD inputs and the Video/OSD Switch accept standard TTL signals. If video is selected then a TTL low is applied to pin 4, for OSD a TTL high needs to be applied. When the OSD feature is not used, then pin 4 needs to be connected to ground via a 47k resistor. Although the OSD input signal is a TTL signal, the input amplifier processes this signal to match the video levels. A TTL high signal will be at the video white level and a TTL low signal will typically be within 100 mV of the video black level. Note that by using the LM1282 the monitor designer connects the OSD input signals directly to the IC with NO signal processing. DC restoration is performed on the video inputs to the LM1282. Remember video inputs are always AC coupled to the video pre-amp. There is no DC standard for the video input, therefore AC coupling the video inputs is necessary for proper operation of the monitor. A minimum capacitance of 1 µF is recommended at the video input pins. The preferred value is 10 µF. Part of the signal processing of the TTL OSD inputs is matching the black level of the OSD signal (TTL low) to the black level of the video signal. With AC coupling of the video inputs, DC restoration must be done at the input to perform the black level matching. this section, any adjustments on the signal path beyond the contrast stage affects both the video signal and the OSD signal. Following the Contrast Attenuation block is the Drive Attenuation. By having the Drive Attenuation past the contrast stage, any adjustment made on the video signal will equally affect the OSD signal. This configuration simplifies the white level adjustment. When the white level of the video is adjusted then the OSD white level is automatically set. The only OSD adjustment necessary when using the LM1282 is the OSD contrast. Note that when performing the white level adjustments the video portion of the display must be used, because there are minor variations between the OSD levels and the video levels. The output stage is the −A2 amplifier. This stage is similar to the LM1205 output stage, where the video output can be blanked to a level below the video black level. A blacker than black output during blanking provides the capability to blank at the cathodes of the CRT. This eliminates the need for using high voltage transistors at G1 of the CRT to perform the blanking function. When the outputs are blanked the LM1282 can still DC restore the video output signal by using the Clamp Gate. There is an internal feedback stage that does the DC restoration. In order to maintain the correct video levels based on this feedback loop, the video output of the LM1282 must be terminated with a 390Ω impedance. The required correction voltage for DC restoration is stored on the clamp cap. A value of 0.1 µF is recommended for the clamp cap. If the cap value is too small then there will be a tilt (shift) in the DC level of the video output during the horizontal scan. If the cap value is too large, then the DC restoration circuit may not be able to maintain the proper DC level of the video signal. Since DC restoration is also done at the video inputs, larger clamp cap values will be less of a problem with the LM1282 than with most other video preamps. The reference level for the DC restoration circuit is set at the RGB Cutoff Adjust pin (pin 25). Most monitor applications AC The next stage in the LM1282 is the Contrast Attenuation. Both the video and OSD contrast controls go to this stage. For easy interfacing to 5V DACs all control inputs, including these two controls, use a 0V to 4V range. Both contrast controls give no attenuation at 4V and full attenuation (over −50 dB) at 0V. The video and OSD contrast adjustments are completely independent of each other, allowing the user to set the desired contrast of the OSD window without affecting the video portion of the display. There is only one output from 11 www.national.com Functional Description measured at the time they cross 1.3V. The video output is set to 4 VPP. Propagation delay is measured when the output is half way in its transition (changed by 2V). Rise and fall times of the video output are measured between the 10% and 90% points of the transitions. Board layout is always critical in a high frequency application such as using the LM1282. A poor layout can result in ringing of the video waveform after sudden transitions, or the part could actually oscillate. A good ground plane and proper routing of the +12V are important steps to a good PCB layout. The LM1282 can operate on a single sided board with a good layout. A ground plane is recommended and it is best to isolate the output stage grounds from the rest of the circuit. Also the two grounds should be connected together only at one point, ideally where the ground cable is connected to the board ground. Yes, all grounds are connected internally, but trace resistance can still allow for ground bounce, giving enough feedback for oscillations. The output stage power supply pin, pin 22, does not have an internal connection to the other power supply pins. This pin must be connected to the +12V supply, preferably with high frequency isolation. This is easily done with a ferrite bead between pin 22 and the +12V supply. Figure 8 and Figure 9 show the waveform obtained with the LM1282 using the single sided demo board designed for this part. (Continued) couple the preamp output to the cathode drivers. Therefore only one cutoff adjustment is provided, this is used primarily to optimize the operation of the cathode drivers. Note that the Blank and Clamp Gates are active low. These pins are normally controlled by standard TTL signals. For video applications the Clamp Gate must be used. There are designs where the blank function may not be required. When the Blank Gate is not used, it must be tied high by a pullup resistor. A resistor value of 47k is acceptable, going to either 4V or 12V. Gain of −A2 is controlled by the Drive Adjust pins. These are also 0V to 4V control voltages. 4V results in no attenuation at −A2, and 0V results in a −12 dB attenuation. The 12 dB adjustment range should provide more than enough adjustment for setting the white level. Note that a 12 dB range gives a 4 to 1 range in the output levels between the three channels. Applications of the LM1282 A schematic for a demonstration board is shown in Figure 7. This board was used for the characterization of the LM1282. Note that a 33Ω resistor is in series with all inputs to the IC that receive external signals. These resistors are recommended to protect the IC from any sudden voltage surges that may result during the power up and power down modes, or when connecting the monitor to other equipment. The monitor designer should include these resistors in his design. If additional protection against ESD at the video inputs is necessary, then adding clamp diodes on the IC side of the 33Ω resistor is recommended; one to VCC1 and one to ground. Normally a designer may want to increase the value of the 33Ω resistor at pins 5, 8, and 11 for additional ESD protection at the video inputs. Remember that the input capacitor to the video inputs is also part of the DC restoration circuit. This circuit is depending on a maximum circuit resistance of about 110Ω. The 33Ω resistors should not be increased in value. The internal ESD protection and the external clamp diodes, one to +12V and the other to ground, will provide excellent ESD protection. Interfacing to the OSD inputs is quite easy since the signal processing necessary to match the OSD signals to the video levels is done internally by the LM1282. However, proper design techniques must be followed in assuring that a good TTL signal is received at the LM1282. Ground bounce in the TTL signal can cause improper switching times, possibly with multiple switching. Such affects will result in degradation in the quality of the displayed OSD window. The final TTL stage needs to be located near the LM1282 to assure clean TTL signals. Propagation delay is another source capable of degrading the OSD display. The optimum condition is to have all OSD signals originate from one register, keeping the variation in the propagation delays under 5 ns. If the OSD feature is not used, or the lines may be disconnected for some testing operations, then the Video/OSD Switch pin (pin 4) must have a pull down resistor to ground to insure operation in the video mode. Using a 47k pull down resistor will keep this pin low, and provide enough resistance to where the pin can still be driven directly by a TTL signal. Pins 1 through 3 should also be terminated the same way, eliminating the potential to switch logic levels just from the noise at the open pins. Figures 2, 3, 4 show the timing diagrams for the LM1282. When measuring propagation delays all TTL signals are www.national.com 12 References Zahid Rahim, “Guide to CRT Video Design,” Application Note 861, National Semiconductor Corp., Jan. 1993 Ott, Henry W. Noise Reduction Techniques in Electronic systems , John Wiley & Sons, New York, 1976 DS012519-23 DS012519-22 FIGURE 9. LM1282 Fall Time FIGURE 8. LM1282 Rise Time 13 www.national.com LM1282 110MHz RGB Video Amplifier System with On Screen Display (OSD) Physical Dimensions inches (millimeters) unless otherwise noted 28-Lead (0.600" Wide) Molded Dual-In-Line Package NS Package Number N28B LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into sonably expected to cause the failure of the life support the body, or (b) support or sustain life, and whose faildevice or system, or to affect its safety or effectiveness. ure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 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