PEREGRINE PE42421

Product Specification
PE42421
SPDT UltraCMOS™
10 MHz – 3.0 GHz RF Switch
Product Description
Features
The PE42421 UltraCMOS™ RF Switch is designed to
cover a broad range of applications from 10 MHz through
3000 MHz. This reflective switch integrates on-board
CMOS control logic with a low voltage CMOS-compatible
control interface, and can be controlled using either single
-pin or complementary control inputs. Using a nominal +3volt power supply voltage, a typical input 1 dB
compression point of +33.5 dBm can be achieved.
 Single-pin or complementary CMOS
The PE42421 SPDT RF Switch is manufactured on
Peregrine’s UltraCMOS™ process, a patented variation
of silicon-on-insulator (SOI) technology on a sapphire
substrate, offering the performance of GaAs with the
economy and integration of conventional CMOS.
logic control inputs
 Low insertion loss: 0.35 dB at
1000 MHz, 0.5 dB at 2000 MHz
 Isolation of 30 dB at 1000 MHz, 20 dB
at 2000 MHz
 Typical input 1 dB compression point
of +33.5 dBm
 1.8V minimum power supply voltage
 SC-70 package
Figure 2. Package
Figure 1. Functional Diagram
6-lead SC-70
ESD
RFC
RF1
RF2
ESD
ESD
CMOS
Control
Driver
CTRL CTRL or VDD
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©2010-2011 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 9
PE42421
Product Specification
Table 1. Electrical Specifications @ +25°C, VDD = 3V (ZS = ZL = 50 Ω )
Parameter
Operation Frequency
Insertion Loss
Conditions
1
Minimum
10 MHz
1000 MHz
2000 MHz
3
Typical
0.35
0.50
Maximum
Units
3000
MHz
0.45
0.60
dB
dB
Isolation
1000 MHz
2000 MHz
29
19
30
20
dB
dB
Return Loss3
1000 MHz
2000 MHz
21
24
22
27
dB
dB
‘ON’ Switching Time
50% CTRL to 0.1 dB of final value, 1 GHz
1.50
us
‘OFF’ Switching Time
50% CTRL to 25 dB isolation, 1 GHz
1.50
us
Video Feedthrough
2
Input 1 dB Compression
1000 MHz @ 2.3 - 3.3V
1000 MHz @ 1.8 - 2.3V
2500 MHz @ 2.3 - 3.3V
2500 MHz @ 1.8 - 2.3V
Input IP3
1000 MHz, 20dBm input power
31.5
29.5
28.5
28
15
mVpp
33.5
30.5
30.5
29
dBm
55
dBm
Notes: 1. Device linearity will begin to degrade below 10 MHz.
2. The DC transient at the output of any port of the switch when the control voltage is switched from Low to High or High to Low in a 50 Ω test
set-up, measured with 1ns risetime pulses and 500 MHz bandwidth.
3. A tuning capacitor must be added to the application board to optimize the insertion loss and return loss performance. See Figure 6 for
details.
©2010-2011 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 9
Document No. 70-0396-02 │ UltraCMOS™ RFIC Solutions
PE42421
Product Specification
Figure 3. Pin Configuration (Top View)
Table 4. Absolute Maximum Ratings
Symbol
Parameter/Conditions
Min
Max
Units
Power supply voltage
-0.3
V
Voltage on any DC input
-0.3
4.0
VDD+
0.3
TST
Storage temperature
range
-65
150
°C
TOP
Operating temperature
range
-40
85
°C
PIN
Input power (50 Ω)
VDD
VI
Table 2. Pin Descriptions
Pin
No.
Pin
Name
1
RF14
RF Port1
2
GND
Ground connection. Traces should be
physically short and connected to ground
plane for best performance.
3
RF24
RF Port2
4
CTRL
Switch control input, CMOS logic level.
5
RFC4
RF Common
6
CTRL or
VDD
Description
VESD
This pin supports two interface options:
Single-pin control mode. A nominal 3-volt
supply connection is required.
Complementary-pin control mode. A
complementary CMOS control signal to
CTRL is supplied to this pin. Bypassing
on this pin is not required in this mode.
ESD Voltage (HBM,
ML_STD 883 Method
3015.7)
ESD Voltage (MM,
JEDEC, JESD22-A114-B)
V
5
dBm
2000
V
100
V
+34
Notes: 5. To maintain optimum device performance, do not exceed
Max PIN at desired operating frequency (see Figure 4).
Exceeding absolute maximum ratings may cause
permanent damage. Operation should be restricted to
the limits in the Operating Ranges table. Operation
between operating range maximum and absolute
maximum for extended periods may reduce reliability.
Figure 4. Maximum Input Power
Note: 4. All RF pins must be DC blocked with an external series
capacitor or held at 0 VDC.
Table 3. Operating Ranges
Parameter
VDD Power Supply
Voltage
Min
Typ
Max
Units
1.8
3.0
3.3
V
9
20
µA
IDD Power Supply Current
(VDD = 3V, VCNTL = 3V)
Control Voltage High
V
0.7x VDD
Control Voltage Low
0.3x VDD
V
Latch-Up Avoidance
Moisture Sensitivity Level
The Moisture Sensitivity Level rating for the PE42421 in
the SC70 package is MSL1.
Switching Frequency
The PE42421 has a maximum 25 kHz switching rate.
Document No. 70-0396-02 │ www.psemi.com
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe the
same precautions that you would use with other ESDsensitive devices. Although this device contains
circuitry to protect it from damage due to ESD,
precautions should be taken to avoid exceeding the
specified rating.
©2010-2011 Peregrine Semiconductor Corp. All rights reserved.
Page 3 of 9
PE42421
Product Specification
Table 5. Single-pin Control Logic Truth Table
Control Voltages
Signal Path
Pin 6 (VDD) = VDD
Pin 4 (CTRL) = High
RFC to RF2
Pin 6 (VDD) = VDD
Pin 4 (CTRL) = Low
RFC to RF1
Table 6. Complementary-pin Control Logic
Truth Table
Control Voltages
Pin 6 (CTRL or VDD) = Low
Pin 4 (CTRL) = High
Pin 6 (CTRL or VDD) = High
Pin 4 (CTRL) = Low
Signal Path
RFC to RF2
RFC to RF1
©2010-2011 Peregrine Semiconductor Corp. All rights reserved.
Page 4 of 9
Control Logic Input
The PE42421 is a versatile RF CMOS switch that
supports two operating control modes; single-pin
control mode and complementary-pin control
mode.
Single-pin control mode enables the switch to
operate with a single control pin (pin 4) supporting
a +3-volt CMOS logic input, and requires a
dedicated +3-volt power supply connection on pin
6 (VDD). This mode of operation reduces the
number of control lines required and simplifies the
switch control interface typically derived from a
CMOS Processor I/O port.
Complementary-pin control mode allows the
switch to operate using complementary control
pins CTRL and CTRL (pins 4 & 6), that can be
directly driven by +3-volt CMOS logic or a suitable
Processor I/O port. This enables the PE42421 to
be used as a potential alternate source for SPDT
RF switch products used in positive control
voltage mode and operating within the PE42421
operating limits.
Document No. 70-0396-02 │ UltraCMOS™ RFIC Solutions
PE42421
Product Specification
Figure 5. Evaluation Board Layouts
Evaluation Kit
The SPDT switch EK Board was designed to ease
customer evaluation of Peregrine’s PE42421. The
RF common port is connected through a 50 Ω
transmission line via the top SMA connector, J1.
RF1 and RF2 are connected through 50 Ω
transmission lines via SMA connectors J2 and J3,
respectively. A through 50 Ω transmission is
available via SMA connectors J4 and J5. This
transmission line can be used to estimate the loss
of the PCB over the environmental conditions
being evaluated.
Peregrine Specification 101-0162-02
The board is constructed of a two metal layer FR4
material with a total thickness of 0.031”. The
bottom layer provides ground for the RF
transmission lines. The transmission lines were
designed using a coplanar waveguide with ground
plane model using a trace width of 0.0476”, trace
gaps of 0.030”, dielectric thickness of 0.028”,
metal thickness of 0.0021” and εr of 4.4.
J6 and J7 provide a means for controlling DC and
digital inputs to the device. J6-1 is connected to
the device VDD or CTRL input. J7-1 is connected
to the device CTRL input.
Figure 6. Evaluation Board Schematic
Peregrine Specification 102-0756-01
J4
N/A
1
1
T-line Description
-Model = CPWG
H = 28 mils
T = 2.1 mils
W = 47 mils
G = 30 mils
Er = 4.4
J5
N/A
1
2
J7
CNTL
R2
1 K Ohm
U1
PE42421/SC70-6
1
J3
RF2
C1
0.5pF
SEE ASSYNOTE 2
1
J2
RF1
R1
1 K Ohm
C2
0.5pF
SEE ASSYNOTE 2
1
2
2
1
2
1
J1
RFC
1
4 CTRL RF_2 3
5 RFC GND 2
6 VDD RF_1 1
J6
CNTLX/VDD
Document No. 70-0396-02 │ www.psemi.com
General Comments
-Transmission lines connected to J1, J2, and J3 should
have exactly the same electrical length.
The path from J2 to J3 including the distance through the part
should have the same length as J4 and J5 and be in parallel to
J4 to J5.
©2010-2011 Peregrine Semiconductor Corp. All rights reserved.
Page 5 of 9
PE42421
Product Specification
Typical Performance Data @ -40°C to 85°C (Unless Otherwise Noted)
Figure 7. Insertion Loss
Figure 8. Isolation – Input to Output
Figure 9. Isolation – Output to Output
Figure 10. Return Loss (Input)
©2010-2011 Peregrine Semiconductor Corp. All rights reserved.
Page 6 of 9
Document No. 70-0396-02 │ UltraCMOS™ RFIC Solutions
PE42421
Product Specification
Typical Performance Data @ VDD = 2.3V, T=25°C
Figure 11. Insertion Loss
Figure 12. Isolation – Input to Output
Figure 13. Isolation – Output to Output
Figure 14. Return Loss (Input & Output)
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©2010-2011 Peregrine Semiconductor Corp. All rights reserved.
Page 7 of 9
PE42421
Product Specification
Figure 15. Package Drawing
6-lead SC-70
©2010-2011 Peregrine Semiconductor Corp. All rights reserved.
Page 8 of 9
Document No. 70-0396-02 │ UltraCMOS™ RFIC Solutions
PE42421
Product Specification
Figure 16. Tape and Reel Specifications
Pin 1
4
5
Top of
4
5
6
6
Tape Feed Direction
3
2
1
3
2
1
Device
Pin 1
Device Orientation in Tape
Table 7. Ordering Information
Order Code
Part Marking
Description
Package
Shipping Method
EK42421-01
PE42421-EK
PE42421 Evaluation Kit
Evaluation Kit
1 / Box
PE42421SCAA-Z
421
PE42421 SPDT RF Switch
Green 6-lead SC-70
3000 units / T&R
Sales Contact and Information
For sales and contact information please visit www.psemi.com.
Advance Information: The product is in a formative or design stage. The datasheet contains design target
specifications for product development. Specifications and features may change in any manner without notice.
Preliminary Specification: The datasheet contains preliminary data. Additional data may be added at a later
date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best
possible product. Product Specification: The datasheet contains final data. In the event Peregrine decides to
change the specifications, Peregrine will notify customers of the intended changes by issuing a CNF (Customer
Notification Form).
The information in this datasheet is believed to be reliable. However, Peregrine assumes no liability for the use
of this information. Use shall be entirely at the user’s own risk.
Document No. 70-0396-02 │ www.psemi.com
No patent rights or licenses to any circuits described in this datasheet are implied or granted to any third party.
Peregrine’s products are not designed or intended for use in devices or systems intended for surgical implant,
or in other applications intended to support or sustain life, or in any application in which the failure of the
Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no
liability for damages, including consequential or incidental damages, arising out of the use of its products in
such applications.
The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS, HaRP, MultiSwitch and DuNE
are trademarks of Peregrine Semiconductor Corp.
©2010-2011 Peregrine Semiconductor Corp. All rights reserved.
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