PROTEC PA5750

Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
ANALOG PRODUCTS DIVISION
FEATURES
DESCRIPTION
ADC
• 24-bit, 8 – 96 kHz sampling frequency
• 92dB dynamic range, 92dB signal to noise ratio,
-85dB THD+N
• Stereo or Mono microphone interface with
microphone amplifier
• Auto level control and noise gate
• 3 to1 analog input selection
• Analog input mixers and amplifiers
DAC
• 24-bit, 8 – 96 kHz sampling frequency
• 93dB dynamic range, 93dB signal to noise ratio,
-81dB THD+N
• 500mWatt speaker amplifier
• 40mWatt headphone option, pop free, capless opt.
• Stereo enhancement
• Bass and Treble
• Analog output mixers and amplifiers.
Low Power
• 1.8 to 3.3Volt operation
• 7mWatt playback, 16mWatt playback and record.
System
• I2C or SPI µC interface
• Headphone Detector
• 256Fs, 384Fs, USB 12MHz or 24MHz
• Master or Slave serial port
• I2S, Left Justified, DSP/PCM Mode
The PA5750 is a high performance, low power and
low cost Audio CODEC.
It consists of 2-channel ADC, 2-channel DAC,
microphone amplifier, Speaker amplifier, headset
amplifier, digital enhancements and analog mixing
and amplification functions.
The PA5750 uses advanced multi-bit delta-sigma
modulation techniques to convert DATA between
digital and analog.
The multi-bit delta-sigma modulations decrease the
sensitivity to clock jitter and low out of band noise.
The PA5750 can operate as the Master or the
Slave with various clock frequencies including 12 or
24MHz for USB devices. Audio sample rates (44.1,
48 and 96kHz) are generated directly from the
master clock.
The PA5750 operates from 1.8V to 3.6V. Sections
of the chip can be powered down by software
control.
The PA5750 is offered in a 5x5mm QFN Package
ORDERING INFORMATION
APPLICATIONS
•
•
•
•
•
Device No.
MP3 Players / Recorders
AAC/WMA/Multi Format Players
Portable Digital Music Systems
GPS
Bluetooth
Package
PA5750
QFN-32
LIN3
PA5750
LIN
MIC L
LIN
RIN
MIXL
DACL
LIN1
LOUT1
MIXR
ROUT1
MIXL
LOUT2
+/- MIXR
ROUT2
MIC AMP
ADC
RIN3
MUX
VOLUME
RIN1
RIN2
MIXMONO
MUX
MIC AMP
DAC
ADC
VREF
ROUT1
MONOOUT
DACR
RIN
DVDD
DACVREF
VMID
ADCVREF
HPVDD
AVDD
SCLK
DSDIN
DLRCK
ASDOUT
HPGND
DACR
AUDIO
INTERFACE
ALRCK
CDATA
CE
CCLK
MCLK
CONTROL
INTERFACE
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
OUT3
MIXR
DACL
CLOCK
MANAGER
MOUT
MIXR
LIN
AGND
MUX
AUTO
LEVEL
CONTROL
MIC L+ MIC R
LIN1-RIN1
MIXMONO
DACL/2
DACR/2
MIC R
RIN3
LIN
RIN
STEREO
ENHANCE
RIN
DACL
DGND
LIN1-RIN1
LIN2-RIN2
MIC L+ MIC R
RIN1
RIN2
DAC
DIGITAL
FILTERS
PVDD
MUX
MUX
LIN2
LIN3
MICBIAS
MIXL
DACR
MUX
LIN1
LIN2
MUX
BLOCK DIAGRAM
LIN2-RIN2
95230
PA5750
1
PA5750
ANALOG PRODUCTS DIVISION
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
Chapter
DESCRIPTION
2
32-PIN QFN LAYOUT AND PIN DESCRIPTIONS
3
TYPICAL APPLICATION CIRCUIT
4
CLOCK MODES AND SAMPLING FREQUENCIES
5
MICRO CONTROLLER CONFIGURATION INTERFACE
5.1
SPI
5.2
2-WIRE
6
CONFIGURATION REGISTER DEFINITION
6.1
Chip Control and Power Management
6.1.1.
Register 0 – Chip Control 1, Default 0000 0110
6.1.2.
Register 1 – Chip Control 2, Default 0001 1100
6.1.3.
Register 2 – Chip Power Management, Default 1100 0011
6.1.4.
Register 3 – ADC Power Management, Default 1111 1100
6.1.5.
Register 4 – DAC Power Management, Default 1100 0000
6.1.6.
Register 5 – Chip Low Power 1, Default 0000 0000
6.1.7.
Register 6 – Chip Low Power 2, Default 0000 0000
6.1.8.
Register 7 – Analog Voltage Management, Default 0111 1100
6.1.9.
Register 8 – Master Mode Control, Default 1000 0000
6.2
ADC Control
6.2.1.
Register 9 – ADC Control 1, Default 0000 0000
6.2.2.
Register 10 – ADC Control 2, Default 0000 0000
6.2.3.
Register 11 – ADC Control 3, Default 0000 0110
6.2.4.
Register 12 – ADC Control 4, Default 0000 0000
6.2.5.
Register 13 – ADC Control 5, Default 0000 0110
6.2.6.
Register 14 – ADC Control 6, Default 0011 0000
6.2.7.
Register 15 – ADC Control 7, Default 0011 0000
6.2.8.
Register 16 – ADC Control 8, Default 1100 0000
6.2.9.
Register 17 – ADC Control 9, Default 1100 0000
6.2.10.
Register 18 – ADC Control 10, Default 0011 1000
6.2.11.
Register 19 – ADC Control 11, Default 1011 0000
6.2.12.
Register 20 – ADC Control 12, Default 0011 0010
6.2.13.
Register 21 – ADC Control 13, Default 0000 0110
6.2.14.
Register 22 – ADC Control 14, Default 0000 0000
6.3
DAC Control
6.3.1.
Register 23 – DAC Control 1, Default 0000 0000
6.3.2.
Register 24 – DAC Control 2, Default 0000 0110
6.3.3.
Register 25 – DAC Control 3, Default 0011 0010
6.3.4.
Register 26 – DAC Control 4, Default 1100 0000
6.3.5.
Register 27 – DAC Control 5, Default 1100 0000
6.3.6.
Register 28 – DAC Control 6, Default 0000 1000
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
2
PA5750
ANALOG PRODUCTS DIVISION
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
6.3.7.
Register 29 – DAC Control 7, Default 0000 0110
6.3.8.
Register 30 – DAC Control 8, Default 0001 1111
6.3.9.
Register 31 – DAC Control 9, Default 1111 0111
6.3.10.
Register 32 – DAC Control 10, Default 1111 1101
6.3.11.
Register 33 – DAC Control 11, Default 1111 1111
6.3.12.
Register 34 – DAC Control 12, Default 0001 1111
6.3.13.
Register 35 – DAC Control 13, Default 1111 0111
6.3.14
Register 36 – DAC Control 14, Default 1111 1101
6.3.15.
Register 37 – DAC Control 15, Default 1111 1111
6.3.16.
Register 38 – DAC Control 16, Default 0000 0000
6.3.17.
Register 39 – DAC Control 17, Default 0011 1000
6.3.18.
Register 40 – DAC Control 18, Default 0011 1000
6.3.19.
Register 41 – DAC Control 19, Default 0011 1000
6.3.20.
Register 42 – DAC Control 20, Default 0011 1000
6.3.21.
Register 43 – DAC Control 21, Default 0011 1000
6.3.22.
Register 44 – DAC Control 22, Default 0011 1000
6.3.23.
Register 45 – DAC Control 23, Default 0000 0000
6.3.24.
Register 46 – DAC Control 24, Default 0000 0000
6.3.25.
Register 47 – DAC Control 25, Default 0000 0000
6.3.26.
Register 48 – DAC Control 26, Default 0000 0000
6.3.27.
Register 49 – DAC Control 27, Default 0000 0000
6.3.28.
Register 50 – DAC Control 28, Default 0000 0000
6.3.29.
Register 51 – DAC Control 29, Default 0000 0000
6.3.30.
Register 52 – DAC Control 30, Default 0000 0000
7
Digital Audio Interface
8
ELECTRICAL CHARACTERISTICS
9
8.1.
Absolute Maximum rating
8.2.
Recommended Operating Conditions
8.3.
ADC Analog and Filter Characteristics and Specifications
8.4.
DAC Analog and Filter Characteristics and Specifications
8.5.
Power Consumption Characteristics
8.6.
Serial Audio Port Switching Characteristics
8.7.
Serial Control Port Switching Characteristics
PACKAGE INFORMATION
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
3
PA5750
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
ANALOG PRODUCTS DIVISION
DVDD 2
25 RIN2
27 RIN1
26 LIN2
28 LIN1
29 DACVREF
30 CE
31 CDATA
MCLK 1
32 CCLK
2. 32-PIN QFN LAYOUT AND PIN DESCRIPTIONS.
24 LIN3
23 RIN3/HPDET
PVDD 3
22 MICBIAS
PA5750
DGND 4
21 VMID
SCLK 5
20 ADCVREF
17 HPVDD
LOUT2 16
HPGND 14
ROUT2 15
LOUT1 13
ALRCK 9
ASDOUT 8
ROUT1 12
18 AVDD
OUT3 11
19 AGND
MOUT 10
DSDIN 6
DLRCK 7
The PA5750 is PIN to PIN compatible with the WM8750 except PIN 29. Where PA5750 uses it as a reference pin, while the
WM8750 uses it as a digital mode pin.
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
NAME
MCLK
DVDD
PVDD
DGND
SCLK
DSDIN
DLRCK
ASDOUT
ALRCK
MOUT
OUT3
ROUT1
LOUT2
HPGND
ROUT2
LOUT2
HPVDD
AVDD
AGND
ADCREF
VMID
MICBIAS
RINPUT3/HPDET
LIN3
RIN2
LIN2
RIN1
LIN1
DACREF
CE
CDATA
CCLK
Designation
INPUT
SUPPLY
SUPPLY
SUPPLY
I/O
INPUT
I/O
OUTPUT
I/O
OUTPUT
OUTPUT
OUTPUT
OUTPUT
SUPPLY
OUTPUT
OUTPUT
SUPPLY
SUPPLY
SUPPLY
OUTPUT
OUTPUT
OUTPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
OUTPUT
INPUT
I/O
INPUT
Description
Master Clock
Digital Core Supply
Digital Input, Output Supply
Digital Ground (Return Path for DVDD and PVDD)
Audio DATA Bit Clock
DAC Audio DATA
DAC Audio DATA Left and Right Clock
ADC Audio DATA
ADC Audio Left and Right Clock
MONO Output
Analog Output 3 (can be used as Headphone Pseudo Ground)
Right Output 1 (line or speaker/headphone)
Left Output 1 (line or speaker/headphone)
Ground for Analog Output Drivers (LOUT1/2, ROUT1/2)
Right Output 2 (line or speaker/headphone)
Left Output 2 (line or speaker/headphone)
Supply for Analog Output Drivers (LOUT1/2, ROUT1/2)
Analog Supply
Analog Ground
Connected to Decoupling Capacitor
Connected to Decoupling Capacitor
Microphone Bias
Right Channel Input 3 or Headphone plug-in detection
Left Channel Input 3
Right Channel Input 2
Left Channel Input 2
Right Channel Input 1
Left Channel Input 1
Connected to Decoupling capacitor
Control Select or Device Address Selection
Control DATA Input or Output
Control Clock Input
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
4
PA5750
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
ANALOG PRODUCTS DIVISION
3. TYPICAL APPLICATION CIRCUIT
18
AVDD
17
HPVDD
2
DVDD
3
PVDD
DVDD
PVDD
AVDD
HPVDD
PA5750
10µF
0.1µF 10µF
AUDIO INTERFACE
I2S, DSP
PVDD
10K
10K
2
SPI, I C
CONTROL INTERFACE
LIN3
0.1µF
4
1
5
6
7
8
9
30
32
31
24
DGND
MCLK
SCLK
DSDIN
DLRCK
ASDOUT
ALRCK
19
AGND
14
HPGND
MONOOUT 10
OUT3
LIN2
23
26
LIN1
25
28
220µF
CCLK
CDATA
ROUT1 12
220µF
RINPUT3/HPDET
LOUT2
LIN2
RIN2
VMID
ADCREF
LIN1
DACREF
RIN1
27
220µF*
13
MICBIAS
RIN2
11
LOUT1
LIN3
RIN1
GND_THERMAL
0.1µF
10µF
1µF
CE
ROUT2
RIN3
0.1µF 10µF
15
16
22
21
20
10µF
29
10µF
33
*If connected to Headphone use 220µF Capacitor
If connected to Line out use a1 ot 10µF capacitor
10µF
10µF
0.1µF
0.1µF
0.1µF
0.1µF
4. CLOCK MODES AND SAMPLING FREQUENCIES.
According to the input serial audio DATA sampling frequency, the PA5750 can work in two speed modes. Single
or double speed. The range of the sampling frequency in these two modes is listed in Table 1. The PA5750 can
work in either master clock mode or in slave clock mode.
In slave mode, LRCK and SCLK are supplied externally. LRCK and SCLK must be synchronously derived from
the system clock with a specific rate, The PA5750 can auto detect MCLK/LRCK ratio according to Table 1. The
PA5750 only supports the MCLK/LRCK ratios listed in Table 1. The LRCK/SCLK ratio is normally 64.
Table 1 Slave Mode Sampling Frequencies and MCLK/SCLK Ratio.
Speed Mode
Single Speed
Double Speed
Sampling Frequency
8 kHz – 50 kHz
50 kHz – 100 kHz
MCLK/LRCK Ratio
256, 384, 512, 768, 1024.
128, 192, 256, 384, 512.
In master mode, LRCK and SCLK are internally derived from MCLK.
The available MCLK/LRCK ratios are listed in Table 2.
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
5
PA5750
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
ANALOG PRODUCTS DIVISION
Table 2 Master Mode Sampling Frequencies and MCLK/LRCK Ratio.
MCLK
MCLK
ADC Sample Rate
ADCFsRatio
DAC Sample Rates
DACFsRatio
SCLK
CLKDIV2=0
CLKDIV2=1
(ALRCK)
[4:0]
(DLRCK)
[4:0]
Ratio
Normal Mode
12.288MHz
11.2896 MHz
18.432 MHz
16.9344 MHz
24.576MHz
22.5792 MHz
36.864 MHz
33.8688 MHz
8 kHz (MCLK/1536)
01010
8 kHz (MCLK/1536)
01010
MCLK/6
8 kHz (MCLK/1536)
01010
48 kHz (MCLK/256)
00010
MCLK/4
12 kHz (MCLK/1024)
00111
12 kHz (MCLK/1024)
00111
MCLK/4
16 kHz (MCLK/768)
00110
16 kHz (MCLK/768)
00110
MCLK/6
24 kHz (MCLK/512)
00100
24 kHz (MCLK/512)
00100
MCLK/4
32 kHz (MCLK/384)
00011
32 kHz (MCLK/384)
00011
MCLK/6
48 kHz (MCLK/256)
00010
8 kHz (MCLK/1536)
01010
MCLK/4
48 kHz (MCLK/256)
00010
48 kHz (MCLK/256)
00010
MCLK/4
96 kHz (MCLK/128)
00000
96 kHz (MCLK/128)
00000
MCLK/2
8.0182 kHz (MCLK/1408)
01001
8.0182 kHz (MCLK/1408)
01001
MCLK/4
8.0182 kHz (MCLK/1408)
01001
44.1 kHz (MCLK/256)
00010
MCLK/4
11.025 kHz (MCLK/1024)
00111
11.025 kHz (MCLK/1024)
00111
MCLK/4
22.05 kHz (MCLK/512)
00100
22.05 kHz (MCLK/512)
00100
MCLK/4
44.1 kHz (MCLK/256)
00010
8.0182 kHz (MCLK/1408)
01001
MCLK/4
44.1 kHz (MCLK/256)
00010
44.1 kHz (MCLK/256)
00010
MCLK/4
88.2 kHz (MCLK/128)
00000
88.2 kHz (MCLK/128)
00000
MCLK/2
8 kHz (MCLK/2304)
01100
8 kHz (MCLK/2304)
01100
MCLK/6
8 kHz (MCLK/2304)
01100
48 kHz (MCLK/384)
00011
MCLK/6
12 kHz (MCLK/1536)
01010
12 kHz (MCLK/1536)
01010
MCLK/6
16 kHz (MCLK/1152)
01000
16 kHz (MCLK/1152)
01000
MCLK/6
24 kHz (MCLK/768)
00110
24 kHz (MCLK/768)
00110
MCLK/6
32 kHz (MCLK/576)
00101
32 kHz (MCLK/576)
00101
MCLK/6
48 kHz (MCLK/384)
00011
8 kHz (MCLK/2304)
01100
MCLK/6
48 kHz (MCLK/384)
00011
48 kHz (MCLK/384)
00011
MCLK/6
96 kHz (MCLK/192)
00001
96 kHz (MCLK/192)
00001
MCLK/3
8.0182 kHz (MCLK/2112)
01011
8.0182 kHz (MCLK/2112)
01011
MCLK/6
8.0182 kHz (MCLK/2112)
01011
44.1 kHz (MCLK/384)
00011
MCLK/6
11.025 kHz (MCLK/1536)
01010
11.025 kHz (MCLK/1536)
01010
MCLK/6
22.05 kHz (MCLK/768)
00110
22.05 kHz (MCLK/768)
00110
MCLK/6
44.1 kHz (MCLK/384)
00011
8.0182 kHz (MCLK/2112)
01011
MCLK/6
44.1 kHz (MCLK/384)
00011
44.1 kHz (MCLK/384)
00011
MCLK/6
88.2 kHz (MCLK/192)
00001
88.2 kHz (MCLK/192)
00001
MCLK/3
8 kHz (MCLK/1500)
11011
8 kHz (MCLK/1500)
11011
MCLK
8 kHz (MCLK/1500)
11011
48 kHz (MCLK/250)
10010
MCLK
8.0214 kHz (MCLK/1496)
11010
8.0214 kHz (MCLK/1496)
11010
MCLK
8.0214 kHz (MCLK/1496)
11010
44.118 kHz (MCLK/272)
10011
MCLK
11.0259 kHz (MCLK/1108)
11001
11.0259kHz (MCLK/1108)
11001
MCLK
12 kHz (MCLK/1000)
11000
12 kHz (MCLK/1000)
11000
MCLK
16 kHz (MCLK/750)
10111
16 kHz (MCLK/750)
10111
MCLK
22.0588 kHz (MCLK/544)
10110
22.0588 kHz (MCLK/544)
10110
MCLK
24 kHz (MCLK/500)
10101
24 kHz (MCLK/500)
10101
MCLK
32 kHz (MCLK/375)
10100
32 kHz (MCLK/375)
10100
MCLK
44.118 kHz (MCLK/272)
10011
8.0214 kHz (MCLK/1496)
11010
MCLK
44.118 kHz (MCLK/272)
10011
44.118 kHz (MCLK/272)
10011
MCLK
48 kHz (MCLK/250)
10010
8 kHz (MCLK/1500)
11011
MCLK
48 kHz (MCLK/250)
10010
48 kHz (MCLK/250)
10010
MCLK
88.235 kHz (MCLK/136)
10001
88.235 kHz (MCLK/136)
10001
MCLK
48 kHz (MCLK/250)
10000
48 kHz (MCLK/250)
10000
MCLK
USB Mode
12 MHz
24 MHz
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
6
PA5750
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
ANALOG PRODUCTS DIVISION
5. MICRO-CONTROLLER CONFIGURATION INTERFACE.
The PA5750 supports standard SPI and 2-wire micro-controller configuration interface. An External microcontroller can completely configure the PA5750 through writing to internal configuration registers. Chapter 8
describes in detail the configuration of the registers.
The identical pins are used to configure for either SPI or 2-wire interface.
In SPI mode, CE (Pin 30), CCLK (Pin 32) and CDATA (Pin 31) functions as SPI_CSn, SPI_CLK and SPI_DIN.
In 2-wire mode, CE (Pin 30), CCLK (Pin 32) and CDATA (Pin 31) functions as AD0, SCL and SDA respectively.
To select SPI mode, apply a high to low transition signal to CE (pin 30). If no signal is applied, the PA5750 will
operate in 2-wire interface mode.
5.1 SPI
The PA5750 has a SPI (Serial Peripheral Interface) compliant synchronous serial slave controller internal to the
chip. It provides the ability to allow the external master SPI controller to access the internal registers, thereby
controlling the operation of the chip.
All lines on the SPI bus are unidirectional: The SPI_CLK is generated by the master controller and is primarily
used to synchronize DATA transfer; the SPI_DIN line carries DATA from the master to the slave. SPI_CSn is
generated by the master to select the PA5750.
The timing diagram of this interface is given in Fig. 1. The high to low transition at SPI_CSn (pin 30) indicates
the SPI interface selected. Each write procedure contains 3 words, i.e. Chip Address plus R/W bit, internal
register address and internal register DATA. Every word is fixed at 8 bits. The input SPI_DIN DATA is sampled
at the rising edge of SPI_CLK clock. The MSB bit in each word is transferred first. The transfer rate can be up to
10Mbps.
SPI_DIN
Chip Address
7 bits - 0010000
0
1
5
R/W
bit
6
RAM
8 bits
7
8
9
Register DATA
8 bits
14
15
16
17
22
23
SPI_CLK
SPI_CSn
RAM =Register Address Mapping
Fig.1 SPI Configuration Interface Timing Diagram.
5.2 2-wire Interface
2-wire interface is a bi-directional serial BUS that uses a serial data line (SDA) and a serial clock line (SCL) for
DATA transfer. The timing diagram for DATA transfer is given in Fig. 2.
DATA is transmitted synchronously to SCL clock on the SDA line in a byte-by-byte basis. Each bit in a byte is
sampled during SCL high with the MSB bit transferred first. Each transferred byte is followed by an acknowledge
bit from receiver to pull the SDA low.
The transfer rate of the 2-wire interface can be up to 100kbps.
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
7
PA5750
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
ANALOG PRODUCTS DIVISION
SDA
9
8
1-7
SCL
9
8
1-7
8
1-7
P
S
START
R/W
ADDRESS
DATA
ACK
ACK
DATA
Fig. 2 Complete DATA Transfer for 2-wire Interface
A master controller initiates the transmission by sending a “start” signal, which is defined as a high-to-low
transition at SDA while SCL is high. The first byte transferred is the slave address. It is a seven-bit chip address
followed by a R/W bit. The chip address must be 001000x where x = AD0 (pin CE). The R/W bit indicates the
slave DATA transfer direction.
Once an acknowledge bit is received, the DATA transfer starts to procede on a byte-by-byte basis in the
direction specified by the R/W bit. The master can terminate the communication by generating a “Stop” signal,
which is defined as a low-to-high transition at SDA while SCL is high.
In 2-wire interface mode, the registers can be written to and read. The format of “write” and “Read” instructions
are shown in Tables 3 and 4. To Read DATA from a register R/W must be set to “0” to access the register
address and then set to “1” to read DATA in the register. There is NO acknowledge bit after data to be written
2
or read, this is the only difference from the I C protocol.
Table 3 Write DATA to register in 2-wire Interface Mode
Chip Address
00100
R/W
0
Register Address
RAM
AD0
Chip Address
001000
Chip Address
001000
Table 4 Read DATA from Register in 2-wire Interface Mode
R/W
Register Address
AD0
0
ACK
RAM
R/W
DATA to be Read
AD0
1
ACK
DATA
ACK
ACK
DATA to be written
DATA
6. CONFIGURATION REGISTER DEFINITION
SPI and 2-wire configuration interface share the same registers because there is only one interface active at any
given time. There are a total of 53 user programmable 8-bit registers in the PA5750. These registers control the
operations of ADC and DAC. External master controller can access these registers by using the slave address
specified in RAM (Register Address Map) register as shown in Table 5.
Table 5. Bit Content of Register Address Map (RAM)
B7
B6
B5
B4
B3
B2
B1
B0
Reg. 00
SCPReset
LRCM
DACMCLK
SameFs
SeqEn
EnRef
Reg. 01
TSDN
Pdn_OC
LPVcmMod
LPVrefBuf
Pdn_Ana
Pdn_lbiasgen
Vrefr_Lo
VMIDSEL
Pdn_Vrefbuf
Reg. 02
adc_DigPDN
dac_DigPDN
adc_stm_rst
dac_stm_rst
ADCDLL_PDN
DACDLL_PDN
adcVref_PDN
dacVref_PDN
int1LP
Reg. 03
Pdn_AINL
Pdn_AINR
Pdn_ADCL
Pdn_ADCR
Pdn_MICB
Pdn_ADCBiasgen
flashLP
Reg. 04
Pdn_DACL
Pdn_DACR
LOUT1
ROUT1
LOUT2
ROUT2
MONO
OUT3
Reg. 05
LPDACL
LPDACR
LPLOUT1
LPROUT1
LPLOUT2
LPROUT2
LPMONO
LPOUT3
Reg. 06
LPPGA
LPLMIX
LPRMIX
LPMMIX
LPMOUTINV
LPOUT2INV
LPADCvrp
LPDACvrp
VSEL
Reg. 07
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
8
PA5750
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
ANALOG PRODUCTS DIVISION
Reg. 08
B7
B6
MSC
MCLKDIV2
DS
RDCM
MONOMIX
ADCLRP
ADC-invR
ADCRampRate
TRI
ADC_HPF_R
ADCSoftRamp
ADCZeroCrs
ADCLeR
ADCGainL(LADCVOL)
Reg. 17
ADCGainR(RADCVOL)
MAXGAIN
ALCMODE
ALCZC
DACLRSWAP
DACLRP
ALCATK
TIME_OUT
NGG
DACWL
DACRampRate
DAC SoftRamp
NGAT
DACFORMAT
DACFsMode
Reg. 24
DACFsRatio
DACZeroCrs
DACLeR
DACMute
AutoMute
DACVolumeL (LDACVOL)
Reg. 26
DACVolumeR (RDACVOL)
Reg. 27
Reg. 29
WIN_SIZE
NGTH
Reg. 22
Reg. 28
MINGAIN
ALCHLD
ALCDCY
Reg. 20
Reg. 25
ADCMute
ALCLVL
Reg. 19
Reg. 23
ADCFORMAT
ADCFsRatio
ADC_HPF_L
ALCSEL
OC
ADCWL
Reg. 16
Reg. 18
B0
BCLKDIV
ADC_FsMode
ADC_invL
B1
RPGAgain
LDCM
Reg. 13
Reg. 21
B2
RINSEL
DATSEL
Reg. 12
Reg. 15
B3
BCLK_INV
LINSEL
Reg. 10
Reg. 14
B4
LPGAgain
Reg. 09
Reg. 11
B5
DeemphasisMode
ZeroL
DAC_invL
ZeroR
DAC_invR
Mono
ClickFree
SE_strength
Vpp_scale
Shelving_a[29:24}
Reg. 30
Reg. 31
Shelving_a[23:16}
Reg. 32
Shelving_a[15:8}
Reg. 33
Shelving_a[7:0}
Shelving_b[29:24}
Reg. 34
Reg. 35
Shelving_b[23:16}
Reg. 36
Shelving_b[15:8}
Shelving_b[7:0}
Reg. 37
LMIXSEL
Reg. 38
Reg. 39
LD2LO
LI2LO
LI2LOVOL
Reg. 40
RD2LO
RI2LO
RI2LOVOL
Reg. 41
LD2RO
LI2RO
LI2ROVOL
Reg. 42
RD2RO
RI2RO
RI2ROVOL
Reg. 43
LD2MO
LI2MO
LI2MOVOL
Reg. 44
RD2MO
RI2MO
RI2MOVOL
Reg. 45
ROUT2INV
OUT3SW
VROI
RMIXSEL
HPSWEN
HPSWPOL
Reg. 46
LOUT1VOL
Reg. 47
ROUT1VOL
Reg. 48
LOUT2VOL
Reg. 49
ROUT2VOL
MOUTINV
MONOOUTVOL
Reg. 50
Reg. 51
hpLout1_ref1
hpLout1_ref2
hpRout1_ref1
hpRout1_ref2
hpOut3_ref1
hpOut3_ref2
hpMono_ref1
hpMono_ref2
Reg. 52
spkLout2_ref1
spkLout2_ref2
spkRout2_ref1
spkLout2_ref2
mixer_ref1
mixer_ref2
MREF1
MREF2
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
9
PA5750
ANALOG PRODUCTS DIVISION
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
6.1 Chip Control and Power Management
6.1.1. Register0 - Chip Control 1, Default 0000 0110
Bit Name
Bit Description
SCPReset
7
LRCM
6
DACMCLK
5
SameFs
4
SeqEn
3
EnRef
2
VMIDSEL
0 – Normal (Default).
1 – Reset control Port Register to Default.
0 – ALRCK disabled when both ADC disabled; DLRCK disabled when both DAC disabled (default).
1 – ALRCK and DLRCK disabled when all ADC and DAC disabled.
0 – when SameFs-1, ADCMCLK is the chip master clock source (default).
1 – when SameFs=1, DACMCLK is the chip master clock source.
0 – ADC Fs differs from DAC Fs (default).
1 – ADC Fs is the same as DAC Fs.
0 – internal up/down sequence disable (default)
1 – internal up/down sequence enable.
0 – disable reference.
1 – enable reference (default).
00 – VMID disabled.
01 – 50kΩ divider enabled.
10 – 500kΩ divider enabled (default).
11 – 5 kΩ divider enabled.
1:0
6.1.2. Register1 – Chip Control 2, Default 0001 1100
Bit Name
Bit Description
TSDEN
7
PdnOC
6
LPVcmMOD
5
LPVrefBuf
4
PdnAna
3
Pdanlbiasgen
2
VrefLo
1
PdnVrefbuf
0
0 – thermal shutdown disabled (default).
1 – thermal shutdown enabled.
0 – over current shutdown disabled (default).
1 – over current shut down enabled.
0 – normal (default).
1 – low power.
0 – normal.
1 – low power (default).
0 – normal.
1 – entire analog power down (default).
0 – normal.
1 – ibiasgen power down(default).
0 – normal (default).
1 – low power.
0 – normal (default).
1 – low power.
6.1.3. Register2 – Chip Power Management, Default 1100 0011.
Bit Name
Bit Description
adc_DigPDN
7
dac_DigPDN
6
adc_stm_rst
5
dac_stm_rst
4
ADCDLL_PDN
3
DACDLL_PDN
2
adcVref_PDN
1
dacVref_PDN
0
0 – normal.
1 – resets ADC DEM, filter and serial DATA port (default).
0 – normal.
1 – resets DAC DSM, DEM, filter and serial DATA port (default).
0 – normal (default).
1 – reset ADC state machine to power down state.
0 – normal (default).
1 – reset DAC state machine to power down state.
0 – normal (default).
1 – ADC_DLL power down, stop ADC clock.
0 – normal (default).
1 – DAC_DLL power down, stop DAC clock
0 – ADC analog reference power up.
1 – ADC analog reference power down (default).
0 – DAC analog reference power up.
1 – DAC analog reference power down (default).
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
10
PA5750
ANALOG PRODUCTS DIVISION
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
6.1.4. Register3 – ADC Power Management, Default 1111 1100
Bit Name
Bit Description
PdnAINL
7
PdnAINR
6
PdnADCL
5
PdnADCR
4
PdnMICB
3
PdnADCBiasgen
2
flashLP
1
int1LP
0
0 – normal.
1 – left analog input power down (default).
0 – normal.
1 – right analog input power down(default).
0 – left ADC power up.
1 – left ADC power down (default).
0 – right ADC power up.
1 – right ADC power down (default).
0 – microphone bias power on.
1 – microphone bias power down (high impedance output default).
0 – normal.
1 – power down (default)
0 – normal (default)
1 – flash ADC low power.
0 – normal (default)
1 – int1 low power.
6.1.5. Register4 – DAC Power Management, Default 1100 0000
Bit Name
Bit Description
PdnDACL
7
PdnDACR
6
LOUT1
5
ROUT1
4
LOUT2
3
ROUT2
2
MONO
1
OUT3
0
0 – left DAC power up.
1 – left DAC power down (default).
0 – right DAC power up.
1 – right DAC power down(default).
0 – LOUT1 disabled (default).
1 – LOUT1 enabled.
0 – ROUT1 disabled (default).
1 – ROUT1 enabled.
0 – LOUT2 disabled (default).
1 – LOUT2 enabled.
0 – ROUT2 disabled (default).
1 – ROUT2 enabled.
0 – MOUT disabled (default).
1 – MOUT enabled.
0 – OUT3 disabled (default).
1 – OUT3 enabled.
6.1.6. Register5 – Chip Low Power 1, Default 0000 0000
Bit Name
Bit Description
LPDACL
7
LPDACR
6
LPLOUT1
5
LPROUT1
4
LPLOUT2
3
LPROUT2
2
LPMONO
1
LPOUT3
0
0 – normal (default).
1 – low power.
0 – normal (default).
1 – low power.
0 – normal (default).
1 – low power.
0 – normal (default).
1 – low power.
0 – normal (default).
1 – low power.
0 – normal (default).
1 – low power.
0 – normal (default).
1 – low power.
0 – normal (default).
1 – low power.
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
11
PA5750
ANALOG PRODUCTS DIVISION
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
6.1.7. Register6 – Chip Low Power 2, Default 0000 0000
Bit Name
Bit Description
LPPGA
7
LPLMIX
6
LPRMIX
5
LPMMIX
4
LPMOUTINV
3
LPOUT2INV
2
LPADCvrp
1
LPDACvrp
0
0 – normal (default).
1 – low power.
0 – normal (default).
1 – low power.
0 – normal (default).
1 – low power.
0 – normal (default).
1 – low power.
0 – normal (default).
1 – low power.
0 – normal (default).
1 – low power.
0 – normal (default).
1 – low power.
0 – normal (default).
1 – low power.
6.1.8. Register7 – Analog Voltage Management, Default 0111 1100
Bit Name
Bit Description
VSEL
6:0 1111100 – normal (default).
6.1.9. Register8 – Master Mode Control, Default 1000 0000
Bit Name
Bit Description
MSC
7
MCLKDIV2
6
BCLK_INV
5
BCLKDIV
4:0
0 – slave serial port.
1 – master serial port (default).
0 – MCLK not divided (default).
1 – MCLK divide by 2.
0 – normal (default).
1 – BCLK inverted.
00000 – master mode BCLK generated automatically based on clock table (default).
others – MCLK/N, N=1~31.
6.2. ADC Control
6.2.1. Register9 – ADC Control 1, Default 0000 0000
Bit Name
Bit Description
Left Channel PGA gain.
MicAmpL
7:4
MicAmpR
3:0
0000 – 0dB (default).
0001 - +3dB
0010 - +6dB
0011 - +9dB
0100 - +12dB
0101 - +15dB
0110 - +18dB
0111 - +21dB
1000 - +24dB
Right Channel PGA gain.
0000 – 0dB (default).
0001 - +3dB
0010 - +6dB
0011 - +9dB
0100 - +12dB
0101 - +15dB
0110 - +18dB
0111 - +21dB
1000 - +24dB
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
12
PA5750
ANALOG PRODUCTS DIVISION
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
6.2.2. Register10 – ADC Control 2, Default 0000 0000
Bit Name
Bit Description
Left channel input select.
LINSEL
7:6
RINSEL
5:4
00 – LINPUT1 (default).
01 – LINPUT2
10 – LINPUT3
11 – L-R differential (either LINPUT1 – RINPUT1 or LINPUT2 – RINPUT2, selected by DS)
Right channel input select.
00 – RINPUT1 (default).
01 – RINPUT2
10 – RINPUT3
11 – L-R differential (either LINPUT1 – RINPUT1 or LINPUT2 – RINPUT2, selected by DS)
6.2.3. Register11 – ADC Control 3, Default 0000 0110
Bit Name
Bit Description
DS
7
LDCM
6
RDCM
5
MONOMIX
4:3
TRI
2
OC
1:0
Differential Input Select
0 – LINPUT1 – RINPUT1 (default).
1 – LINPUT2 – RINPUT2.
0 – normal (default)
1 – Left Channel used for DC Measuement
0 – normal (default)
1 – Right Channel used for DC Measuement
00 – stereo (default).
01 – analog mono mix to left ADC.
10 – analog mono mix to right ADC.
11 - reserved
0 – ASDOUT is ADC normal output (default).
1 – ASDOUT tri-stated, ALRCK, DLRCK and SCLK are inputs.
00 – normal over current setting (default)
6.2.4. Register12 – ADC Control 4, Default 0000 0000
Bit Name
Bit Description
DATSEL
7:6
ADCLRP
5
ADCWL
4:2
ADCFORMAT
1:0
00 - left DATA = left ADC, right DATA = right ADC
01 - left DATA = left ADC, right DATA = left ADC
10 - left DATA = right ADC, right DATA = right ADC
11 - left DATA = right ADC, right DATA = left ADC
I2S, left justified or right justified mode:
0 – left and right normal polarity.
1 – left and right inverted polarity.
DSP/PCM mode:
0 – MSB is available on 2nd BCLK rising edge after ALRCK rising edge
st
1 – MSB is available on 1 BCLK rising edge after ALRCK rising edge
000 – 24-bit serial audio DATA word length.
001 – 20-bit serial audio DATA word length
010 – 18-bit serial audio DATA word length
011 – 16-bit serial audio DATA word length
100 – 32-bit serial audio DATA word length
00 – I2C serial audio DATA format
01 – left justify serial audio DATA format
10 – right justify serial audio DATA format
11 – DSP/PCM mode serial audio DATA format.
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
13
PA5750
ANALOG PRODUCTS DIVISION
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
6.2.5. Register13 – ADC Control 5, Default 0000 0110
Bit Name
Bit Description
ADC_FsMode
5
ADC_FsRatio
4:0
0 – single speed mode (default)
1 – double speed mode.
Master mode ADC MCLK to sampling frequency ratio:
00000 -128
10000 - 125
00001 – 192
10001 - 136
00010 – 256
10010 - 250
00011 – 384
10011 - 272
00100 – 512
10100 - 375
00101 – 576
10101 - 500
00110 – 768 (default)
10110 - 544
00111 – 1024
10111 - 750
01000 – 1152
11000 - 1000
01001 – 1408
11001 - 1088
01010 – 1536
11010 - 1496
01011 – 2112
11011 - 1500
01100 – 2304
Other – Reserved.
6.2.6. Register14 – ADC Control 6, Default 0011 0000
Bit Name
Bit Description
ADC_invL
7
ADC_invR
6
ADC_HP_L
5
ADC_HP_R
4
0 – normal (default).
1 – left channel polarity inverted.
0 – normal (default).
1 – right channel polarity inverted.
0 – disable ADC left channel high pass filter.
1 – enable ADC left channel high pass filter (default).
0 – disable ADC right channel high pass filter.
1 – enable ADC right channel high pass filter (default).
6.2.7. Register15 – ADC Control 7, Default 0011 0000
Bit Name
Bit Description
ADCRampRate
7:6
ADCSoftRamp
5
ADCZeroCrs
4
ADCLeR
3
ADCMute
2
00 – 0.5dB per 4 LRCK digital volume control ramp rate (default).
01 – 0.5dB per 8 LRCK digital volume control ramp rate.
10 – 0.5dB per 16 LRCK digital volume control ramp rate.
11 – 0.5dB per 32 LRCK digital volume control ramp rate.
0 – disable digital volume control soft ramp.
1 – enable digital volume control soft ramp (default)
0 – disable digital volume control at zero crossing.
1 – enable digital volume control at zero crossing (default).
0 – normal (default)
1 – both channel gain control is set by ADC left gain control register
0 – normal (default).
1 – mute ADC digital output.
6.2.8. Register16 – ADC Control 8, Default 1100 0000
Bit Name
Bit Description
LADCVOL
7:0
Digital volume control attenuates the signal in 0.5dB increments from 0 to -96dB
00000000 – 0dB.
00000001 – -0.5dB
00000010 - -1dB
……………….
11000000 - -96dB (default).
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
14
PA5750
ANALOG PRODUCTS DIVISION
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
6.2.9. Register17 – ADC Control 9, Default 1100 0000
Bit Name
Bit Description
RADCVOL
7:0
Digital volume control attenuates the signal in 0.5dB increments from 0 to -96dB
00000000 – 0dB.
00000001 – -0.5dB
00000010 - -1dB
……………….
11000000 - -96dB (default).
6.2.10. Register18 – ADC Control 10, Default 0011 1000
Bit Name
Bit Description
ALSEL
7:6
MAXGAIN
5:3
MINGAIN
2:0
00 – ALC off
01 – ALC right channel only
10 – ALC left channel only
11 – ALC stereo
Set maximum gain of PGA
000 - -6.5dB
001 - -0.5dB
010 – 5.5dB
011 – 11.5dB
100 – 17.5dB
101 – 23.5dB
110 – 29.5dB
111 – 35.5dB
Set minimum gain of PGA
000 - -12dB
001 - -6dB
010 – 0dB
011 – +6dB
100 – +12dB
101 – +18dB
110 – +24dB
111 – +30dB
6.2.11. Register19 – ADC Control 11, Default 1011 0000
Bit Name
Bit Description
ALCLVL
7:4
ALCHLD
3:0
ALC target
0000 - -25dBFS
0001 - -21.0bDFS
………..
1100 - -4.5dBFS
1101 - -3dBFS
1110 - -1.5dBFS
1111 - -1.5dBFS
AFC hold time before gain is increased
0000 – 0mS
0001 – 2.67mS
0010 – 5.33mS
……time doubles with every step
1001 – 0.68S
1010 or higher – 1.36S
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
15
PA5750
ANALOG PRODUCTS DIVISION
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
6.2.12. Register20 – ADC Control 12, Default 0011 0010
Bit Name
Bit Description
ALCDCY
7:4
ALCATK
3:0
ALC decay (gain ramp up) time, ALC mode/limiter mode:
0000 – 410 µS/90.8 µS
0001 – 820 µS/182 µS
0010 – 1.64 mS/363 µS
………. time doubles with every step.
1001 – 210 mS/182 µS
1010 or higher – 420 mS
ALC attack (gain ramp down) time, ALC mode/limiter mode:
0000 – 104 µS/22 µS
0001 – 208 µS/45.4 µS
0010 – 416 µS/90 µS
……time doubles with every step
1001 – 53.2 mS/11.6 mS
1010 or higher – 106 mS/23.2 mS
6.2.13. Register21 – ADC Control 13, Default 0000 0110
Bit Name
Bit Description
ALCMODE
7
ALCZC
6
TIME_OUT
5
WIN_SIZE
4:0
Determines the ALC mode of operation:
0 – ALC mode (normal operation)
1 – limiter mode
ALC uses zero cross detection circuit.
0 – disable (recommended).
1 - enable
Zero Cross time out:
0 – disable (default)
1 – enable.
window size for peak detector, ste the window size to N*16 samples:
00110 – 96 samples (default)
00111 – 102 samples
……
11111 – 496 samples
6.2.14. Register22 – ADC Control 14, Default 0000 0000
Bit Name
Bit Description
NGTH
7:3
NGG
2:1
NGAT
0
Noise gate threshold:
00000 – -76.5dBFS.
00001 - -75dBFS.
……
11110 - -31.5dBFS.
11111 - -30dBFS.
Noise gate type.
x0 – PGA gain held constant.
01 – mute ADC output.
11 – reserved.
Zero Cross time out:
0 – disable (default)
1 – enable.
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
16
PA5750
ANALOG PRODUCTS DIVISION
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
6.3 DAC Control
6.3.1. Register23 – DAC Control 1, Default 0000 0000
Bit Name
Bit Description
DACLRSWAP
7
DACLRP
6
DACWL
5:3
DACFORMAT
2.1
0 – normal.
1 – left and right channel DATA swap.
I2S, left justified or right justified mode.
0 – left and right normal polarity.
1 – left and right inverted polarity.
DSP/PCM mode.
0 – MSB is available on 2nd BCLK rising edge after ALRCL rising edge.
st
1 – MSB is available on 1 BCLK rising edge after ALRCK rising edge LRCK polarity.
000 – 24-bit serial audio DATA word length.
001 – 20-bit serial audio DATA word length.
010 – 18-bit serial audio DATA word length.
011 – 16-bit serial audio DATA word length.
100 – 32-bit serial audio DATA word length.
00 – I2S serial audio DATA format.
01 – left justify serial audio DATA format.
10 – right justify serial audio DATA format.
11 – DSP/PCM mode serial audio DATA format.
6.3.2. Register24 – DAC Control 2, Default 0000 0110
Bit Name
Bit Description
DAC_FsMode
DACFsRatio
5
4:0
0 – single speed mode (default)
1 – double speed mode.
Master mode ADC MCLK to sampling frequency ratio:
00000 -128
10000 - 125
00001 – 192
10001 - 136
00010 – 256
10010 - 250
00011 – 384
10011 - 272
00100 – 512
10100 - 375
00101 – 576
10101 - 500
00110 – 768 (default)
10110 - 544
00111 – 1024
10111 - 750
01000 – 1152
11000 - 1000
01001 – 1408
11001 - 1088
01010 – 1536
11010 - 1496
01011 – 2112
11011 - 1500
01100 – 2304
Other – Reserved.
6.3.3. Register25 – DAC Control 3, Default 0011 0000
Bit Name
Bit Description
DACRampRate
7:6
DACSoftRamp
5
DACZeroCrs
4
DACLeR
3
DACMute
2
AutoMute
1
00 – 0.5dB per 4 LRCK digital volume control ramp rate (default).
01 – 0.5dB per 8 LRCK digital volume control ramp rate.
10 – 0.5dB per 16 LRCK digital volume control ramp rate.
11 – 0.5dB per 32 LRCK digital volume control ramp rate.
0 – disable digital volume control soft ramp.
1 – enable digital volume control soft ramp (default)
0 – disable digital volume control at zero crossing.
1 – enable digital volume control at zero crossing (default).
0 – normal (default)
1 – both channel gain control is set by DAC left gain control register
0 – normal (default).
1 – mute analog outputs for both channels.
0 – disable.
1 – enable (default).
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
17
PA5750
ANALOG PRODUCTS DIVISION
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
6.3.4. Register26 – DAC Control 4, Default 1100 0000
Bit Name
Bit Description
LDACVOL
7:0
Digital volume control attenuates the signal in 0.5dB increments from 0 to -96dB
00000000 – 0dB.
00000001 – -0.5dB
00000010 - -1dB
……………….
11000000 - -96dB (default).
6.3.5. Register27 – DAC Control 5, Default 1100 0000
Bit Name
Bit Description
RDACVOL
7:0
Digital volume control attenuates the signal in 0.5dB increments from 0 to -96dB
00000000 – 0dB.
00000001 – -0.5dB
00000010 - -1dB
……………….
11000000 - -96dB (default).
6.3.6. Register28 – DAC Control 6, Default 0000 1000
Bit Name
Bit Description
DeemphasisMode
(DEEMP)
7:6
DAC_invL
5
DAC_invR
4
ClickFree
3
00 – de-emphasis frequency disabled (default)
01 – 32 kHz de-emphasis frequency in single speed mode.
10 – 44 kHz de-emphasis frequency in single speed mode.
11 – 48 kHz de-emphasis frequency in single speed mode.
0 – normal DAC left channel output no phase inversion (default)
1 – normal DAC left channel output 180° phase inversion.
0 – normal DAC right channel output no phase inversion (default)
1 – normal DAC right channel output 180° phase inversion.
0 – disable digital click free power up and down.
1 – enable digital click free power up and down (default).
6.3.7. Register29 – DAC Control 7, Default 0000 0110
Bit Name
Bit Description
ZeroL
7
ZeroR
6
Mono
5
SE_Strength
4:2
Vpp_scale
1:0
0 – normal (default)
1 – set Left Channel DAC output all zero.
0 – normal (default)
1 – set Right Channel DAC output all zero.
0 – normal (default)
1 – mono (L+RE)/2 into DACL and DACR.
SE Strength, total 8 settings, L=L+(L-R)*a, R=R+(R-L)*a, where a is from 0 to 7/8
000 – 0 (default)
…….
111 – 7/8
00 – Vpp set at 3.5V (0.7 modulation index) (default).
01 – Vpp set at 4.0V
10 – Vpp set at 3.0V
11 – Vpp set at 2.5V
6.3.8. Register30 – DAC Control 8, Default 0001 1111
Bit Name
Bit Description
Shelving_a[29:24]
5:0
30-bit a coefficient for shelving filter
Default value is {5’h0f, 5’h1f, 5’h0f, 5’h1f, 5’h0f, 5’h1f}.
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
18
PA5750
ANALOG PRODUCTS DIVISION
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
6.3.9. Register31 – DAC Control 9, Default 1111 0111
Bit Name
Bit Description
Shelving_a[23:16]
7:0
30-bit a coefficient for shelving filter
Default value is {5’h0f, 5’h1f, 5’h0f, 5’h1f, 5’h0f, 5’h1f}.
6.3.10. Register32 – DAC Control 10, Default 1111 0111
Bit Name
Bit Description
Shelving_a[15:8]
7:0
30-bit a coefficient for shelving filter
Default value is {5’h0f, 5’h1f, 5’h0f, 5’h1f, 5’h0f, 5’h1f}.
6.3.11. Register33 – DAC Control 11, Default 1111 1111
Bit Name
Bit Description
Shelving_a[7:0]
7:0
30-bit a coefficient for shelving filter
Default value is {5’h0f, 5’h1f, 5’h0f, 5’h1f, 5’h0f, 5’h1f}.
6.3.12. Register34 – DAC Control 12, Default 0001 1111
Bit Name
Bit Description
Shelving_b[29:24]
5:0
30-bit a coefficient for shelving filter
Default value is {5’h0f, 5’h1f, 5’h0f, 5’h1f, 5’h0f, 5’h1f}.
6.3.13. Register35 – DAC Control 13, Default 1111 0111
Bit Name
Bit Description
Shelving_b[23:16]
7:0
30-bit a coefficient for shelving filter
Default value is {5’h0f, 5’h1f, 5’h0f, 5’h1f, 5’h0f, 5’h1f}.
6.3.14. Register36 – DAC Control 14, Default 1111 1101
Bit Name
Bit Description
Shelving_b[15:8]
7:0
30-bit a coefficient for shelving filter
Default value is {5’h0f, 5’h1f, 5’h0f, 5’h1f, 5’h0f, 5’h1f}.
6.3.15. Register37 – DAC Control 15, Default 1111 1111
Bit Name
Bit Description
Shelving_b[7:0]
7:0
30-bit a coefficient for shelving filter
Default value is {5’h0f, 5’h1f, 5’h0f, 5’h1f, 5’h0f, 5’h1f}.
6.3.16. Register38 – DAC Control 16, Default 0000 0000
Bit Name
Bit Description
Left input select for output mix.
LMIXSEL
5:3
RMIXSEL
2:0
00 – LIN1 (default).
01 – LIN2
10 – LIN3
11 – left ADC input (after microphone amplifier)
Right input select for output mix.
00 – RIN1 (default).
01 – RIN2
10 – RIN3
11 – right ADC input (after microphone amplifier)
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
19
PA5750
ANALOG PRODUCTS DIVISION
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
6.3.17. Register39 – DAC Control 17, Default 0011 1000
Bit Name
Bit Description
0 – left DAC to left mixer disable (default).
LD2LO
7
LI2LO
6
LI2LOVOL
5:3
1 – left DAC to left mixer enable
0 – LIN signal to left mixer disable (default).
1 – LIN signal to left mixer enable
LIN signal to left mixer gain.
000 – 6dB.
001 – 3dB.
010 – 0dB.
011 – -3dB.
100 – -6dB.
101 – -9dB.
110 – -12dB.
111 – -15dB (default).
6.3.18. Register40 – DAC Control 18, Default 0011 1000
Bit Name
Bit Description
0 – right DAC to left mixer disable (default).
RD2LO
7
RI2LO
6
RI2LOVOL
5:3
1 – right DAC to left mixer enable
0 – RIN signal to left mixer disable (default).
1 – RIN signal to left mixer enable
RIN signal to left mixer gain.
000 – 6dB.
001 – 3dB.
010 – 0dB.
011 – -3dB.
100 – -6dB.
101 – -9dB.
110 – -12dB.
111 – -15dB (default).
6.3.19. Register41 – DAC Control 19, Default 0011 1000
Bit Name
Bit Description
0 – left DAC to right mixer disable (default).
LD2RO
7
LI2RO
6
LI2ROVOL
5:3
1 – left DAC to right mixer enable
0 – LIN signal to right mixer disable (default).
1 – LIN signal to right mixer enable
LIN signal to right mixer gain.
000 – 6dB.
001 – 3dB.
010 – 0dB.
011 – -3dB.
100 – -6dB.
101 – -9dB.
110 – -12dB.
111 – -15dB (default).
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
20
PA5750
ANALOG PRODUCTS DIVISION
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
6.3.20. Register42 – DAC Control 20, Default 0011 1000
Bit Name
Bit Description
0 – right DAC to right mixer disable (default).
RD2RO
7
RI2RO
6
RI2ROVOL
5:3
1 – right DAC to right mixer enable
0 – RIN signal to right mixer disable (default).
1 – RIN signal to right mixer enable
RIN signal to right mixer gain.
000 – 6dB.
001 – 3dB.
010 – 0dB.
011 – -3dB.
100 – -6dB.
101 – -9dB.
110 – -12dB.
111 – -15dB (default).
6.3.21. Register43 – DAC Control 21, Default 0011 1000
Bit Name
Bit Description
0 – left DAC to mono mixer disable (default).
LD2MO
7
LI2MO
6
LI2MOVOL
5:3
1 – left DAC to mono mixer enable
0 – LIN signal to mono mixer disable (default).
1 – LIN signal to mono mixer enable
LIN signal to mono mixer gain.
000 – 6dB.
001 – 3dB.
010 – 0dB.
011 – -3dB.
100 – -6dB.
101 – -9dB.
110 – -12dB.
111 – -15dB (default).
6.3.22. Register44 – DAC Control 22, Default 0011 1000
Bit Name
Bit Description
0 – right DAC to right mixer disable (default).
RD2MO
7
RI2MO
6
RI2MOVOL
5:3
1 – right DAC to right mixer enable
0 – RIN signal to right mixer disable (default).
1 – RIN signal to right mixer enable
RIN signal to mono mixer gain.
000 – 6dB.
001 – 3dB.
010 – 0dB.
011 – -3dB.
100 – -6dB.
101 – -9dB.
110 – -12dB.
111 – -15dB (default).
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
21
PA5750
ANALOG PRODUCTS DIVISION
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
6.3.23. Register45 – DAC Control 23, Default 0000 0000
Bit Name
Bit Description
0 – ROUT2 no inversion (default).
ROUT2INV
7
OUT3SW
6:5
VROI
4
HPSWEN
3
HPSWPOL
2
MOUTINV
1
1 – ROUT2 signal inverted
OUT3 select
00 – VREF (default).
01 – ROUT1 signal (volume controlled by ROUT1VOL)
10 – MONOOUT
11 – right mixer output ( no volume controlled by ROUT1VOL)
0 – 1.5k VREF to analog output resistance (default)
1 – 40k VREF to analog output resistance
0 – headphone switch disabled (default)
1 – headphone switch enabled
0 – HPDETECT high = headphone (default)
1 – HPDETECT high = speaker
0 – MOUT no inversion (default).
1- MOUT signal inverted
6.3.24. Register46 – DAC Control 24, Default 0000 0000
Bit Name
Bit Description
LOUT1 volume
LOUT1VOL
5:0
000000 - -30dB (default).
000001 - -29dB
000010 - -28dB
……..
011110 – 0dB
011111 – 1dB
…….
100100 – 6dB
6.3.25. Register47 – DAC Control 25, Default 0000 0000
Bit Name
Bit Description
ROUT1 volume
ROUT1VOL
5:0
000000 - -30dB (default).
000001 - -29dB
000010 - -28dB
……..
011110 – 0dB
011111 – 1dB
…….
100100 – 6dB
6.3.26. Register48 – DAC Control 26, Default 0000 0000
Bit Name
Bit Description
LOUT2 volume
LOUT2VOL
5:0
000000 - -30dB (default).
000001 - -29dB
000010 - -28dB
……..
011110 – 0dB
011111 – 1dB
…….
100100 – 6dB
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
22
PA5750
ANALOG PRODUCTS DIVISION
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
6.3.27. Register49 – DAC Control 27, Default 0000 0000
Bit Name
Bit Description
ROUT2 volume
ROUT2VOL
5:0
000000 - -30dB (default).
000001 - -29dB
000010 - -28dB
……..
011110 – 0dB
011111 – 1dB
…….
100100 – 6dB
6.3.28. Register50 – DAC Control 28, Default 0000 0000
Bit Name
Bit Description
MONOOUT volume
MONOOUTVOL 5:0
000000 - -30dB (default).
000001 - -29dB
000010 - -28dB
……..
011110 – 0dB
011111 – 1dB
…….
100100 – 6dB
6.3.29. Register51 – DAC Control 29, Default 0000 0000
Bit Name
Bit Description
hpLout_ref1
7
Reserved
hpLout_ref2
6
Reserved
hpRout_ref1
5
Reserved
hpRout_ref2
4
Reserved
hpOut3_ref1
3
Reserved
hpOut3_ref2
2
Reserved
hpMono_ref1
1
Reserved
hpMono_ref2
0
Reserved
6.3.30. Register52 – DAC Control 30, Default 0000 0000
Bit Name
Bit Description
spkLout_ref1
7
Reserved
spkLout_ref2
6
Reserved
spkRout_ref1
5
Reserved
spkRout_ref2
4
Reserved
spkOut3_ref1
3
Reserved
spkOut3_ref2
2
Reserved
spkMono_ref1
1
Reserved
spkMono_ref2
0
Reserved
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
23
PA5750
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
ANALOG PRODUCTS DIVISION
7. Digital Audio Interface.
The PA5750 provides four formats of serial DATA interface to the input of the DAC through LRCK, SCLK and
SDIN/SDOUT pins.
They are I2S, left justified, right justified and DSP/PCM mode. DAC input DSDIN is sampled by PA5750 on the
rising edge of DSCLK. ADC DATA is moved out on ASDOUT and changes on the falling edge od ASCLK. The
relation of SDATA (SDIN/SDOUT), SCLK and LRCK with the three formats is shown in Fig. 3 through Fig. 7.
1 SCLK
1
SDATA
1 SCLK
2
n-2
3
n-1
MSB
n
1
LSB
MSB
2
n-2
3
n-1
n
LSB
SCLK
LEFT CHANNEL
LRCK
RIGHT CHANNEL
Fig. 3 I2S Serial Audio DATA Format up to 24-bit
SDATA
1
2
n-2
3
n-1
1
n
LSB
MSB
2
n-2
3
n
n-1
LSB
MSB
SCLK
LRCK
LEFT CHANNEL
RIGHT CHANNEL
Fig. 4 Left Justified Serial Audio DATA Format up to 24-bit
SDATA
1
2
MSB
3
n-2
n-1
n
LSB
1
2
3
MSB
n-2
n-1
n
LSB
SCLK
LRCK
LEFT CHANNEL
RIGHT CHANNEL
Fig. 5 Right Justified Serial Audio DATA Format up to 24-bit
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
24
PA5750
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
ANALOG PRODUCTS DIVISION
1 SCLK
LRCK
SCLK
LEFT CHANNEL
1
SDATA
2
RIGHT CHANNEL
n-2
3
n-1
n
1
2
3
n-2
n-1
n-1
n
n
LSB
MSB
Fig. 6 DSP/PCM Mode A
1 SCLK
LRCK
SCLK
LEFT CHANNEL
SDATA
1
2
3
RIGHT CHANNEL
n-2
n
n-1
MSB
1
2
3
n-2
LSB
Fig. 7 DSP/PCM Mode B
8. ELECTRCAL CHARACTERISTICS.
8.1. Absolute Maximum Ratings
Continuous operation at or beyond these conditions may permanently damage the device.
PARAMETER
Analog Supply Voltage
Digital Supply Voltage
Input Voltage Range
Operating Temperature Range
Storage Temperature Range
MINIMUM
-0.3V
-0.3V
DGND – 0.3V
-40°C
-65°C
MAXIMUM
+5.0V
+5.0V
DVDD + 0.3V
+80°C
+150°C
8.2 Recommended Operating Conditions
PARAMETER
Analog Supply Voltage
Digital Supply Voltage
MIN
1.7
1.5
TYP
3.3
1.8
MAX
3.6
3.6
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
UNIT
V
V
25
PA5750
ANALOG PRODUCTS DIVISION
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
8.3. ADC Analog and Filter Characteristics and Specifications
Test Conditions are as follows unless otherwise specified.
AVDD = +3.3V, DVDD = +1.8V, AGND = 0V, DGND = 0V, Ambient 25°C, Fs = 48, 96 or 192 kHz, MCLK/LRCK = 256.
PARAMETER
MIN
TYP
MAX
UNIT
Dynamic Range (note 1)
82
92
95
dB
THD+N
-88
-85
-75
dB
Channel Separation (1 kHz)
80
85
90
dB
Signal to Noise Ration
82
92
95
dB
ADC Performance
Interchannel Gain Mismatch
01
Gain Error
dB
±5
%
0.4535
Fs
Filter Frequency Response – Single Speed
Passband
0
Stopband
0.5465
Fs
Passband Ripple
Stopband Attenuation
±0.05
50
dB
dB
Filter Frequency Response – Double Speed
Passband
0
Stopband
0.5833
0.4167
Fs
Passband Ripple
Stopband Attenuation
Fs
±0.005
50
dB
dB
Analog Input
Full Scale Input Level
Input Impedance
AVDD/3.3
VRMS
20
KΩ
Note.1; Measured using A-weighted filter.
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
26
PA5750
ANALOG PRODUCTS DIVISION
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
8.4. DAC Analog and Filter Characteristics and Specifications
Test Conditions are as follows unless otherwise specified.
AVDD = +3.3V, DVDD = +1.8V, AGND = 0V, DGND = 0V, Ambient 25°C, Fs = 48, 96 or 192 kHz, MCLK/LRCK = 256.
PARAMETER
MIN
TYP
MAX
UNIT
Dynamic Range (note 1)
83
93
98
dB
THD+N
-85
-81
-75
dB
Channel Separation (1 kHz)
80
85
90
dB
Signal to Noise Ration
83
93
98
dB
DAC Performance
Interchannel Gain Mismatch
0.05
dB
Filter Frequency Response – Single Speed
Passband
0
Stopband
0.5465
0.4535
Fs
Passband Ripple
Stopband Attenuation
Fs
±0.05
40
dB
dB
Filter Frequency Response – Double Speed
Passband
0
Stopband
0.5833
0.4167
Fs
Passband Ripple
Stopband Attenuation
Fs
±0.005
40
dB
dB
De-emphasis Error at 1 kHz (Single Speed Mode Only)
Fs = 32 kHz
Fs = 44.1 kHz
Fs = 4832 kHz
0.002
0.013
0.0009
dB
Analog Output
Full Scale Output Level
AVDD/3.3
VRMS
Note.1; Measured using A-weighted filter.
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
27
PA5750
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
ANALOG PRODUCTS DIVISION
8.5. Power Consumption Characteristics
PARAMETER
MIN
TYP
MAX
UNIT
Normal Operation Mode
DVDD = 1.8V, AVDD = 1.8V
Play Back
Play Back and Record
DVDD = 3.3V, AVDD = 3.3V
Play Back
Play Back and Record
7
16
mW
31
59
Power Down Mode
DVDD = 1.8V, AVDD = 1.8V
DVDD = 3.3V, AVDD = 3.3V
0.3
1.9
mW
8.6 Serial Audio Port Switching Specifications
PARAMETER
Symbol
MCLK frequency
MCLK duty cycle
LRCK frequency
LRCK duty cycle
SCLK frequency
SCLK pulse width low
SCLK pulse width high
SCLK falling to LRCK edge
SCLK falling to SDOUT valid
SDIN valid to SCLK rising setup time
SCLK rising to SDIN hold time
MIN
40
40
TSCLKL
TSCLKH
TSLR
TSDO
TSDIS
TSDIH
15
15
-10
0
10
10
MAX
UNIT
51.2
60
200
60
26
MHz
%
kHz
%
MHz
nS
nS
nS
nS
nS
nS
10
LRCK I/P
tslr
tsclkh
tsclkl
SCLK I/P
tsclkw
tsdo
SDOUT
tsdis
tsdih
SDIN
Fig. 8 Serial Audio Port Timing
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
28
PA5750
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
ANALOG PRODUCTS DIVISION
8.7. Serial Control Port Switching Specifications
PARAMETER
Symbol
MIN
MAX
UNIT
10
MHz
SPI Mode
SPI_CLK frequency
SPI_CLK edge to SPI_CSn falling
TSPICS
5
nS
SPI_CSn High time between transmissions
TSPISH
500
nS
SPI_CSn trailing to SPI_CLK edge
TSPISC
10
nS
SPI_CLK low time
TSPICL
45
nS
SPI_CLK high time
TSPICH
45
nS
SPI_DIN to SPI_CLK rise setup time
TSPIDS
10
nS
SPI_CLK rise to DATA hold time
TSPIDH
15
nS
2-Wire Mode
SCL clock frequency
FSCL
100
kHz
BUS free time between transmissions
TTWID
4.7
µS
Start condition hold time
TTWSSTH
4.0
µS
Clock low time
TTWCL
4.0
µS
Clock high time
TTWCH
4.0
µS
Setup time for repeated start condition
TTWSTS
4.7
µS
SDA hold time from SCL falling
TTWDH
0.1
µS
SDA setup time to SCL rising
TTWDS
100
nS
Rise time of SCL
TTWR
25
µS
Fall time of SCL
TTWF
25
µS
TSPIDH
TSPID
SPI_DIN
TSPIC
SPI_CLK
TSPIC
SPI_CSn
TSPICS
TSPIS
TSPISC
Fig.9 Serial Control Port SPI Timing
SDA
TTWSTS
TTWSTH
TTWCL
TTWDH
TTWD
TTWDS
SCL
S
TTWCH
TTWF
TTWR
P
S
Fig.10 Serial Control Port 2-wire Timing
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
29
PA5750
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
ANALOG PRODUCTS DIVISION
9. PACKAGE INFORMATION
32-Pin QFN Plastic Package 5x5x0.9mm Body, 0.5mm Lead Pitch
e
C
D
24
1
d
B
17
8
Bottom View
Top View
Symbols
Dimensions (mm)
MIN
NOM
MAX
A
Side View
A
0.85
0.90
1.00
B
4.90
5.00
5.10
C
4.90
5.00
5.10
D
3.2
3.3
3.4
e
0.35
0.4
0.45
d
0.50BSC
Tape and Reel Specifications
Reel Dia
178 (7”)
A0
B0
K0
D
E
F
W
P0
P2
P
tmax
5.10±0.05
5.10±0.05
1.00±0.05
1.50±0.10
1.75±0.10
5.50±0.05
12.00±0.30
4.00±0.10
2.00±0.05
8.00±0.10
0.30
P0
D
t
10 Pitches Cumulative
Tolerance on Tape± 0.2
P2
E
Pin 1
indicated
by Dot
Top cover tape
A0
F
W
K0
B0
P
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
www.protekanalog.com
95230 Rev.0. 04/09
Not for use in any life support systems.
30