RT8250 3A, 23V, 340kHz Synchronous Step-Down Converter General Description The RT8250 is a high-efficiency synchronous step-down DC/DC converter that can deliver up to 3A output current from 4.5V to 23V input supply. The RT8250's current mode architecture and external compensation allow the transient response to be optimized over a wide range of loads and output capacitors. Cycle-by-cycle current limit provides protection against shorted outputs and soft-start eliminates input current surge during start-up. The RT8250 also provides output under voltage protection and thermal shutdown protection. The low current (<3μA) shutdown mode provides output disconnection, enabling easy power management in battery-powered systems. Ordering Information RT8250 Package Type SP : SOP-8 (Exposed Pad-Option 1) Lead Plating System G : Green (Halogen Free and Pb Free) Note : Richtek products are : ` RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. ` Suitable for use in SnPb or Pb-free soldering processes. Marking Information Features 4.5V to 23V Input Voltage Range 1.5% High Accuracy Feedback Voltage 3A Output Current Integrated N-MOSFET Switches Current Mode Control Fixed Frequency Operation : 340kHz Output Adjustable from 0.925V to 20V Up to 95% Efficiency Programmable Soft-Start Stable with Low-ESR Ceramic Output Capacitors Cycle-by-Cycle Over Current Protection Input Under Voltage Lockout Output Under Voltage Protection Thermal Shutdown Protection Thermally Enhanced SOP-8 (Exposed Pad) Package RoHS Compliant and Halogen Free Applications Industrial and Commercial Low Power Systems Computer Peripherals LCD Monitors and TVs Green Electronics/Appliances Point of Load Regulation of High-Performance DSPs, FPGAs and ASICs. Pin Configurations (TOP VIEW) RT8250GSP : Product Number RT8250 GSPYMDNN YMDNN : Date Code BOOT VIN 2 SW 3 GND 4 GND 9 8 SS 7 EN 6 COMP 5 FB SOP-8 (Exposed Pad) DS8250-05 March 2011 www.richtek.com 1 RT8250 Typical Application Circuit 2 VIN 4.75V to 23V CIN 10µFx2 REN 100k VIN 1 RT8250 7 EN 8 SS CSS 0.1µF BOOT 4, Exposed Pad(9) GND SW 3 CBOOT L1 10nF 10µH R1 26.1k FB 5 COMP 6 CC RC 3.9nF 6.8k VOUT 3.3V/3A COUT 22µFx2 R2 10k CP NC Table 1. Recommended Component Selection VOUT (V) R1 (kΩ) R2 (kΩ) RC (kΩ) CC (nF) L (μH) COUT (μF) 15 153 10 30 3.9 33 22 x 2 10 97.6 10 20 3.9 22 22 x 2 8 76.8 10 15 3.9 22 22 x 2 5 45.3 10 13 3.9 15 22 x 2 3.3 26.1 10 6.8 3.9 10 22 x 2 2.5 16.9 10 6.2 3.9 6.8 22 x 2 1.8 9.53 10 4.3 3.9 4.7 22 x 2 1.2 3 10 3 3.9 3.6 22 x 2 Functional Pin Description Pin No. Pin Name Pin Function Bootstrap for High Side Gate Driver. Connect a 10nF or greater ceramic capacitor 1 BOOT 2 VIN Voltage Supply Input. The input voltage range is from 4.5V to 23V. A suitable large capacitor must be bypassed with this pin. 3 SW Switching Node. Connect the output LC filter between the SW pin and output load. 4, 9 (Exposed Pad) 5 GND FB from the BOOT pin to SW pin. Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. Output Voltage Feedback Input. The feedback reference voltage is 0.925V typically. Compensation Node. This pin is used for compensating the regulation control 6 COMP loop. A series RC network is required to be connected from COMP to GND. If it is needed, an additional capacitor should be connected from COMP to GND. Enable Input. A logic high enables the converter, a logic low forces the converter 7 EN 8 SS www.richtek.com 2 into shutdown mode reducing the supply current to less than 3μA. For automatic startup, connect this pin to VIN with a 100kΩ pull up resistor. Soft-Start Control Input. The soft-start period can be set by connecting a capacitor from the SS to GND. A 0.1μF capacitor sets the soft-start period to 13ms typically. DS8250-05 March 2011 RT8250 Function Block Diagram VIN Internal Regulator Shutdown Comparator + 1.2V 5k VA VCC Foldback Control + Lockout Comparator EN VA BOOT S Q 100mΩ SW 0.5V + UV Comparator 2.5V 3V Current Sense Slope Comp Amplifier + - Oscillator 340kHz/110kHz + R Q 85mΩ Current Comparator VCC GND 7µA SS 0.925V + + EA - COMP FB Absolute Maximum Ratings (Note 1) Supply Voltage, VIN -----------------------------------------------------------------------------------------Switching Voltage, SW ------------------------------------------------------------------------------------<20ns ---------------------------------------------------------------------------------------------------------BOOT Voltage ------------------------------------------------------------------------------------------------The Other Pins -----------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C SOP-8 (Exposed Pad) -------------------------------------------------------------------------------------Package Thermal Resistance (Note 2) SOP-8 (Exposed Pad), θJA --------------------------------------------------------------------------------SOP-8 (Exposed Pad), θJC -------------------------------------------------------------------------------Junction Temperature ---------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) -----------------------------------------------------------------Storage Temperature Range ------------------------------------------------------------------------------ESD Susceptibility (Note 3) HBM (Human Body Mode) --------------------------------------------------------------------------------MM (Machine Mode) ----------------------------------------------------------------------------------------- Recommended Operating Conditions −0.3V to 24V −0.3V to (VIN + 0.3V) −0.3V to (VIN + 3V) (VSW − 0.3V) to (VSW + 6V) −0.3V to 6V 1.333W 75°C/W 15°C/W 150°C 260°C −65°C to 150°C 2kV 200V (Note 4) Supply Voltage, VIN ------------------------------------------------------------------------------------------ 4.5V to 23V Enable Voltage, VEN ----------------------------------------------------------------------------------------- 0V to 5.5V Junction Temperature Range ------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range ------------------------------------------------------------------------------- −40°C to 85°C DS8250-05 March 2011 www.richtek.com 3 RT8250 Electrical Characteristics (VIN = 12V, TA = 25°C unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Shutdown Supply Current VEN = 0V -- 0.3 3 μA Supply Current VEN = 3 V, V FB = 1V -- 0.7 1.2 mA 0.911 0.925 0.939 V -- 1250 -- μA/V Feedback Voltage VFB 4.75V ≤ VIN ≤ 23V Error Amplifier Transconductance GEA ΔIC = ±10μA High-Side Switch On-Resistance RDS(ON)1 -- 100 -- mΩ Low-Side Switch On-Resistance RDS(ON)2 -- 85 -- mΩ -- 0 10 μA -- 5.5 -- A -- 1.4 -- A High-Side Switch Leakage Current VEN = 0V, V SW = 0V Min. Duty Cycle VBOOT – VSW = 4.8V From Drain to Source Upper Switch Current Limit Lower Switch Current Limit COMP to Current Sense Transconductance Oscillation Frequency GCS -- 5.2 -- A/V fOSC1 300 340 380 kHz Short Circuit Oscillation Frequency fOSC2 VFB = 0V -- 110 -- kHz Maximum Duty Cycle DMAX VFB = 0.8V -- 90 -- % Minimum On Time tON -- 200 -- ns Logic-High VIH 2.7 -- -- Logic-Low Input Under Voltage Lockout Threshold Input Under Voltage Lockout Threshold Hysterisis Soft-Start Current VIL -- -- 0.4 3.8 4.2 4.4 V -- 200 -- mV VSS = 0V -- 7 -- μA CSS = 0.1μF -- 13 -- ms -- 150 -- °C EN Threshold Voltage VIN Rising Soft-Start Period Thermal Shutdown T SD V Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. θJA is measured in the natural convection at TA = 25°C on a high effective thermal conductivity four-layer test board of JEDEC 51-7 thermal measurement standard. The case position of θJC is on the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. www.richtek.com 4 DS8250-05 March 2011 RT8250 Typical Operating Characteristics Efficiency vs. Output Current Output Voltage vs. Output Current 3.33 100 3.32 90 VIN = 23V 3.31 VIN = 12V 70 Output Voltage (V) Efficiency (%) 80 VIN = 4.75V 60 50 40 30 3.30 VIN = 4.75V 3.29 3.28 3.27 VIN = 12V VIN = 23V 3.26 3.25 20 10 3.24 VOUT = 3.3V VOUT = 3.3V 3.23 0 0 0.5 1 1.5 2 2.5 0 3 0.5 1 2.5 3 Reference Voltage vs. Temperature Reference Voltage vs. Input Voltage 0.940 0.930 0.935 Reference Voltage (V) 0.932 0.928 0.926 0.924 0.922 0.930 0.925 0.920 0.915 VIN = 6V, VOUT = 3.3V VOUT = 3.3V, IOUT = 0A 0.920 0.910 4 6 8 10 12 14 16 18 20 22 24 -50 -25 0 Input Voltage (V) 25 50 75 100 125 Temperature (°C) Frequency vs. Temperature Frequency. vs. Input Voltage 350 350 345 345 340 340 Frequency (kHz) Frequency (kHz) 2 Output Current (A) Output Current (A) Reference Voltage (V) 1.5 335 330 325 320 315 310 335 330 325 320 315 310 305 VOUT = 3.3V, IOUT = 0A 300 305 VIN = 12V, VOUT = 3.3V, IOUT = 0A 300 4 6 8 10 12 14 16 18 Input Voltage (V) DS8250-05 March 2011 20 22 24 -50 -25 0 25 50 75 100 125 Temperature (°C) www.richtek.com 5 RT8250 Current Limit vs. Temperature 7.0 6.5 6.5 6.0 6.0 Current Limit (A) Current Limit (A) Current Limit vs. Duty Cycle 7.0 5.5 5.0 4.5 4.0 3.5 5.5 5.0 4.5 4.0 3.5 VOUT = 3.3V 3.0 VIN = 12V, VOUT = 3.3V 3.0 0 10 20 30 40 50 60 70 80 90 100 -50 -25 0 25 50 75 100 125 Temperature (°C) Duty Cycle (%) Power On from EN Power Off from EN VEN (5V/Div) VEN (5V/Div) VOUT (2V/Div) VOUT (2V/Div) IOUT (2A/Div) IOUT (2A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 3A VIN = 12V, VOUT = 3.3V, IOUT = 3A Time (5ms/Div) Time (1ms/Div) Power On from VIN Switching VOUT (10mV/Div) VIN (5V/Div) VSW (10V/Div) VOUT (2V/Div) IL (2A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 3A Time (5ms/Div) www.richtek.com 6 IL (2A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 3A Time (1μs/Div) DS8250-05 March 2011 RT8250 Load Transient Response Load Transient Response VOUT (200mV/Div) VOUT (200mV/Div) IOUT (2A/Div) IOUT (2A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 0A to 1.5A Time (100μs/Div) DS8250-05 March 2011 VIN = 12V, VOUT = 3.3V, IOUT = 0A to 3A Time (100μs/Div) www.richtek.com 7 RT8250 Application Information The RT8250 is a synchronous high voltage buck converter that can support the input voltage range from 4.5V to 23V and the output current can be up to 3A. can be programed by the external capacitor between SS pin and GND. The chip provides a 7μA charge current for the external capacitor. If a 0.1μF capacitor is used to set the soft-start and its period will be 13ms(typ.). Output Voltage Setting The resistive divider allows the FB pin to sense the output voltage as shown in Figure 1. V OUT R1 FB RT8250 R2 GND Figure 1. Output Voltage Setting The output voltage is set by an external resistive divider according to the following equation : VOUT = VFB ⎛⎜ 1+ R1 ⎞⎟ ⎝ R2 ⎠ Where VFB is the feedback reference voltage (0.925V typ.). External Bootstrap Diode Connect a 10nF low ESR ceramic capacitor between the BOOT pin and SW pin. This capacitor provides the gate driver voltage for the high side MOSFET. It is recommended to add an external bootstrap diode between an external 5V and the BOOT pin for efficiency improvement when input voltage is lower than 5.5V or duty ratio is higher than 65%. The bootstrap diode can be a low cost one such as 1N4148 or BAT54. The external 5V can be a 5V fixed input from system or a 5V output of the RT8250. Note that the external boot voltage must be lower than 5.5V. 5V BOOT RT8250 10nF SW Figure 2. External Bootstrap Diode Soft-Start The RT8250 contains an external soft-start clamp that gradually raises the output voltage. The soft-start timming www.richtek.com 8 Inductor Selection The inductor value and operating frequency determine the ripple current according to a specific input and output voltage. The ripple current ΔIL increases with higher VIN and decreases with higher inductance. V V ΔIL = ⎡⎢ OUT ⎤⎥ × ⎡⎢1− OUT ⎤⎥ VIN ⎦ ⎣ f ×L ⎦ ⎣ Having a lower ripple current reduces not only the ESR losses in the output capacitors but also the output voltage ripple. High frequency with small ripple current can achieve highest efficiency operation. However, it requires a large inductor to achieve this goal. For the ripple current selection, the value of ΔI L = 0.2375(IMAX) will be a reasonable starting point. The largest ripple current occurs at the highest VIN. To guarantee that the ripple current stays below the specified maximum, the inductor value should be chosen according to the following equation : ⎡ VOUT ⎤ ⎡ VOUT ⎤ L =⎢ × ⎢1 − ⎥ ⎥ f I V × Δ L(MAX) ⎦ ⎣ IN(MAX) ⎦ ⎣ Inductor Core Selection The inductor type must be selected once the value for L is known. Generally speaking, high efficiency converters can not afford the core loss found in low cost powdered iron cores. So, the more expensive ferrite or mollypermalloy cores will be a better choice. The selected inductance rather than the core size for a fixed inductor value is the key for actual core loss. As the inductance increases, core losses decrease. Unfortunately, increase of the inductance requires more turns of wire and therefore the copper losses will increase. Ferrite designs are preferred at high switching frequency due to the characteristics of very low core losses. So, design goals can focus on the reduction of copper loss and the saturation prevention. DS8250-05 March 2011 RT8250 Ferrite core material saturates “hard”, which means that inductance collapses abruptly when the peak design current is exceeded. The previous situation results in an abrupt increase in inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! Different core materials and shapes will change the size/ current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and do not radiate energy. However, they are usually more expensive than the similar powdered iron inductors. The rule for inductor choice mainly depends on the price vs. size requirement and any radiated field/ EMI requirements. CIN and COUT Selection The input capacitance, C IN, is needed to filter the trapezoidal current at the source of the high side MOSFET. To prevent large ripple current, a low ESR input capacitor sized for the maximum RMS current should be used. The RMS current is given by : V IRMS = IOUT(MAX) OUT VIN VIN −1 VOUT This formula has a maximum at VIN = 2VOUT, where I RMS = I OUT /2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. For the input capacitor, a 10μF x 2 low ESR ceramic capacitor is recommended. For the recommended capacitor, please refer to table 3 for more detail. The selection of COUT is determined by the required ESR to minimize voltage ripple. Moreover, the amount of bulk capacitance is also a key for COUT selection to ensure that the control loop is stable. Loop stability can be checked by viewing the load transient response as described in a later section. The output ripple, ΔVOUT , is determined by : 1 ⎤ ΔVOUT ≤ ΔIL ⎡⎢ESR + 8fC OUT ⎥⎦ ⎣ DS8250-05 March 2011 The output ripple will be highest at the maximum input voltage since ΔIL increases with input voltage. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirement. Dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. Special polymer capacitors offer very low ESR value. However, it provides lower capacitance density than other types. Although Tantalum capacitors have the highest capacitance density, it is important to only use types that pass the surge test for use in switching power supplies. Aluminum electrolytic capacitors have significantly higher ESR. However, it can be used in cost-sensitive applications for ripple current rating and long term reliability considerations. Ceramic capacitors have excellent low ESR characteristics but can have a high voltage coefficient and audible piezoelectric effects. The high Q of ceramic capacitors with trace inductance can also lead to significant ringing. Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. However, care must be taken when these capacitors are used at input and output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN large enough to damage the part. Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ΔILOAD (ESR) also begins to charge or discharge COUT generating a feedback error signal for the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. www.richtek.com 9 RT8250 Thermal Considerations Layout Consideration For continuous operation, do not exceed the maximum operation junction temperature 125°C. The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : Follow the PCB layout guidelines for optimal performance of the RT8250. PD(MAX) = ( TJ(MAX) − TA ) / θJA ` Keep the traces of the main current paths as short and wide as possible. ` Put the input capacitor as close as possible to the device pins (VIN and GND). ` SW node is with high frequency voltage swing and should be kept at small area. Keep sensitive components away from the SW node to prevent stray capacitive noise pick-up. ` Place the feedback components to the FB pin and COMP pin as close as possible. ` The GND pin and Exposed Pad should be connected to a strong ground plane for heat sinking and noise protection. Where T J(MAX) is the maximum operation junction temperature, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. For recommended operating conditions specification of RT8250, the maximum junction temperature is 125°C. The junction to ambient thermal resistance θJA is layout dependent. For PSOP-8 package, the thermal resistance θJA is 75°C/W on the standard JEDEC 51-7 four-layers thermal test board. The maximum power dissipation at TA = 25°C can be calculated by following formula : Input capacitor must be placed as close to the IC as possible. SW GND V IN PD(MAX) = (125°C − 25°C) / (75°C/W) = 1.333W for PSOP-8 package The maximum power dissipation depends on operating ambient temperature for fixed T J(MAX) and thermal resistance θJA. For RT8250 package, the Figure 3 of derating curve allows the designer to see the effect of rising ambient temperature on the maximum power dissipation allowed. CS The feedback components must be connected as close to the device as possible. C IN BOOT V OUT C OUT L1 8 SS 7 EN 3 6 COMP 4 5 FB VIN 2 SW GND GND CC CP RC R1 V OUT SW should be connected to inductor by wide and short trace. Keep sensitive components away from this trace. R2 GND Maximum Power Dissipation (W) 1.6 Four-Layer PCB Figure 4. PCB Layout Guide 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 3. Derating Curve for RT8250 Package www.richtek.com 10 DS8250-05 March 2011 RT8250 Table 2. Suggested Inductors for Typical Application Circuit Component Supplier Series Dimensions (mm) TDK VLF10045 10 x 9.7 x 4.5 TAIYO YUDEN NR8040 8x8x4 Table 3. Suggested Capacitors for CIN and COUT Component Supplier Part No. Capacitance (μF) Case Size MURATA GRM31CR61E106K 10 1206 TDK C3225X5R1E106K 10 1206 TAIYO YUDEN TMK316BJ106ML 10 1206 MURATA GRM31CR60J476M 47 1206 TDK C3225X5R0J476M 47 1210 TAIYO YUDEN EMK325BJ476MM 47 1210 MURATA GRM32ER71C226M 22 1210 TDK C3225X5R1C226M 22 1210 DS8250-05 March 2011 www.richtek.com 11 RT8250 Outline Dimension H A M EXPOSED THERMAL PAD (Bottom of Package) Y J X B F C I D Dimensions In Millimeters Symbol Dimensions In Inches Min Max Min Max A 4.801 5.004 0.189 0.197 B 3.810 4.000 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.510 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.170 0.254 0.007 0.010 I 0.000 0.152 0.000 0.006 J 5.791 6.200 0.228 0.244 M 0.406 1.270 0.016 0.050 X 2.000 2.300 0.079 0.091 Y 2.000 2.300 0.079 0.091 X 2.100 2.500 0.083 0.098 Y 3.000 3.500 0.118 0.138 Option 1 Option 2 8-Lead SOP (Exposed Pad) Plastic Package Richtek Technology Corporation Richtek Technology Corporation Headquarter Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 5F, No. 95, Minchiuan Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)86672399 Fax: (8862)86672377 Email: [email protected] Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek. www.richtek.com 12 DS8250-05 March 2011