SILABS SI32260

Si32260/61
Single-Chip Dual ProSLIC®
Description
Si32260/61 Features
The Si32260/1 Dual ProSLIC® devices, in a single package,
implement two complete foreign exchange station (FXS) telephony
interfaces. The Si32260/1 devices operate from a 3.3 V supply
and have standard PCM/SPI or GCI bus digital interfaces. A pair of
built-in dc-dc converter controllers can be used to automatically
generate the optimal battery voltage required for each line-state,
optimizing efficiency and minimizing heat generation. The
Si32260/1 devices are designed to operate not only with a tracking
battery supply for each channel for lowest power consumption, but
also with shared battery supplies, for lowest cost. When used with
shared battery supplies, the internal dc-dc controller operates in
Tracking Shared Supply (TSS) mode to deliver power
consumption lower than typical fixed voltage shared rail designs.
Self-testing and metallic loop testing (MLT) (e.g., GR-909) is
facilitated by the built-in DSP, monitor ADC, and test load. The
devices are available with linefeed voltage ratings of –110 V
(Si32260) or –140 V (Si32261) to support high voltage ringing, and
both devices support wideband audio for better-than-PSTN voice
quality. The Si32260/1 devices are available in a 8 x 8 mm 60-pin
QFN package.

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


ProSLIC
N/C
RINGb
N/C
49
48
47
N/C
VBATb
50
N/C
BASEb
51
BAT_PO
54
38
STIPDCb
CAPMa 10
37
IREF
36
CAPPb
EPAD 2
Copyright © 2011 by Silicon Laboratories
28
29
30
31
VDDD
VDDREG
CSB
SCLK
SDO
27
SDI
32
SDCHb
33
FSYNC 15
26
INTB / DTXENB 14
SDCLb
SVBATb
25
34
24
CAPMb
RSTB 13
23
35
DCDRVb
SVDC 12
AUXoi / DCFFa
RING
52
STIPACb
CAPPa 9
SVBATa 11
TIP
53
N/C
BASEa
55
N/C
VBATa
56
39
AUXdrv / DCFFb
Si32260/1
SRINGACb
STIPDCa 8
22
DC-DC
DC-DCControllers
Controller
SRINGDCb
40
DCDRVa
PLL
GPIO1b / STIPCb
41
STIPACa 7
21
Linefeed
Monitor
RING
42
SRINGACa 6
20
DAC
SRINGDCa 5
SDCLa
Linefeed
Control
GPIO2b / SRINGCb
EPAD 1
SDCHa
ADC
Line Diagnostics
RST
PCLK
SLIC
VDDA
43
GPIO1a / STIPCa 4
DATAi / DRX
INT
DSP
CODEC
N/C
44
19
SCLK
Ringing
Generator
DAC
DAC
Linefeed
Monitor
TIP
TIPb
45
GPIO2A / SRINGCa 3
DATAo / DTX 18
SDO
SPI
Control
Interface
ADC
ADC
Linefeed
Control
46
N/C 2
SDITHRU 16
CS
SDI
Caller ID
SLIC
Linefeed
DTX
DTMF &
Tone Gen
CODEC
Linefeed
DRX
PCM/
GCI
Interface
Programmable
Programmable
AC
ACImpedance
Impedance
and Hybrid
TIPa 1
FSYNC
57

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


N/C


RINGa
VoIP gateways and routers
xDSL IADs
Optical Network Terminals/Units (ONT/U)
Analog Terminal Adapters (ATA)
Cable eMTA
Wireless Fixed Terminals (WFT)
Wireless Local Loop (WLL)
WiMAX CPE
Private Branch Exchange (PBX)
VoIP MDU gateways
PSCLK / PCLK 17



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





59
Applications
60

58
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


Two complete FXS channels in 8 x 8 mm
Performs all BORSCHT functions
Ideal for short- or long-loop applications
Ultra low power consumption
Internal balanced or unbalanced ringing
Patented low power ringing
Adaptive ringing
Simplified configuration and diagnostics
Supported by ProSLIC API
GR-909 loop diagnostics
Audio diagnostics with loopback
Integrated test load
Wideband voice support
On-hook transmission
Loop or ground start operation
Smooth polarity reversal
Pulse metering
PCM and SPI bus digital interfaces with programmable
interrupts
Software-programmable parameters:
Ringing frequency, amplitude, cadence, and waveshape
Two-wire ac impedance
Transhybrid balance
DC current loop feed (10–45 mA)
Loop closure and ring trip thresholds
Ground key detect threshold
Integrated dc-dc controllers with direct connection to MOSFET
Three high voltage supply options
Full tracking
Tracking shared supplies
Fixed rail
DTMF generator/decoder
A-Law/µ-Law companding, linear PCM
GCI/IOM-2 mode support
3.3 V operation
Pb-free/RoHS-compliant packaging
7.8.11
Si32260/61
Single-Chip Dual ProSLIC®
Selected Electrical Specifications
Parameter
Ambient Temperature
Symbol
TA
Test Condition
Min
Typical
Max
Unit
F-Grade
0
25
70
°C
G-Grade
–40
25
85
°C
Supply Voltage
VDD
3.13
3.3
3.47
V
Battery Voltage
VBAT
–15
—
–110/–140
V
Maximum Loop Resistance 
(loop + load)
DC Differential Output 
Resistance
RLOOP
ILOOP=18 mA, VBAT = –52 V
—
—
2000

RDO
ILOOP < ILIM
160
—
640

Idle Channel Noise
C-Message weighted
—
8
12
dBrnC
RX and TX, dc to 3.4 kHz
—
55
—
dB
200 Hz to 1 kHz
58
60
—
dB
1 kHz to 3.4 kHz
53
58
—
dB
200 Hz to 3.4 kHz
40
—
—
dB
200 Hz to 3.4 kHz at
TIP or RING
—
50
—

Active off-hook
200 Hz to 3.4 kHz
—
25
—
mA
—
—
45
mA
2-Wire Return Loss
200 Hz to 3.4 kHz
26
30
—
dB
Transhybrid Balance
300 Hz to 3.4 kHz
26
30
—
dB
—
42
—
°C/W
PSRR from VDD
Longitudinal to Metallic/PCM 
Balance (forward or reverse)
Metallic/PCM to Longitudinal Balance
Longitudinal Impedance
Longitudinal Current per Pin
DC Feed Current
Thermal Resistance (QFN-60)
θJA
Ordering Guide
FXS Pin
Description
Max Vbat
Temperature
Si32260-C-FM
Dual FXS, wideband capable
–110 V
0 to 70 °C
Si32260-C-GM
Dual FXS, wideband capable
–110 V
–40 to 85 °C
Si32261-C-FM
Dual FXS, wideband capable
–140 V
0 to 70 °C
Si32261-C-GM
Dual FXS, wideband capable
–140 V
–40 to 85 °C
*Note: Adding the suffix "R" to the part number (e.g., Si32261-C-FMR) denotes tape and ree
Package Information 60-pin QFN
MM
Min
Typ
Max
A
0.60
0.65
0.70
b
0.20
0.25
0.30
c
0.25
0.30
0.35
8.00 BSC
D
D2
6.35
7.50 BSC
e
0.50 BSC
E2
6.45
8.00 BSC
E
6.35
E3
ProSLIC
6.40
D3
6.40
6.45
7.50 BSC
E4
2.46
2.51
2.56
E5
3.34
3.39
3.44
L
0.35
0.40
0.45
L1
0.05
0.10
0.15
aaa
0.15
bbb
0.15
ccc
0.10
ddd
0.10
Copyright © 2011 by Silicon Laboratories
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7.8.11