54LS113 Dual JK Edge-Triggered Flip-Flop General Description The 54LS113 offers individual J, K, Set and Clock inputs. When the clock goes HIGH the inputs are enabled and data may be entered. The logic level of the J and K inputs may be changed when the clock pulse is HIGH and the bistable will perform according to the Truth Table as long as minimum setup and hold times are observed. Input data is transferred to the outputs on the falling edge of the clock pulse. Connection Diagram Logic Symbol Dual-In-Line Package TL/F/10205 – 2 VCC e Pin 14 GND e Pin 7 TL/F/10205 – 1 Order Number 54LS113DMQB, 54LS113FMQB or 54LS113LMQB See NS Package Number E20A, J14A or W14B Truth Table Inputs @ Output tn @ tn a 1 J K Q L L H H L H L H Qn L H Qn Pin Names Description J1, J2, K1, K2 CP1, CP2 SD1, SD2 Q1, Q2, Q1, Q2 Data Inputs Clock Pulse Inputs (Active Falling Edge) Direct Set Inputs (Active LOW) Outputs tn e Bit Time before Clock Pulse tn a 1 e Bit Time after Clock Pulse H e HIGH Voltage Level L e LOW Voltage Level Asynchronous Input: Low input to SD sets Q to HIGH level Set is independent of clock C1995 National Semiconductor Corporation TL/F/10205 RRD-B30M105/Printed in U. S. A. 54LS113 Dual JK Edge-Triggered Flip-Flop June 1989 Absolute Maximum Ratings (Note) Note: The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings. The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual operation. If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage 7V Input Voltage 5.5V Operating Free Air Temperature Range b 55§ C to a 125§ C 54LS b 65§ C to a 150§ C Storage Temperature Range Recommended Operating Conditions Symbol 54LS113 Parameter Units Min Nom Max 4.5 5 5.5 VCC Supply Voltage VIH High Level Input Voltage V VIL Low Level Input Voltage IOH High Level Output Current IOL Low Level Output Current TA Free Air Operating Temperature ts (H) ts (L) Setup Time Jn or Kn to CPn 20 20 ns th (H) th (L) Hold Time Jn or Kn to CPn 0 0 ns tw (H) tw (L) CPn Pulse Width 20 15 ns tw (L) SDn Pulse Width LOW 15 ns 2 V b 55 0.7 V b 0.4 mA 4 mA 125 §C Electrical Characteristics over recommended operating free air temperature (unless otherwise noted) Symbol Parameter Conditions VI Input Clamp Voltage VCC e Min, II e b18 mA VOH High Level Output Voltage VCC e Min, IOH e Max, VIL e Max, VIH e Min VOL Low Level Output Voltage VCC e Min, IOL e Max, VIH e Min, VIL e Max II Input Current @ Max Input Voltage VCC e Max, VI e 5.5V IIH IIL High Level Input Current VCC e Max, VI e 2.7V Low Level Input Current VCC e Max, VI e 0.5V IOS Short Circuit Output Current VCC e Max (Note 2) ICC Supply Current VCC e Max (Note 3) Min 2 Max Units b 1.5 V 2.5 V 0.4 J, K 0.1 SD 0.3 CP 0.4 J, K 20 SD 60 CP 80 V mA mA J, K b 30 b 400 CP, SD b 60 b 800 b 20 b 100 mA 8 mA Note 1: All typicals are at VCC e 5V, TA e 25§ C. Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 3: ICC is measured with all outputs open and all inputs grounded. Typ (Note 1) mA Switching Characteristics VCC e a 5.0V, TA e a 25§ C (See Section 1 for test waveforms and output load) 54LS113 Symbol Parameter CL e 15 pF Min Units Max fmax Maximum Clock Frequency tPLH tPHL Propagation Delay CPn to Qn or Qn 30 16 24 MHz ns tPLH tPHL Propagation Delay SDn to Qn or Qn 16 24 ns Logic Diagram (one half shown) TL/F/10205 – 3 3 4 Physical Dimensions inches (millimeters) Ceramic Leadless Chip Carrier Package (E) Order Number 54LS113LMQB NS Package Number E20A 14-Lead Ceramic Dual-In-Line Package (J) Order Number 54LS113DMQB NS Package Number J14A 5 54LS113 Dual JK Edge-Triggered Flip-Flop Physical Dimensions inches (millimeters) (Continued) 14-Lead Ceramic Flat Package (W) Order Number 54LS113FMQB NS Package Number W14B LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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